* [cip-dev][isar-cip-core][PATCH 0/2] Update CI builds
@ 2022-06-10 7:25 Quirin Gylstorff
2022-06-10 7:25 ` [cip-dev][isar-cip-core][PATCH 1/2] .gitlabci: add qemu-arm64 secureboot and swupdate Quirin Gylstorff
2022-06-10 7:25 ` [cip-dev][isar-cip-core][PATCH 2/2] .gitlabci: switch to bullseye Quirin Gylstorff
0 siblings, 2 replies; 6+ messages in thread
From: Quirin Gylstorff @ 2022-06-10 7:25 UTC (permalink / raw)
To: jan.kiszka, cip-dev
From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
- Add CI builds for secureboot arm64
- Use Debian bullseye as default distro
Quirin Gylstorff (2):
.gitlabci: add qemu-arm64 secureboot and swupdate
.gitlabci: switch to bullseye
.gitlab-ci.yml | 43 +++++++++++++++++++++++++++++++++----------
1 file changed, 33 insertions(+), 10 deletions(-)
--
2.35.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [cip-dev][isar-cip-core][PATCH 1/2] .gitlabci: add qemu-arm64 secureboot and swupdate
2022-06-10 7:25 [cip-dev][isar-cip-core][PATCH 0/2] Update CI builds Quirin Gylstorff
@ 2022-06-10 7:25 ` Quirin Gylstorff
2022-06-13 9:30 ` Jan Kiszka
2022-06-10 7:25 ` [cip-dev][isar-cip-core][PATCH 2/2] .gitlabci: switch to bullseye Quirin Gylstorff
1 sibling, 1 reply; 6+ messages in thread
From: Quirin Gylstorff @ 2022-06-10 7:25 UTC (permalink / raw)
To: jan.kiszka, cip-dev
From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
Signed-off-by: Quirin Gylstorff <quirin.gylstorff@siemens.com>
---
.gitlab-ci.yml | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 8545a66..23ab1cb 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -218,6 +218,29 @@ build:qemu-amd64-swupdate:
targz: disable
deploy: disable
+# secure boot images arm64
+build:qemu-arm64-secure-boot:
+ extends:
+ - .build_base
+ variables:
+ target: qemu-arm64
+ extension: ebg-secure-boot-snakeoil
+ use_rt: disable
+ wic_targz: disable
+ targz: disable
+ deploy: disable
+
+build:qemu-arm64-swupdate:
+ extends:
+ - .build_base
+ variables:
+ target: qemu-arm64
+ extension: ebg-swu
+ use_rt: disable
+ wic_targz: disable
+ targz: disable
+ deploy: disable
+
# bullseye images
build:simatic-ipc227e-bullseye:
extends:
--
2.35.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [cip-dev][isar-cip-core][PATCH 2/2] .gitlabci: switch to bullseye
2022-06-10 7:25 [cip-dev][isar-cip-core][PATCH 0/2] Update CI builds Quirin Gylstorff
2022-06-10 7:25 ` [cip-dev][isar-cip-core][PATCH 1/2] .gitlabci: add qemu-arm64 secureboot and swupdate Quirin Gylstorff
@ 2022-06-10 7:25 ` Quirin Gylstorff
2022-06-13 9:31 ` Jan Kiszka
1 sibling, 1 reply; 6+ messages in thread
From: Quirin Gylstorff @ 2022-06-10 7:25 UTC (permalink / raw)
To: jan.kiszka, cip-dev
From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
Signed-off-by: Quirin Gylstorff <quirin.gylstorff@siemens.com>
---
.gitlab-ci.yml | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 23ab1cb..7c28ea1 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -2,7 +2,7 @@ image: ghcr.io/siemens/kas/kas-isar:3.0.2
variables:
GIT_STRATEGY: clone
- release: buster
+ release: bullseye
extension: base
use_rt: enable
wic_targz: enable
@@ -241,34 +241,34 @@ build:qemu-arm64-swupdate:
targz: disable
deploy: disable
-# bullseye images
-build:simatic-ipc227e-bullseye:
+# buster images
+build:simatic-ipc227e-buster:
extends:
- .build_base
variables:
target: simatic-ipc227e
- release: bullseye
+ release: buster
-build:bbb-bullseye:
+build:bbb-buster:
extends:
- .build_base
variables:
target: bbb
dtb: am335x-boneblack.dtb
- release: bullseye
+ release: buster
-build:iwg20m-bullseye:
+build:iwg20m-buster:
extends:
- .build_base
variables:
target: iwg20m
dtb: r8a7743-iwg20d-q7-dbcm-ca.dtb
- release: bullseye
+ release: buster
-build:hihope-rzg2m-bullseye:
+build:hihope-rzg2m-buster:
extends:
- .build_base
variables:
target: hihope-rzg2m
dtb: renesas/r8a774a1-hihope-rzg2m-ex.dtb
- release: bullseye
+ release: buster
--
2.35.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [cip-dev][isar-cip-core][PATCH 1/2] .gitlabci: add qemu-arm64 secureboot and swupdate
2022-06-10 7:25 ` [cip-dev][isar-cip-core][PATCH 1/2] .gitlabci: add qemu-arm64 secureboot and swupdate Quirin Gylstorff
@ 2022-06-13 9:30 ` Jan Kiszka
2022-06-13 10:00 ` Gylstorff Quirin
0 siblings, 1 reply; 6+ messages in thread
From: Jan Kiszka @ 2022-06-13 9:30 UTC (permalink / raw)
To: Quirin Gylstorff, cip-dev
On 10.06.22 09:25, Quirin Gylstorff wrote:
> From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
>
> Signed-off-by: Quirin Gylstorff <quirin.gylstorff@siemens.com>
> ---
> .gitlab-ci.yml | 23 +++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
> index 8545a66..23ab1cb 100644
> --- a/.gitlab-ci.yml
> +++ b/.gitlab-ci.yml
> @@ -218,6 +218,29 @@ build:qemu-amd64-swupdate:
> targz: disable
> deploy: disable
>
> +# secure boot images arm64
> +build:qemu-arm64-secure-boot:
> + extends:
> + - .build_base
> + variables:
> + target: qemu-arm64
> + extension: ebg-secure-boot-snakeoil
> + use_rt: disable
> + wic_targz: disable
> + targz: disable
> + deploy: disable
> +
> +build:qemu-arm64-swupdate:
> + extends:
> + - .build_base
> + variables:
> + target: qemu-arm64
> + extension: ebg-swu
> + use_rt: disable
> + wic_targz: disable
> + targz: disable
> + deploy: disable
I think we can skip the second test. The non-secure build variant is
already sufficiently covered by the x86 build, and the non-secure u-boot
build for arm64 is not too special.
Jan
> +
> # bullseye images
> build:simatic-ipc227e-bullseye:
> extends:
--
Siemens AG, Technology
Competence Center Embedded Linux
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [cip-dev][isar-cip-core][PATCH 2/2] .gitlabci: switch to bullseye
2022-06-10 7:25 ` [cip-dev][isar-cip-core][PATCH 2/2] .gitlabci: switch to bullseye Quirin Gylstorff
@ 2022-06-13 9:31 ` Jan Kiszka
0 siblings, 0 replies; 6+ messages in thread
From: Jan Kiszka @ 2022-06-13 9:31 UTC (permalink / raw)
To: Quirin Gylstorff, cip-dev
On 10.06.22 09:25, Quirin Gylstorff wrote:
> From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
>
> Signed-off-by: Quirin Gylstorff <quirin.gylstorff@siemens.com>
> ---
> .gitlab-ci.yml | 20 ++++++++++----------
> 1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
> index 23ab1cb..7c28ea1 100644
> --- a/.gitlab-ci.yml
> +++ b/.gitlab-ci.yml
> @@ -2,7 +2,7 @@ image: ghcr.io/siemens/kas/kas-isar:3.0.2
>
> variables:
> GIT_STRATEGY: clone
> - release: buster
> + release: bullseye
> extension: base
> use_rt: enable
> wic_targz: enable
> @@ -241,34 +241,34 @@ build:qemu-arm64-swupdate:
> targz: disable
> deploy: disable
>
> -# bullseye images
> -build:simatic-ipc227e-bullseye:
> +# buster images
> +build:simatic-ipc227e-buster:
> extends:
> - .build_base
> variables:
> target: simatic-ipc227e
> - release: bullseye
> + release: buster
>
> -build:bbb-bullseye:
> +build:bbb-buster:
> extends:
> - .build_base
> variables:
> target: bbb
> dtb: am335x-boneblack.dtb
> - release: bullseye
> + release: buster
>
> -build:iwg20m-bullseye:
> +build:iwg20m-buster:
> extends:
> - .build_base
> variables:
> target: iwg20m
> dtb: r8a7743-iwg20d-q7-dbcm-ca.dtb
> - release: bullseye
> + release: buster
>
> -build:hihope-rzg2m-bullseye:
> +build:hihope-rzg2m-buster:
> extends:
> - .build_base
> variables:
> target: hihope-rzg2m
> dtb: renesas/r8a774a1-hihope-rzg2m-ex.dtb
> - release: bullseye
> + release: buster
Thanks, applied to next.
Jan
--
Siemens AG, Technology
Competence Center Embedded Linux
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [cip-dev][isar-cip-core][PATCH 1/2] .gitlabci: add qemu-arm64 secureboot and swupdate
2022-06-13 9:30 ` Jan Kiszka
@ 2022-06-13 10:00 ` Gylstorff Quirin
0 siblings, 0 replies; 6+ messages in thread
From: Gylstorff Quirin @ 2022-06-13 10:00 UTC (permalink / raw)
To: Jan Kiszka, cip-dev
On 6/13/22 11:30, Jan Kiszka wrote:
> On 10.06.22 09:25, Quirin Gylstorff wrote:
>> From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
>>
>> Signed-off-by: Quirin Gylstorff <quirin.gylstorff@siemens.com>
>> ---
>> .gitlab-ci.yml | 23 +++++++++++++++++++++++
>> 1 file changed, 23 insertions(+)
>>
>> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
>> index 8545a66..23ab1cb 100644
>> --- a/.gitlab-ci.yml
>> +++ b/.gitlab-ci.yml
>> @@ -218,6 +218,29 @@ build:qemu-amd64-swupdate:
>> targz: disable
>> deploy: disable
>>
>> +# secure boot images arm64
>> +build:qemu-arm64-secure-boot:
>> + extends:
>> + - .build_base
>> + variables:
>> + target: qemu-arm64
>> + extension: ebg-secure-boot-snakeoil
>> + use_rt: disable
>> + wic_targz: disable
>> + targz: disable
>> + deploy: disable
>> +
>> +build:qemu-arm64-swupdate:
>> + extends:
>> + - .build_base
>> + variables:
>> + target: qemu-arm64
>> + extension: ebg-swu
>> + use_rt: disable
>> + wic_targz: disable
>> + targz: disable
>> + deploy: disable
>
> I think we can skip the second test. The non-secure build variant is
> already sufficiently covered by the x86 build, and the non-secure u-boot
> build for arm64 is not too special.
>
> Jan
Ok, will send a v2.
>
>> +
>> # bullseye images
>> build:simatic-ipc227e-bullseye:
>> extends:
>
Quirin
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-06-13 10:00 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-06-10 7:25 [cip-dev][isar-cip-core][PATCH 0/2] Update CI builds Quirin Gylstorff
2022-06-10 7:25 ` [cip-dev][isar-cip-core][PATCH 1/2] .gitlabci: add qemu-arm64 secureboot and swupdate Quirin Gylstorff
2022-06-13 9:30 ` Jan Kiszka
2022-06-13 10:00 ` Gylstorff Quirin
2022-06-10 7:25 ` [cip-dev][isar-cip-core][PATCH 2/2] .gitlabci: switch to bullseye Quirin Gylstorff
2022-06-13 9:31 ` Jan Kiszka
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