From: Simon Horman <horms+renesas@verge.net.au>
To: linux-renesas-soc@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org,
Magnus Damm <magnus.damm@gmail.com>,
Biju Das <biju.das@bp.renesas.com>,
Simon Horman <horms+renesas@verge.net.au>
Subject: [PATCH 35/58] arm64: dts: renesas: r8a774a1: Add audio support
Date: Thu, 13 Sep 2018 11:09:30 +0200 [thread overview]
Message-ID: <e2f04248fcd47bdc037b4bfe7864ebd0a807e30c.1536828567.git.horms+renesas@verge.net.au> (raw)
In-Reply-To: <cover.1536828567.git.horms+renesas@verge.net.au>
From: Biju Das <biju.das@bp.renesas.com>
Add sound support for the RZ/G2M SoC (a.k.a. R8A774A1).
This work is based on similar work done on the R8A7796 SoC
by Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 275 ++++++++++++++++++++++++++++++
1 file changed, 275 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
index c9ac545f08f3..50c9265aa1c4 100644
--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
@@ -1045,6 +1045,281 @@
status = "disabled";
};
+ rcar_sound: sound@ec500000 {
+ /*
+ * #sound-dai-cells is required
+ *
+ * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
+ * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
+ */
+ /*
+ * #clock-cells is required for audio_clkout0/1/2/3
+ *
+ * clkout : #clock-cells = <0>; <&rcar_sound>;
+ * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
+ */
+ compatible = "renesas,rcar_sound-r8a774a1", "renesas,rcar_sound-gen3";
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+ clocks = <&cpg CPG_MOD 1005>,
+ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+ <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
+ <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+ <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+ <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+ <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+ <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+ <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+ <&audio_clk_a>, <&audio_clk_b>,
+ <&audio_clk_c>,
+ <&cpg CPG_CORE 10>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0",
+ "src.9", "src.8", "src.7", "src.6",
+ "src.5", "src.4", "src.3", "src.2",
+ "src.1", "src.0",
+ "mix.1", "mix.0",
+ "ctu.1", "ctu.0",
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 1005>,
+ <&cpg 1006>, <&cpg 1007>,
+ <&cpg 1008>, <&cpg 1009>,
+ <&cpg 1010>, <&cpg 1011>,
+ <&cpg 1012>, <&cpg 1013>,
+ <&cpg 1014>, <&cpg 1015>;
+ reset-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0";
+ status = "disabled";
+
+ rcar_sound,dvc {
+ dvc0: dvc-0 {
+ dmas = <&audma1 0xbc>;
+ dma-names = "tx";
+ };
+ dvc1: dvc-1 {
+ dmas = <&audma1 0xbe>;
+ dma-names = "tx";
+ };
+ };
+
+ rcar_sound,mix {
+ mix0: mix-0 { };
+ mix1: mix-1 { };
+ };
+
+ rcar_sound,ctu {
+ ctu00: ctu-0 { };
+ ctu01: ctu-1 { };
+ ctu02: ctu-2 { };
+ ctu03: ctu-3 { };
+ ctu10: ctu-4 { };
+ ctu11: ctu-5 { };
+ ctu12: ctu-6 { };
+ ctu13: ctu-7 { };
+ };
+
+ rcar_sound,src {
+ src0: src-0 {
+ interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x85>, <&audma1 0x9a>;
+ dma-names = "rx", "tx";
+ };
+ src1: src-1 {
+ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x87>, <&audma1 0x9c>;
+ dma-names = "rx", "tx";
+ };
+ src2: src-2 {
+ interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x89>, <&audma1 0x9e>;
+ dma-names = "rx", "tx";
+ };
+ src3: src-3 {
+ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8b>, <&audma1 0xa0>;
+ dma-names = "rx", "tx";
+ };
+ src4: src-4 {
+ interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8d>, <&audma1 0xb0>;
+ dma-names = "rx", "tx";
+ };
+ src5: src-5 {
+ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8f>, <&audma1 0xb2>;
+ dma-names = "rx", "tx";
+ };
+ src6: src-6 {
+ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x91>, <&audma1 0xb4>;
+ dma-names = "rx", "tx";
+ };
+ src7: src-7 {
+ interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x93>, <&audma1 0xb6>;
+ dma-names = "rx", "tx";
+ };
+ src8: src-8 {
+ interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x95>, <&audma1 0xb8>;
+ dma-names = "rx", "tx";
+ };
+ src9: src-9 {
+ interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x97>, <&audma1 0xba>;
+ dma-names = "rx", "tx";
+ };
+ };
+
+ rcar_sound,ssi {
+ ssi0: ssi-0 {
+ interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi1: ssi-1 {
+ interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi2: ssi-2 {
+ interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi3: ssi-3 {
+ interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi4: ssi-4 {
+ interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi5: ssi-5 {
+ interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi6: ssi-6 {
+ interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi7: ssi-7 {
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi8: ssi-8 {
+ interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi9: ssi-9 {
+ interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ };
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ };
+ port@1 {
+ reg = <1>;
+ };
+ };
+ };
+
+ audma0: dma-controller@ec700000 {
+ compatible = "renesas,dmac-r8a774a1",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ };
+
+ audma1: dma-controller@ec720000 {
+ compatible = "renesas,dmac-r8a774a1",
+ "renesas,rcar-dmac";
+ reg = <0 0xec720000 0 0x10000>;
+ interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 501>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ };
+
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a774a1",
"renesas,rcar-gen3-sdhi";
--
2.11.0
WARNING: multiple messages have this Message-ID (diff)
From: horms+renesas@verge.net.au (Simon Horman)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 35/58] arm64: dts: renesas: r8a774a1: Add audio support
Date: Thu, 13 Sep 2018 11:09:30 +0200 [thread overview]
Message-ID: <e2f04248fcd47bdc037b4bfe7864ebd0a807e30c.1536828567.git.horms+renesas@verge.net.au> (raw)
In-Reply-To: <cover.1536828567.git.horms+renesas@verge.net.au>
From: Biju Das <biju.das@bp.renesas.com>
Add sound support for the RZ/G2M SoC (a.k.a. R8A774A1).
This work is based on similar work done on the R8A7796 SoC
by Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 275 ++++++++++++++++++++++++++++++
1 file changed, 275 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
index c9ac545f08f3..50c9265aa1c4 100644
--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
@@ -1045,6 +1045,281 @@
status = "disabled";
};
+ rcar_sound: sound at ec500000 {
+ /*
+ * #sound-dai-cells is required
+ *
+ * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
+ * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
+ */
+ /*
+ * #clock-cells is required for audio_clkout0/1/2/3
+ *
+ * clkout : #clock-cells = <0>; <&rcar_sound>;
+ * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
+ */
+ compatible = "renesas,rcar_sound-r8a774a1", "renesas,rcar_sound-gen3";
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+ clocks = <&cpg CPG_MOD 1005>,
+ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+ <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
+ <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+ <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+ <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+ <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+ <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+ <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+ <&audio_clk_a>, <&audio_clk_b>,
+ <&audio_clk_c>,
+ <&cpg CPG_CORE 10>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0",
+ "src.9", "src.8", "src.7", "src.6",
+ "src.5", "src.4", "src.3", "src.2",
+ "src.1", "src.0",
+ "mix.1", "mix.0",
+ "ctu.1", "ctu.0",
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 1005>,
+ <&cpg 1006>, <&cpg 1007>,
+ <&cpg 1008>, <&cpg 1009>,
+ <&cpg 1010>, <&cpg 1011>,
+ <&cpg 1012>, <&cpg 1013>,
+ <&cpg 1014>, <&cpg 1015>;
+ reset-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0";
+ status = "disabled";
+
+ rcar_sound,dvc {
+ dvc0: dvc-0 {
+ dmas = <&audma1 0xbc>;
+ dma-names = "tx";
+ };
+ dvc1: dvc-1 {
+ dmas = <&audma1 0xbe>;
+ dma-names = "tx";
+ };
+ };
+
+ rcar_sound,mix {
+ mix0: mix-0 { };
+ mix1: mix-1 { };
+ };
+
+ rcar_sound,ctu {
+ ctu00: ctu-0 { };
+ ctu01: ctu-1 { };
+ ctu02: ctu-2 { };
+ ctu03: ctu-3 { };
+ ctu10: ctu-4 { };
+ ctu11: ctu-5 { };
+ ctu12: ctu-6 { };
+ ctu13: ctu-7 { };
+ };
+
+ rcar_sound,src {
+ src0: src-0 {
+ interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x85>, <&audma1 0x9a>;
+ dma-names = "rx", "tx";
+ };
+ src1: src-1 {
+ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x87>, <&audma1 0x9c>;
+ dma-names = "rx", "tx";
+ };
+ src2: src-2 {
+ interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x89>, <&audma1 0x9e>;
+ dma-names = "rx", "tx";
+ };
+ src3: src-3 {
+ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8b>, <&audma1 0xa0>;
+ dma-names = "rx", "tx";
+ };
+ src4: src-4 {
+ interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8d>, <&audma1 0xb0>;
+ dma-names = "rx", "tx";
+ };
+ src5: src-5 {
+ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8f>, <&audma1 0xb2>;
+ dma-names = "rx", "tx";
+ };
+ src6: src-6 {
+ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x91>, <&audma1 0xb4>;
+ dma-names = "rx", "tx";
+ };
+ src7: src-7 {
+ interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x93>, <&audma1 0xb6>;
+ dma-names = "rx", "tx";
+ };
+ src8: src-8 {
+ interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x95>, <&audma1 0xb8>;
+ dma-names = "rx", "tx";
+ };
+ src9: src-9 {
+ interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x97>, <&audma1 0xba>;
+ dma-names = "rx", "tx";
+ };
+ };
+
+ rcar_sound,ssi {
+ ssi0: ssi-0 {
+ interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi1: ssi-1 {
+ interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi2: ssi-2 {
+ interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi3: ssi-3 {
+ interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi4: ssi-4 {
+ interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi5: ssi-5 {
+ interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi6: ssi-6 {
+ interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi7: ssi-7 {
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi8: ssi-8 {
+ interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi9: ssi-9 {
+ interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ };
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port at 0 {
+ reg = <0>;
+ };
+ port at 1 {
+ reg = <1>;
+ };
+ };
+ };
+
+ audma0: dma-controller at ec700000 {
+ compatible = "renesas,dmac-r8a774a1",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ };
+
+ audma1: dma-controller at ec720000 {
+ compatible = "renesas,dmac-r8a774a1",
+ "renesas,rcar-dmac";
+ reg = <0 0xec720000 0 0x10000>;
+ interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 501>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ };
+
sdhi0: sd at ee100000 {
compatible = "renesas,sdhi-r8a774a1",
"renesas,rcar-gen3-sdhi";
--
2.11.0
next prev parent reply other threads:[~2018-09-13 14:20 UTC|newest]
Thread overview: 120+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-13 9:09 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.20 Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:08 ` [PATCH 01/58] arm64: dts: renesas: r8a77980: add RWDT support Simon Horman
2018-09-13 9:08 ` Simon Horman
2018-09-13 9:08 ` [PATCH 02/58] arm64: dts: renesas: Include R-Car product name in DTSI files Simon Horman
2018-09-13 9:08 ` Simon Horman
2018-09-13 9:08 ` [PATCH 03/58] arm64: dts: renesas: r8a77995: Attach the SYS-DMAC to the IPMMU Simon Horman
2018-09-13 9:08 ` Simon Horman
2018-09-13 9:08 ` [PATCH 04/58] arm64: dts: renesas: Convert to new LVDS DT bindings Simon Horman
2018-09-13 9:08 ` Simon Horman
2018-09-13 9:09 ` [PATCH 05/58] arm64: dts: renesas: r8a77980: add Cortex-A53 PMU support Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 06/58] arm64: dts: renesas: r8a77990: Enable PWM for Ebisu board Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 07/58] arm64: dts: renesas: r8a77980: move IPMMU nodes Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 08/58] arm64: dts: renesas: r8a779{7|8}0: move CAN clock node Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 09/58] arm64: dts: renesas: r8a77965: Add SATA controller node Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 10/58] arm64: dts: renesas: salvator-xs: enable SATA Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 11/58] arm64: dts: renesas: r8a77980: add CSI2/VIN support Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 12/58] arm64: dts: renesas: salvator-common: adv748x: Override secondary addresses Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 13/58] arm64: dts: renesas: Initial r8a774a1 SoC device tree Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 14/58] arm64: dts: renesas: r8a77965: Attach the SYS-DMAC to the IPMMU Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 15/58] arm64: dts: renesas: r8a77965: Add CAN{0,1} placeholder nodes Simon Horman
2018-09-13 9:09 ` [PATCH 15/58] arm64: dts: renesas: r8a77965: Add CAN{0, 1} " Simon Horman
2018-09-13 9:09 ` [PATCH 16/58] arm64: dts: renesas: r8a77965: m3nulcb: Initial device tree Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 17/58] arm64: dts: renesas: r8a77965: Add OPPs table for cpu devices Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 18/58] arm64: dts: renesas: r8a77970: add MMC support Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 19/58] arm64: dts: renesas: v3msk: add eMMC support Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 20/58] arm64: dts: renesas: condor/v3hsk: add DU/LVDS/HDMI support Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 21/58] arm64: dts: renesas: r8a774a1: Add SYS-DMAC controller nodes Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 22/58] arm64: dts: renesas: r8a774a1: Add SCIF and HSCIF nodes Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 23/58] arm64: dts: renesas: r8a774a1: Add INTC-EX device node Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 24/58] arm64: dts: renesas: r8a774a1: Add Ethernet AVB node Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 25/58] arm64: dts: renesas: r8a774a1: Add RWDT node Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 26/58] arm64: dts: renesas: r8a774a1: Add pinctrl device node Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 27/58] arm64: dts: renesas: r8a774a1: Add GPIO device nodes Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 28/58] arm64: dts: renesas: r8a774a1: Add SDHI nodes Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 29/58] arm64: dts: renesas: r8a774a1: Add I2C and IIC-DVFS support Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 30/58] arm64: dts: renesas: r8a774a1: Add RZ/G2M thermal support Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 31/58] arm64: dts: renesas: r8a774a1: Add IPMMU device nodes Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 32/58] arm64: dts: renesas: r8a774a1: Add all MSIOF nodes Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 33/58] arm64: dts: renesas: r8a774a1: Add Cortex-A53 CPU cores Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 34/58] arm64: dts: renesas: r8a774a1: Add PWM device nodes Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` Simon Horman [this message]
2018-09-13 9:09 ` [PATCH 35/58] arm64: dts: renesas: r8a774a1: Add audio support Simon Horman
2018-09-13 9:09 ` [PATCH 36/58] arm64: dts: renesas: r8a774a1: Add FCPF and FCPV instances Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 37/58] arm64: dts: renesas: r8a774a1: Add USB2.0 phy and host(EHCI/OHCI) device nodes Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 38/58] arm64: dts: renesas: r8a774a1: Add USB-DMAC and HSUSB " Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 39/58] arm64: dts: renesas: r8a774a1: Add USB3.0 " Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 40/58] arm64: dts: renesas: r8a77980: add PCIe support Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 41/58] arm64: dts: renesas: condor: " Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 42/58] arm64: dts: renesas: r8a77965: m3nulcb-kf: Initial device tree Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 43/58] arm64: dts: renesas: Fix whitespace around assignments Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 44/58] arm64: dts: renesas: v3hsk: Move lvds0 node Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 45/58] arm64: dts: renesas: r8a77965: Move timer node Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 46/58] arm64: dts: renesas: r8a77965: Fix HS-USB compatible Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 47/58] arm64: dts: renesas: r8a77965: Fix clock/reset for usb2_phy1 Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 48/58] arm64: dts: renesas: salvator-xs: Improve SATA switch settings comments Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 49/58] arm64: dts: renesas: r8a77990: Use CPG/MSSR and SYSC binding definitions Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 50/58] arm64: dts: renesas: r8a77990: Add BRG support to SCIF2 Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 51/58] arm64: dts: renesas: r8a7795: Move arm_cc630p node Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 52/58] arm64: dts: renesas: r8a77990: Add all MSIOF nodes Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 53/58] arm64: dts: renesas: r8a77990: Add VIN and CSI-2 device nodes Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 54/58] arm64: dts: renesas: r8a77990: Add I2C " Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 55/58] arm64: dts: renesas: r8a77990: Add SYS-DMAC " Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 56/58] arm64: dts: renesas: enable SDR104 on R-Car Gen3 Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 57/58] arm64: dts: renesas: draak: Sort device nodes Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-13 9:09 ` [PATCH 58/58] arm64: dts: r8a77965: add FDP1 " Simon Horman
2018-09-13 9:09 ` Simon Horman
2018-09-23 13:19 ` [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.20 Olof Johansson
2018-09-23 13:19 ` Olof Johansson
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