All of lore.kernel.org
 help / color / mirror / Atom feed
From: Valentin Schneider <valentin.schneider@arm.com>
To: Marc Zyngier <maz@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Will Deacon <will@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Russell King <linux@arm.linux.org.uk>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Sumit Garg <sumit.garg@linaro.org>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Gregory Clement <gregory.clement@bootlin.com>,
	Andrew Lunn <andrew@lunn.ch>,
	kernel-team@android.com
Subject: Re: [PATCH v2 04/17] ARM: Allow IPIs to be handled as normal interrupts
Date: Thu, 25 Jun 2020 19:25:32 +0100	[thread overview]
Message-ID: <jhjk0zvgfz7.mognet@arm.com> (raw)
In-Reply-To: <20200624195811.435857-5-maz@kernel.org>


On 24/06/20 20:57, Marc Zyngier wrote:
> @@ -696,9 +696,76 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
>
>       if ((unsigned)ipinr < NR_IPI)
>               trace_ipi_exit_rcuidle(ipi_types[ipinr]);
> +}
> +
> +/* Legacy version, should go away once all irqchips have been converted */
> +void handle_IPI(int ipinr, struct pt_regs *regs)
> +{
> +	struct pt_regs *old_regs = set_irq_regs(regs);
> +
> +	irq_enter();
> +	do_handle_IPI(ipinr);
> +	irq_exit();
> +
>       set_irq_regs(old_regs);
>  }
>
> +static irqreturn_t ipi_handler(int irq, void *data)
> +{
> +	do_handle_IPI(irq - ipi_irq_base);
> +	return IRQ_HANDLED;
> +}
> +
> +static void ipi_send(const struct cpumask *target, unsigned int ipi)
> +{
> +	__ipi_send_mask(ipi_desc[ipi], target);
> +}
> +
> +static void ipi_setup(int cpu)
> +{
> +	if (ipi_irq_base) {
> +		int i;
> +
> +		for (i = 0; i < nr_ipi; i++)
> +			enable_percpu_irq(ipi_irq_base + i, 0);
> +	}
> +}
> +
> +static void ipi_teardown(int cpu)
> +{
> +	if (ipi_irq_base) {
> +		int i;
> +
> +		for (i = 0; i < nr_ipi; i++)
> +			disable_percpu_irq(ipi_irq_base + i);
> +	}
> +}
> +
> +void __init set_smp_ipi_range(int ipi_base, int n)
> +{
> +	int i;
> +
> +	WARN_ON(n < MAX_IPI);
> +	nr_ipi = min(n, MAX_IPI);


I got confused by that backtrace thing and NR_IPI vs MAX_IPI.
I think I got it now : we don't want to call trace_ipi_raise() for
IPI_CPU_BACKTRACE *but* we still need to alloc the desc and route it
through the generic IPI layers.

The only difference I can tell is that now we will get some trace events
for it via the handler entry/exit tracepoints - that shouldn't cause any
issue.

> +
> +	for (i = 0; i < nr_ipi; i++) {
> +		int err;
> +
> +		err = request_percpu_irq(ipi_base + i, ipi_handler,
> +					 "IPI", &irq_stat);
> +		WARN_ON(err);
> +
> +		ipi_desc[i] = irq_to_desc(ipi_base + i);
> +		irq_set_status_flags(ipi_base + i, IRQ_HIDDEN);
> +	}
> +
> +	ipi_irq_base = ipi_base;
> +	set_smp_cross_call(ipi_send);
> +
> +	/* Setup the boot CPU immediately */
> +	ipi_setup(smp_processor_id());
> +}
> +
>  void smp_send_reschedule(int cpu)
>  {
>       smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);

WARNING: multiple messages have this Message-ID (diff)
From: Valentin Schneider <valentin.schneider@arm.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Sumit Garg <sumit.garg@linaro.org>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Russell King <linux@arm.linux.org.uk>,
	Jason Cooper <jason@lakedaemon.net>,
	kernel-team@android.com, Andrew Lunn <andrew@lunn.ch>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Gregory Clement <gregory.clement@bootlin.com>,
	linux-kernel@vger.kernel.org,
	Thomas Gleixner <tglx@linutronix.de>,
	Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 04/17] ARM: Allow IPIs to be handled as normal interrupts
Date: Thu, 25 Jun 2020 19:25:32 +0100	[thread overview]
Message-ID: <jhjk0zvgfz7.mognet@arm.com> (raw)
In-Reply-To: <20200624195811.435857-5-maz@kernel.org>


On 24/06/20 20:57, Marc Zyngier wrote:
> @@ -696,9 +696,76 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
>
>       if ((unsigned)ipinr < NR_IPI)
>               trace_ipi_exit_rcuidle(ipi_types[ipinr]);
> +}
> +
> +/* Legacy version, should go away once all irqchips have been converted */
> +void handle_IPI(int ipinr, struct pt_regs *regs)
> +{
> +	struct pt_regs *old_regs = set_irq_regs(regs);
> +
> +	irq_enter();
> +	do_handle_IPI(ipinr);
> +	irq_exit();
> +
>       set_irq_regs(old_regs);
>  }
>
> +static irqreturn_t ipi_handler(int irq, void *data)
> +{
> +	do_handle_IPI(irq - ipi_irq_base);
> +	return IRQ_HANDLED;
> +}
> +
> +static void ipi_send(const struct cpumask *target, unsigned int ipi)
> +{
> +	__ipi_send_mask(ipi_desc[ipi], target);
> +}
> +
> +static void ipi_setup(int cpu)
> +{
> +	if (ipi_irq_base) {
> +		int i;
> +
> +		for (i = 0; i < nr_ipi; i++)
> +			enable_percpu_irq(ipi_irq_base + i, 0);
> +	}
> +}
> +
> +static void ipi_teardown(int cpu)
> +{
> +	if (ipi_irq_base) {
> +		int i;
> +
> +		for (i = 0; i < nr_ipi; i++)
> +			disable_percpu_irq(ipi_irq_base + i);
> +	}
> +}
> +
> +void __init set_smp_ipi_range(int ipi_base, int n)
> +{
> +	int i;
> +
> +	WARN_ON(n < MAX_IPI);
> +	nr_ipi = min(n, MAX_IPI);


I got confused by that backtrace thing and NR_IPI vs MAX_IPI.
I think I got it now : we don't want to call trace_ipi_raise() for
IPI_CPU_BACKTRACE *but* we still need to alloc the desc and route it
through the generic IPI layers.

The only difference I can tell is that now we will get some trace events
for it via the handler entry/exit tracepoints - that shouldn't cause any
issue.

> +
> +	for (i = 0; i < nr_ipi; i++) {
> +		int err;
> +
> +		err = request_percpu_irq(ipi_base + i, ipi_handler,
> +					 "IPI", &irq_stat);
> +		WARN_ON(err);
> +
> +		ipi_desc[i] = irq_to_desc(ipi_base + i);
> +		irq_set_status_flags(ipi_base + i, IRQ_HIDDEN);
> +	}
> +
> +	ipi_irq_base = ipi_base;
> +	set_smp_cross_call(ipi_send);
> +
> +	/* Setup the boot CPU immediately */
> +	ipi_setup(smp_processor_id());
> +}
> +
>  void smp_send_reschedule(int cpu)
>  {
>       smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2020-06-25 18:25 UTC|newest]

Thread overview: 99+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-24 19:57 [PATCH v2 00/17] arm/arm64: Turning IPIs into normal interrupts Marc Zyngier
2020-06-24 19:57 ` Marc Zyngier
2020-06-24 19:57 ` [PATCH v2 01/17] genirq: Add fasteoi IPI flow Marc Zyngier
2020-06-24 19:57   ` Marc Zyngier
2020-06-24 19:57 ` [PATCH v2 02/17] genirq: Allow interrupts to be excluded from /proc/interrupts Marc Zyngier
2020-06-24 19:57   ` Marc Zyngier
2020-06-24 19:57 ` [PATCH v2 03/17] arm64: Allow IPIs to be handled as normal interrupts Marc Zyngier
2020-06-24 19:57   ` Marc Zyngier
2020-06-25 18:25   ` Valentin Schneider
2020-06-25 18:25     ` Valentin Schneider
2020-07-10 19:58   ` Valentin Schneider
2020-07-10 19:58     ` Valentin Schneider
2020-06-24 19:57 ` [PATCH v2 04/17] ARM: " Marc Zyngier
2020-06-24 19:57   ` Marc Zyngier
2020-06-25 18:25   ` Valentin Schneider [this message]
2020-06-25 18:25     ` Valentin Schneider
2020-06-29  9:37     ` Marc Zyngier
2020-06-29  9:37       ` Marc Zyngier
2020-06-24 19:57 ` [PATCH v2 05/17] irqchip/gic-v3: Describe the SGI range Marc Zyngier
2020-06-24 19:57   ` Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 06/17] irqchip/gic-v3: Configure SGIs as standard interrupts Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-25 18:25   ` Valentin Schneider
2020-06-25 18:25     ` Valentin Schneider
2020-06-30 10:15     ` Marc Zyngier
2020-06-30 10:15       ` Marc Zyngier
2020-07-02 13:23       ` Valentin Schneider
2020-07-02 13:23         ` Valentin Schneider
2020-07-02 13:48         ` Marc Zyngier
2020-07-02 13:48           ` Marc Zyngier
2020-07-02 14:24           ` Valentin Schneider
2020-07-02 14:24             ` Valentin Schneider
2020-06-24 19:58 ` [PATCH v2 07/17] irqchip/gic: Atomically update affinity Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-07-01 19:33   ` Sasha Levin
2020-07-01 19:33     ` Sasha Levin
2020-07-10 14:02   ` Sasha Levin
2020-07-10 14:02     ` Sasha Levin
2021-09-09 15:22   ` Geert Uytterhoeven
2021-09-09 15:22     ` Geert Uytterhoeven
2021-09-09 15:37     ` Russell King (Oracle)
2021-09-09 15:37       ` Russell King (Oracle)
2021-09-10 10:22     ` Marc Zyngier
2021-09-10 10:22       ` Marc Zyngier
2021-09-10 13:19       ` Geert Uytterhoeven
2021-09-10 13:19         ` Geert Uytterhoeven
2021-09-11  2:49         ` Magnus Damm
2021-09-11  2:49           ` Magnus Damm
2021-09-11 19:32           ` Marc Zyngier
2021-09-11 19:32             ` Marc Zyngier
2021-09-12  5:40             ` Magnus Damm
2021-09-12  5:40               ` Magnus Damm
2021-09-13  8:05               ` Geert Uytterhoeven
2021-09-13  8:05                 ` Geert Uytterhoeven
2021-09-15  3:28                 ` Magnus Damm
2021-09-15  3:28                   ` Magnus Damm
2021-09-22 13:53     ` [irqchip: irq/irqchip-fixes] irqchip/gic: Work around broken Renesas integration irqchip-bot for Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 08/17] irqchip/gic: Refactor SMP configuration Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 09/17] irqchip/gic: Configure SGIs as standard interrupts Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 10/17] irqchip/gic-common: Don't enable SGIs by default Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 11/17] irqchip/bcm2836: Configure mailbox interrupts as standard interrupts Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 12/17] irqchip/hip04: Configure IPIs " Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 13/17] irqchip/armada-370-xp: " Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 14/17] arm64: Kill __smp_cross_call and co Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-25 18:25   ` Valentin Schneider
2020-06-25 18:25     ` Valentin Schneider
2020-07-02 13:37     ` Marc Zyngier
2020-07-02 13:37       ` Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 15/17] arm64: Remove custom IRQ stat accounting Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-25 18:26   ` Valentin Schneider
2020-06-25 18:26     ` Valentin Schneider
2020-06-26 11:58     ` Marc Zyngier
2020-06-26 11:58       ` Marc Zyngier
2020-06-26 23:15       ` Valentin Schneider
2020-06-26 23:15         ` Valentin Schneider
2020-06-27 11:42         ` Marc Zyngier
2020-06-27 11:42           ` Marc Zyngier
2020-07-10 19:58   ` Valentin Schneider
2020-07-10 19:58     ` Valentin Schneider
2020-06-24 19:58 ` [PATCH v2 16/17] ARM: Kill __smp_cross_call and co Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 17/17] ARM: Remove custom IRQ stat accounting Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-25 18:24 ` [PATCH v2 00/17] arm/arm64: Turning IPIs into normal interrupts Valentin Schneider
2020-06-25 18:24   ` Valentin Schneider
2020-07-10 19:58   ` Valentin Schneider
2020-07-10 19:58     ` Valentin Schneider
2020-08-11 13:15 ` Sumit Garg
2020-08-11 13:15   ` Sumit Garg
2020-08-11 13:58   ` Marc Zyngier
2020-08-11 13:58     ` Marc Zyngier

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=jhjk0zvgfz7.mognet@arm.com \
    --to=valentin.schneider@arm.com \
    --cc=andrew@lunn.ch \
    --cc=catalin.marinas@arm.com \
    --cc=f.fainelli@gmail.com \
    --cc=gregory.clement@bootlin.com \
    --cc=jason@lakedaemon.net \
    --cc=kernel-team@android.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux@arm.linux.org.uk \
    --cc=maz@kernel.org \
    --cc=sumit.garg@linaro.org \
    --cc=tglx@linutronix.de \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.