Re: [PATCH v8 1/2] ASoC: sunxi: Add Allwinner H6 Digital MIC driver

From: Samuel Holland <samuel@sholland.org>
To: 班涛 <fengzheng923@gmail.com>
Cc: alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org,
	tiwai@suse.com, jernej.skrabec@gmail.com, lgirdwood@gmail.com,
	wens@csie.org, broonie@kernel.org, linux-sunxi@lists.linux.dev,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v8 1/2] ASoC: sunxi: Add Allwinner H6 Digital MIC driver
Date: Thu, 25 Aug 2022 22:35:33 -0500	[thread overview]
Message-ID: <b36262df-9324-6cd3-b74c-5b93840dabb0@sholland.org> (raw)
In-Reply-To: <CAE=m618gz8mzRnvX-w6fpNmTc=5Bd0KTKeR1NvpNZkbj29=ayg@mail.gmail.com>

On 8/23/22 10:08 AM, 班涛 wrote:
> Samuel Holland <samuel@sholland.org> 于2022年8月20 日周六 14:57写道：
>     On 8/11/22 9:49 AM, Ban Tao wrote:
>     > +     switch (params_format(params)) {
>     > +     case SNDRV_PCM_FORMAT_S16_LE:
>     > +             regmap_update_bits(host->regmap, SUN50I_DMIC_RXFIFO_CTL,
>     > +                                SUN50I_DMIC_RXFIFO_CTL_SAMPLE_MASK,
>     > +                                SUN50I_DMIC_RXFIFO_CTL_SAMPLE_16);
>     > +             break;
>     > +     case SNDRV_PCM_FORMAT_S24_LE:
>     > +             regmap_update_bits(host->regmap, SUN50I_DMIC_RXFIFO_CTL,
>     > +                                SUN50I_DMIC_RXFIFO_CTL_SAMPLE_MASK,
>     > +                                SUN50I_DMIC_RXFIFO_CTL_SAMPLE_24);
>     > +             break;
>     > +     default:
>     > +             dev_err(cpu_dai->dev, "Invalid format!\n");
>     > +             return -EINVAL;
>     > +     }
>     > +     regmap_update_bits(host->regmap, SUN50I_DMIC_RXFIFO_CTL,
>     > +                        SUN50I_DMIC_RXFIFO_CTL_MODE_MASK,
>     > +                        SUN50I_DMIC_RXFIFO_CTL_MODE_MSB);
> 
>     I checked the manuals again, and I may have given you bad information. There
>     appear to be two variants of the DMIC hardware.
> 
>     A63, H6, V5 V100, and V5x6 manuals list Mode 1 as "reserved" for a 24-bit sample
>     resolution. The newer SoCs (A50, A133, D1, H616, and R329) describe Mode 1 as
>     extending the 21-bit sample with three zeros at the LSB to make 24 bits, which
>     is what we want.
> 
>     On my D1 board, recording in S24_LE gives me good audio data, with equivalent
>     loudness to S16_LE, as I would expect. If this also works on older SoCs like H6,
>     then the manual is wrong, and the driver is fine.
> 
>  
> I checked the H6 manual, DMIC also supports 24bits. The H6 SoC works fine in
> mode 1. I don't know where your manual came from, mine is provided by SUNXI. 

I am referencing the manual linked from the linux-sunxi wiki, section 7.4.5.7:

https://linux-sunxi.org/images/4/46/Allwinner_H6_V200_User_Manual_V1.1.pdf

    For 24-bit received audio sample:
    Mode 0: RXDATA[31:0] = {FIFO_O[23:0], 8'h0}
    Mode 1: Reserved

Since the manual is wrong, could you please add a comment? Something like "The
hardware supports FIFO mode 1 for 24-bit samples, even though the H6 manual
describes that combination as reserved."

Regards,
Samuel