* [PATCH] drm/amdgpu: use ratelimited print in sdma4 interrupt
@ 2021-04-15 6:11 Feifei Xu
2021-04-15 15:40 ` Russell, Kent
2021-04-16 6:49 ` Zhang, Hawking
0 siblings, 2 replies; 3+ messages in thread
From: Feifei Xu @ 2021-04-15 6:11 UTC (permalink / raw)
To: amd-gfx; +Cc: Feifei Xu
dev_*_ratelimited printing will avoid dmesg flush.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 06247ad454b6..1bc5292ebb33 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -2218,7 +2218,7 @@ static int sdma_v4_0_print_iv_entry(struct amdgpu_device *adev,
instance = sdma_v4_0_irq_id_to_seq(entry->client_id);
if (instance < 0 || instance >= adev->sdma.num_instances) {
- dev_err(adev->dev, "sdma instance invalid %d\n", instance);
+ dev_err_ratelimited(adev->dev, "sdma instance invalid %d\n", instance);
return -EINVAL;
}
@@ -2228,7 +2228,7 @@ static int sdma_v4_0_print_iv_entry(struct amdgpu_device *adev,
memset(&task_info, 0, sizeof(struct amdgpu_task_info));
amdgpu_vm_get_task_info(adev, entry->pasid, &task_info);
- dev_info(adev->dev,
+ dev_info_ratelimited(adev->dev,
"[sdma%d] address:0x%016llx src_id:%u ring:%u vmid:%u "
"pasid:%u, for process %s pid %d thread %s pid %d\n",
instance, addr, entry->src_id, entry->ring_id, entry->vmid,
@@ -2241,7 +2241,7 @@ static int sdma_v4_0_process_vm_hole_irq(struct amdgpu_device *adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry)
{
- dev_err(adev->dev, "MC or SEM address in VM hole\n");
+ dev_err_ratelimited(adev->dev, "MC or SEM address in VM hole\n");
sdma_v4_0_print_iv_entry(adev, entry);
return 0;
}
@@ -2250,7 +2250,8 @@ static int sdma_v4_0_process_doorbell_invalid_irq(struct amdgpu_device *adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry)
{
- dev_err(adev->dev, "SDMA received a doorbell from BIF with byte_enable !=0xff\n");
+
+ dev_err_ratelimited(adev->dev, "SDMA received a doorbell from BIF with byte_enable !=0xff\n");
sdma_v4_0_print_iv_entry(adev, entry);
return 0;
}
@@ -2259,7 +2260,7 @@ static int sdma_v4_0_process_pool_timeout_irq(struct amdgpu_device *adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry)
{
- dev_err(adev->dev,
+ dev_err_ratelimited(adev->dev,
"Polling register/memory timeout executing POLL_REG/MEM with finite timer\n");
sdma_v4_0_print_iv_entry(adev, entry);
return 0;
@@ -2269,7 +2270,7 @@ static int sdma_v4_0_process_srbm_write_irq(struct amdgpu_device *adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry)
{
- dev_err(adev->dev,
+ dev_err_ratelimited(adev->dev,
"SDMA gets an Register Write SRBM_WRITE command in non-privilege command buffer\n");
sdma_v4_0_print_iv_entry(adev, entry);
return 0;
--
2.25.1
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^ permalink raw reply related [flat|nested] 3+ messages in thread* RE: [PATCH] drm/amdgpu: use ratelimited print in sdma4 interrupt
2021-04-15 6:11 [PATCH] drm/amdgpu: use ratelimited print in sdma4 interrupt Feifei Xu
@ 2021-04-15 15:40 ` Russell, Kent
2021-04-16 6:49 ` Zhang, Hawking
1 sibling, 0 replies; 3+ messages in thread
From: Russell, Kent @ 2021-04-15 15:40 UTC (permalink / raw)
To: Xu, Feifei, amd-gfx; +Cc: Xu, Feifei
[AMD Public Use]
Acked-by: Kent Russell <kent.russell@amd.com>
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Feifei Xu
> Sent: Thursday, April 15, 2021 2:11 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Xu, Feifei <Feifei.Xu@amd.com>
> Subject: [PATCH] drm/amdgpu: use ratelimited print in sdma4 interrupt
>
> dev_*_ratelimited printing will avoid dmesg flush.
>
> Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 13 +++++++------
> 1 file changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> index 06247ad454b6..1bc5292ebb33 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> @@ -2218,7 +2218,7 @@ static int sdma_v4_0_print_iv_entry(struct amdgpu_device
> *adev,
>
> instance = sdma_v4_0_irq_id_to_seq(entry->client_id);
> if (instance < 0 || instance >= adev->sdma.num_instances) {
> - dev_err(adev->dev, "sdma instance invalid %d\n", instance);
> + dev_err_ratelimited(adev->dev, "sdma instance invalid %d\n", instance);
> return -EINVAL;
> }
>
> @@ -2228,7 +2228,7 @@ static int sdma_v4_0_print_iv_entry(struct amdgpu_device
> *adev,
> memset(&task_info, 0, sizeof(struct amdgpu_task_info));
> amdgpu_vm_get_task_info(adev, entry->pasid, &task_info);
>
> - dev_info(adev->dev,
> + dev_info_ratelimited(adev->dev,
> "[sdma%d] address:0x%016llx src_id:%u ring:%u vmid:%u "
> "pasid:%u, for process %s pid %d thread %s pid %d\n",
> instance, addr, entry->src_id, entry->ring_id, entry->vmid,
> @@ -2241,7 +2241,7 @@ static int sdma_v4_0_process_vm_hole_irq(struct
> amdgpu_device *adev,
> struct amdgpu_irq_src *source,
> struct amdgpu_iv_entry *entry)
> {
> - dev_err(adev->dev, "MC or SEM address in VM hole\n");
> + dev_err_ratelimited(adev->dev, "MC or SEM address in VM hole\n");
> sdma_v4_0_print_iv_entry(adev, entry);
> return 0;
> }
> @@ -2250,7 +2250,8 @@ static int sdma_v4_0_process_doorbell_invalid_irq(struct
> amdgpu_device *adev,
> struct amdgpu_irq_src *source,
> struct amdgpu_iv_entry *entry)
> {
> - dev_err(adev->dev, "SDMA received a doorbell from BIF with byte_enable
> !=0xff\n");
> +
> + dev_err_ratelimited(adev->dev, "SDMA received a doorbell from BIF with
> byte_enable !=0xff\n");
> sdma_v4_0_print_iv_entry(adev, entry);
> return 0;
> }
> @@ -2259,7 +2260,7 @@ static int sdma_v4_0_process_pool_timeout_irq(struct
> amdgpu_device *adev,
> struct amdgpu_irq_src *source,
> struct amdgpu_iv_entry *entry)
> {
> - dev_err(adev->dev,
> + dev_err_ratelimited(adev->dev,
> "Polling register/memory timeout executing POLL_REG/MEM with finite
> timer\n");
> sdma_v4_0_print_iv_entry(adev, entry);
> return 0;
> @@ -2269,7 +2270,7 @@ static int sdma_v4_0_process_srbm_write_irq(struct
> amdgpu_device *adev,
> struct amdgpu_irq_src *source,
> struct amdgpu_iv_entry *entry)
> {
> - dev_err(adev->dev,
> + dev_err_ratelimited(adev->dev,
> "SDMA gets an Register Write SRBM_WRITE command in non-privilege
> command buffer\n");
> sdma_v4_0_print_iv_entry(adev, entry);
> return 0;
> --
> 2.25.1
>
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^ permalink raw reply [flat|nested] 3+ messages in thread* RE: [PATCH] drm/amdgpu: use ratelimited print in sdma4 interrupt
2021-04-15 6:11 [PATCH] drm/amdgpu: use ratelimited print in sdma4 interrupt Feifei Xu
2021-04-15 15:40 ` Russell, Kent
@ 2021-04-16 6:49 ` Zhang, Hawking
1 sibling, 0 replies; 3+ messages in thread
From: Zhang, Hawking @ 2021-04-16 6:49 UTC (permalink / raw)
To: Xu, Feifei, amd-gfx; +Cc: Xu, Feifei
[AMD Public Use]
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Regards,
Hawking
-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Feifei Xu
Sent: Thursday, April 15, 2021 14:11
To: amd-gfx@lists.freedesktop.org
Cc: Xu, Feifei <Feifei.Xu@amd.com>
Subject: [PATCH] drm/amdgpu: use ratelimited print in sdma4 interrupt
dev_*_ratelimited printing will avoid dmesg flush.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 06247ad454b6..1bc5292ebb33 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -2218,7 +2218,7 @@ static int sdma_v4_0_print_iv_entry(struct amdgpu_device *adev,
instance = sdma_v4_0_irq_id_to_seq(entry->client_id);
if (instance < 0 || instance >= adev->sdma.num_instances) {
- dev_err(adev->dev, "sdma instance invalid %d\n", instance);
+ dev_err_ratelimited(adev->dev, "sdma instance invalid %d\n",
+instance);
return -EINVAL;
}
@@ -2228,7 +2228,7 @@ static int sdma_v4_0_print_iv_entry(struct amdgpu_device *adev,
memset(&task_info, 0, sizeof(struct amdgpu_task_info));
amdgpu_vm_get_task_info(adev, entry->pasid, &task_info);
- dev_info(adev->dev,
+ dev_info_ratelimited(adev->dev,
"[sdma%d] address:0x%016llx src_id:%u ring:%u vmid:%u "
"pasid:%u, for process %s pid %d thread %s pid %d\n",
instance, addr, entry->src_id, entry->ring_id, entry->vmid, @@ -2241,7 +2241,7 @@ static int sdma_v4_0_process_vm_hole_irq(struct amdgpu_device *adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry) {
- dev_err(adev->dev, "MC or SEM address in VM hole\n");
+ dev_err_ratelimited(adev->dev, "MC or SEM address in VM hole\n");
sdma_v4_0_print_iv_entry(adev, entry);
return 0;
}
@@ -2250,7 +2250,8 @@ static int sdma_v4_0_process_doorbell_invalid_irq(struct amdgpu_device *adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry) {
- dev_err(adev->dev, "SDMA received a doorbell from BIF with byte_enable !=0xff\n");
+
+ dev_err_ratelimited(adev->dev, "SDMA received a doorbell from BIF with
+byte_enable !=0xff\n");
sdma_v4_0_print_iv_entry(adev, entry);
return 0;
}
@@ -2259,7 +2260,7 @@ static int sdma_v4_0_process_pool_timeout_irq(struct amdgpu_device *adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry) {
- dev_err(adev->dev,
+ dev_err_ratelimited(adev->dev,
"Polling register/memory timeout executing POLL_REG/MEM with finite timer\n");
sdma_v4_0_print_iv_entry(adev, entry);
return 0;
@@ -2269,7 +2270,7 @@ static int sdma_v4_0_process_srbm_write_irq(struct amdgpu_device *adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry) {
- dev_err(adev->dev,
+ dev_err_ratelimited(adev->dev,
"SDMA gets an Register Write SRBM_WRITE command in non-privilege command buffer\n");
sdma_v4_0_print_iv_entry(adev, entry);
return 0;
--
2.25.1
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