* [PATCH] drm/komeda: Correct d71 register block counting
@ 2019-12-10 6:10 james qian wang (Arm Technology China)
2019-12-11 17:30 ` Mihail Atanassov
0 siblings, 1 reply; 2+ messages in thread
From: james qian wang (Arm Technology China) @ 2019-12-10 6:10 UTC (permalink / raw)
To: Mihail Atanassov
Cc: Lowry Li (Arm Technology China),
Oscar Zhang (Arm Technology China),
Tiannan Zhu (Arm Technology China),
Jonathan Chai (Arm Technology China),
linux-kernel, dri-devel, Channing Chen (Arm Technology China),
james qian wang (Arm Technology China),
nd, Ben Davis
Per HW, d71->num_blocks includes reserved blocks but no PERIPH block,
correct the block counting accordingly.
D71 happens to only have one reserved block and periph block, which
hides this counting error.
Signed-off-by: james qian wang (Arm Technology China) <james.qian.wang@arm.com>
---
drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
index 822b23a1ce75..d53f95dea0a1 100644
--- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
+++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
@@ -414,8 +414,11 @@ static int d71_enum_resources(struct komeda_dev *mdev)
d71->pipes[i] = to_d71_pipeline(pipe);
}
- /* loop the register blks and probe */
- i = 2; /* exclude GCU and PERIPH */
+ /* loop the register blks and probe.
+ * NOTE: d71->num_blocks includes reserved blocks.
+ * d71->num_blocks = GCU + valid blocks + reserved blocks
+ */
+ i = 1; /* exclude GCU */
offset = D71_BLOCK_SIZE; /* skip GCU */
while (i < d71->num_blocks) {
blk_base = mdev->reg_base + (offset >> 2);
@@ -425,9 +428,9 @@ static int d71_enum_resources(struct komeda_dev *mdev)
err = d71_probe_block(d71, &blk, blk_base);
if (err)
goto err_cleanup;
- i++;
}
+ i++;
offset += D71_BLOCK_SIZE;
}
--
2.20.1
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^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] drm/komeda: Correct d71 register block counting
2019-12-10 6:10 [PATCH] drm/komeda: Correct d71 register block counting james qian wang (Arm Technology China)
@ 2019-12-11 17:30 ` Mihail Atanassov
0 siblings, 0 replies; 2+ messages in thread
From: Mihail Atanassov @ 2019-12-11 17:30 UTC (permalink / raw)
To: james qian wang (Arm Technology China)
Cc: nd, Oscar Zhang (Arm Technology China),
Tiannan Zhu (Arm Technology China),
Jonathan Chai (Arm Technology China),
linux-kernel, dri-devel, Channing Chen (Arm Technology China),
Lowry Li (Arm Technology China),
Ben Davis
On Tuesday, 10 December 2019 06:10:34 GMT james qian wang (Arm Technology China) wrote:
> Per HW, d71->num_blocks includes reserved blocks but no PERIPH block,
> correct the block counting accordingly.
> D71 happens to only have one reserved block and periph block, which
> hides this counting error.
>
> Signed-off-by: james qian wang (Arm Technology China) <james.qian.wang@arm.com>
> ---
> drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> index 822b23a1ce75..d53f95dea0a1 100644
> --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> @@ -414,8 +414,11 @@ static int d71_enum_resources(struct komeda_dev *mdev)
> d71->pipes[i] = to_d71_pipeline(pipe);
> }
>
> - /* loop the register blks and probe */
> - i = 2; /* exclude GCU and PERIPH */
> + /* loop the register blks and probe.
> + * NOTE: d71->num_blocks includes reserved blocks.
> + * d71->num_blocks = GCU + valid blocks + reserved blocks
> + */
> + i = 1; /* exclude GCU */
> offset = D71_BLOCK_SIZE; /* skip GCU */
> while (i < d71->num_blocks) {
> blk_base = mdev->reg_base + (offset >> 2);
> @@ -425,9 +428,9 @@ static int d71_enum_resources(struct komeda_dev *mdev)
> err = d71_probe_block(d71, &blk, blk_base);
> if (err)
> goto err_cleanup;
> - i++;
> }
>
> + i++;
> offset += D71_BLOCK_SIZE;
> }
>
>
Reviewed-by: Mihail Atanassov <mihail.atanassov@arm.com>
--
Mihail
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