From: Maxime Ripard <maxime@cerno.tech>
To: Mark Rutland <mark.rutland@arm.com>,
Rob Herring <robh+dt@kernel.org>,
Frank Rowand <frowand.list@gmail.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Sean Paul <seanpaul@chromium.org>,
Maxime Ripard <mripard@kernel.org>
Cc: Paul Kocialkowski <paul.kocialkowski@bootlin.com>,
Chen-Yu Tsai <wens@csie.org>,
linux-arm-kernel@lists.infradead.org,
dri-devel@lists.freedesktop.org,
Maxime Ripard <maxime@cerno.tech>
Subject: [PATCH v3 2/4] clk: sunxi: a31: Export the MIPI PLL
Date: Fri, 3 Jan 2020 16:27:59 +0100 [thread overview]
Message-ID: <20200103152801.47254-2-maxime@cerno.tech> (raw)
In-Reply-To: <20200103152801.47254-1-maxime@cerno.tech>
The MIPI PLL is used for LVDS. Make sure it's exported in the dt bindings
headers.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
drivers/clk/sunxi-ng/ccu-sun6i-a31.h | 4 +++-
include/dt-bindings/clock/sun6i-a31-ccu.h | 2 ++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun6i-a31.h b/drivers/clk/sunxi-ng/ccu-sun6i-a31.h
index a361388b4670..3ed2a59b0dc6 100644
--- a/drivers/clk/sunxi-ng/ccu-sun6i-a31.h
+++ b/drivers/clk/sunxi-ng/ccu-sun6i-a31.h
@@ -32,7 +32,9 @@
/* The PLL_VIDEO1_2X clock is exported */
#define CLK_PLL_GPU 14
-#define CLK_PLL_MIPI 15
+
+/* The PLL_VIDEO1_2X clock is exported */
+
#define CLK_PLL9 16
#define CLK_PLL10 17
diff --git a/include/dt-bindings/clock/sun6i-a31-ccu.h b/include/dt-bindings/clock/sun6i-a31-ccu.h
index c5d13340184a..39878d9dce9f 100644
--- a/include/dt-bindings/clock/sun6i-a31-ccu.h
+++ b/include/dt-bindings/clock/sun6i-a31-ccu.h
@@ -49,6 +49,8 @@
#define CLK_PLL_VIDEO1_2X 13
+#define CLK_PLL_MIPI 15
+
#define CLK_CPU 18
#define CLK_AHB1_MIPIDSI 23
--
2.24.1
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next prev parent reply other threads:[~2020-01-04 11:24 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-03 15:27 [PATCH v3 1/4] dt-bindings: display: Convert Allwinner display pipeline to schemas Maxime Ripard
2020-01-03 15:27 ` Maxime Ripard [this message]
2020-01-03 15:30 ` [PATCH v3 2/4] clk: sunxi: a31: Export the MIPI PLL Chen-Yu Tsai
2020-01-04 8:45 ` Maxime Ripard
2020-01-03 15:28 ` [PATCH v3 3/4] clk: sunxi: a23/a33: " Maxime Ripard
2020-01-03 15:30 ` Chen-Yu Tsai
2020-01-04 8:45 ` Maxime Ripard
2020-01-03 15:28 ` [PATCH v3 4/4] ARM: dts: sunxi: Add missing LVDS resets and clocks Maxime Ripard
2020-01-03 15:31 ` Chen-Yu Tsai
2020-01-04 9:51 ` Maxime Ripard
2020-01-09 10:03 ` [PATCH v3 1/4] dt-bindings: display: Convert Allwinner display pipeline to schemas Maxime Ripard
2020-01-09 17:14 ` Rob Herring
2020-01-09 18:16 ` Maxime Ripard
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