From: Maxime Ripard <maxime@cerno.tech>
To: Mark Rutland <mark.rutland@arm.com>,
Rob Herring <robh+dt@kernel.org>,
Frank Rowand <frowand.list@gmail.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Sean Paul <seanpaul@chromium.org>,
Maxime Ripard <mripard@kernel.org>
Cc: Paul Kocialkowski <paul.kocialkowski@bootlin.com>,
Chen-Yu Tsai <wens@csie.org>,
linux-arm-kernel@lists.infradead.org,
dri-devel@lists.freedesktop.org,
Maxime Ripard <maxime@cerno.tech>
Subject: [PATCH v3 4/4] ARM: dts: sunxi: Add missing LVDS resets and clocks
Date: Fri, 3 Jan 2020 16:28:01 +0100 [thread overview]
Message-ID: <20200103152801.47254-4-maxime@cerno.tech> (raw)
In-Reply-To: <20200103152801.47254-1-maxime@cerno.tech>
Some old SoCs, while supporting LVDS, don't list the LVDS clocks and reset
lines. Let's add them when relevant.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
arch/arm/boot/dts/sun6i-a31.dtsi | 23 +++++++++++++++--------
arch/arm/boot/dts/sun8i-a23-a33.dtsi | 12 ++++++++----
arch/arm/boot/dts/sun9i-a80.dtsi | 8 ++++++--
3 files changed, 29 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 4d622ec48b24..7762fbd9a133 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -286,14 +286,18 @@ tcon0: lcd-controller@1c0c000 {
reg = <0x01c0c000 0x1000>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma 11>;
- resets = <&ccu RST_AHB1_LCD0>;
- reset-names = "lcd";
+ resets = <&ccu RST_AHB1_LCD0>,
+ <&ccu RST_AHB1_LVDS>;
+ reset-names = "lcd",
+ "lvds";
clocks = <&ccu CLK_AHB1_LCD0>,
<&ccu CLK_LCD0_CH0>,
- <&ccu CLK_LCD0_CH1>;
+ <&ccu CLK_LCD0_CH1>,
+ <&ccu 15>;
clock-names = "ahb",
"tcon-ch0",
- "tcon-ch1";
+ "tcon-ch1",
+ "lvds-alt";
clock-output-names = "tcon0-pixel-clock";
#clock-cells = <0>;
@@ -336,14 +340,17 @@ tcon1: lcd-controller@1c0d000 {
reg = <0x01c0d000 0x1000>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma 12>;
- resets = <&ccu RST_AHB1_LCD1>;
- reset-names = "lcd";
+ resets = <&ccu RST_AHB1_LCD1>,
+ <&ccu RST_AHB1_LVDS>;
+ reset-names = "lcd", "lvds";
clocks = <&ccu CLK_AHB1_LCD1>,
<&ccu CLK_LCD1_CH0>,
- <&ccu CLK_LCD1_CH1>;
+ <&ccu CLK_LCD1_CH1>,
+ <&ccu 15>;
clock-names = "ahb",
"tcon-ch0",
- "tcon-ch1";
+ "tcon-ch1",
+ "lvds-alt";
clock-output-names = "tcon1-pixel-clock";
#clock-cells = <0>;
diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index 70ec3493061b..48487f6d4ab9 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -184,13 +184,17 @@ tcon0: lcd-controller@1c0c000 {
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma 12>;
clocks = <&ccu CLK_BUS_LCD>,
- <&ccu CLK_LCD_CH0>;
+ <&ccu CLK_LCD_CH0>,
+ <&ccu 13>;
clock-names = "ahb",
- "tcon-ch0";
+ "tcon-ch0",
+ "lvds-alt";
clock-output-names = "tcon-pixel-clock";
#clock-cells = <0>;
- resets = <&ccu RST_BUS_LCD>;
- reset-names = "lcd";
+ resets = <&ccu RST_BUS_LCD>,
+ <&ccu RST_BUS_LVDS>;
+ reset-names = "lcd",
+ "lvds";
status = "disabled";
ports {
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 3b533e85da43..ce4fa6706d06 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -878,8 +878,12 @@ tcon0: lcd-controller@3c00000 {
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_LCD0>, <&ccu CLK_LCD0>;
clock-names = "ahb", "tcon-ch0";
- resets = <&ccu RST_BUS_LCD0>, <&ccu RST_BUS_EDP>;
- reset-names = "lcd", "edp";
+ resets = <&ccu RST_BUS_LCD0>,
+ <&ccu RST_BUS_EDP>,
+ <&ccu RST_BUS_LVDS>;
+ reset-names = "lcd",
+ "edp",
+ "lvds";
clock-output-names = "tcon0-pixel-clock";
#clock-cells = <0>;
--
2.24.1
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next prev parent reply other threads:[~2020-01-04 11:24 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-03 15:27 [PATCH v3 1/4] dt-bindings: display: Convert Allwinner display pipeline to schemas Maxime Ripard
2020-01-03 15:27 ` [PATCH v3 2/4] clk: sunxi: a31: Export the MIPI PLL Maxime Ripard
2020-01-03 15:30 ` Chen-Yu Tsai
2020-01-04 8:45 ` Maxime Ripard
2020-01-03 15:28 ` [PATCH v3 3/4] clk: sunxi: a23/a33: " Maxime Ripard
2020-01-03 15:30 ` Chen-Yu Tsai
2020-01-04 8:45 ` Maxime Ripard
2020-01-03 15:28 ` Maxime Ripard [this message]
2020-01-03 15:31 ` [PATCH v3 4/4] ARM: dts: sunxi: Add missing LVDS resets and clocks Chen-Yu Tsai
2020-01-04 9:51 ` Maxime Ripard
2020-01-09 10:03 ` [PATCH v3 1/4] dt-bindings: display: Convert Allwinner display pipeline to schemas Maxime Ripard
2020-01-09 17:14 ` Rob Herring
2020-01-09 18:16 ` Maxime Ripard
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