[PATCH] drm/sun4i: Fix blend route/enable register corruption for DE2.0/DE3.0

[PATCH] drm/sun4i: Fix blend route/enable register corruption for DE2.0/DE3.0

[Roman Stratiienko]

By this commit 2 related issues are solved:

  Issue #1. Corruption in blend route/enable register:

Register corruption happens after using old_state->zpos to disable layer
state. Blend route/enable registers are shared with other layers
and other layers may have already assigned this PIPE to valid value.

Solution: Do not use old_state->zpos to disable the plane pipe in
blend registers.

  Issue #2. Remove disabled layer from blend route/enable registers:

Since sun4i/drm are using normalized_zpos, .atomic_update() will setup
blend route/enable pipes starting from PIPE0 to PIPEX, where X+1 is a
number of layers used by the CRTC in this frame.

Remaining pipes (PIPE[X+1] - PIPE[MAX]) can have old data that MUST be
updated.

new_state->normalized_zpos can't be used, since drm helpers won't update
it for disabled planes.

Solution:

1. Track the number of total used planes for crtc.
2. Use this number instead of zpos to disable unused blend pipes.

Signed-off-by: Roman Stratiienko <roman.o.stratiienko@globallogic.com>
---
 drivers/gpu/drm/sun4i/sun8i_mixer.h    |  2 +
 drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 60 +++++++++-----------------
 drivers/gpu/drm/sun4i/sun8i_ui_layer.h |  2 +
 drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 58 +++++++++----------------
 drivers/gpu/drm/sun4i/sun8i_vi_layer.h |  2 +
 5 files changed, 47 insertions(+), 77 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h
index 5b3fbee18671..ebfc276b2464 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.h
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h
@@ -177,6 +177,8 @@ struct sun8i_mixer {
 
 	struct clk			*bus_clk;
 	struct clk			*mod_clk;
+
+	int                             used_layers;
 };
 
 static inline struct sun8i_mixer *
diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c
index 7845c2a53a7f..ca79cb4d5c04 100644
--- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c
@@ -24,8 +24,7 @@
 #include "sun8i_ui_scaler.h"
 
 static void sun8i_ui_layer_enable(struct sun8i_mixer *mixer, int channel,
-				  int overlay, bool enable, unsigned int zpos,
-				  unsigned int old_zpos)
+				  int overlay, bool enable, unsigned int zpos)
 {
 	u32 val, bld_base, ch_base;
 
@@ -44,32 +43,18 @@ static void sun8i_ui_layer_enable(struct sun8i_mixer *mixer, int channel,
 			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay),
 			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN, val);
 
-	if (!enable || zpos != old_zpos) {
-		regmap_update_bits(mixer->engine.regs,
-				   SUN8I_MIXER_BLEND_PIPE_CTL(bld_base),
-				   SUN8I_MIXER_BLEND_PIPE_CTL_EN(old_zpos),
-				   0);
-
-		regmap_update_bits(mixer->engine.regs,
-				   SUN8I_MIXER_BLEND_ROUTE(bld_base),
-				   SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos),
-				   0);
-	}
-
-	if (enable) {
-		val = SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos);
+	val = SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos);
 
-		regmap_update_bits(mixer->engine.regs,
-				   SUN8I_MIXER_BLEND_PIPE_CTL(bld_base),
-				   val, val);
+	regmap_update_bits(mixer->engine.regs,
+			   SUN8I_MIXER_BLEND_PIPE_CTL(bld_base),
+			   val, enable ? val : 0);
 
-		val = channel << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(zpos);
+	val = channel << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(zpos);
 
-		regmap_update_bits(mixer->engine.regs,
-				   SUN8I_MIXER_BLEND_ROUTE(bld_base),
-				   SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(zpos),
-				   val);
-	}
+	regmap_update_bits(mixer->engine.regs,
+			   SUN8I_MIXER_BLEND_ROUTE(bld_base),
+			   SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(zpos),
+			   val);
 }
 
 static void sun8i_ui_layer_update_alpha(struct sun8i_mixer *mixer, int channel,
@@ -291,32 +276,29 @@ static int sun8i_ui_layer_atomic_check(struct drm_plane *plane,
 static void sun8i_ui_layer_atomic_disable(struct drm_plane *plane,
 					  struct drm_atomic_state *state)
 {
-	struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state,
-									   plane);
 	struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane);
-	unsigned int old_zpos = old_state->normalized_zpos;
 	struct sun8i_mixer *mixer = layer->mixer;
 
-	sun8i_ui_layer_enable(mixer, layer->channel, layer->overlay, false, 0,
-			      old_zpos);
+	if (layer->en_state) {
+		layer->en_state = false;
+		mixer->used_layers--;
+		sun8i_ui_layer_enable(mixer, layer->channel, layer->overlay, false,
+				      mixer->used_layers);
+	}
 }
 
 static void sun8i_ui_layer_atomic_update(struct drm_plane *plane,
 					 struct drm_atomic_state *state)
 {
-	struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state,
-									   plane);
 	struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
-									   plane);
+										plane);
 	struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane);
 	unsigned int zpos = new_state->normalized_zpos;
-	unsigned int old_zpos = old_state->normalized_zpos;
 	struct sun8i_mixer *mixer = layer->mixer;
 
-	if (!new_state->visible) {
-		sun8i_ui_layer_enable(mixer, layer->channel,
-				      layer->overlay, false, 0, old_zpos);
-		return;
+	if (!layer->en_state) {
+		layer->en_state = true;
+		mixer->used_layers++;
 	}
 
 	sun8i_ui_layer_update_coord(mixer, layer->channel,
@@ -328,7 +310,7 @@ static void sun8i_ui_layer_atomic_update(struct drm_plane *plane,
 	sun8i_ui_layer_update_buffer(mixer, layer->channel,
 				     layer->overlay, plane);
 	sun8i_ui_layer_enable(mixer, layer->channel, layer->overlay,
-			      true, zpos, old_zpos);
+			      true, zpos);
 }
 
 static const struct drm_plane_helper_funcs sun8i_ui_layer_helper_funcs = {
diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.h b/drivers/gpu/drm/sun4i/sun8i_ui_layer.h
index e3e32ee1178d..43c48cf7bc51 100644
--- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.h
+++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.h
@@ -53,6 +53,8 @@ struct sun8i_ui_layer {
 	struct sun8i_mixer	*mixer;
 	int			channel;
 	int			overlay;
+
+	bool			en_state;
 };
 
 static inline struct sun8i_ui_layer *
diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
index bb7c43036dfa..662ba1018cc4 100644
--- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
@@ -18,8 +18,7 @@
 #include "sun8i_vi_scaler.h"
 
 static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel,
-				  int overlay, bool enable, unsigned int zpos,
-				  unsigned int old_zpos)
+				  int overlay, bool enable, unsigned int zpos)
 {
 	u32 val, bld_base, ch_base;
 
@@ -38,32 +37,18 @@ static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel,
 			   SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay),
 			   SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN, val);
 
-	if (!enable || zpos != old_zpos) {
-		regmap_update_bits(mixer->engine.regs,
-				   SUN8I_MIXER_BLEND_PIPE_CTL(bld_base),
-				   SUN8I_MIXER_BLEND_PIPE_CTL_EN(old_zpos),
-				   0);
-
-		regmap_update_bits(mixer->engine.regs,
-				   SUN8I_MIXER_BLEND_ROUTE(bld_base),
-				   SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos),
-				   0);
-	}
+	val = SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos);
 
-	if (enable) {
-		val = SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos);
-
-		regmap_update_bits(mixer->engine.regs,
-				   SUN8I_MIXER_BLEND_PIPE_CTL(bld_base),
-				   val, val);
+	regmap_update_bits(mixer->engine.regs,
+			   SUN8I_MIXER_BLEND_PIPE_CTL(bld_base),
+			   val, enable ? val : 0);
 
-		val = channel << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(zpos);
+	val = channel << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(zpos);
 
-		regmap_update_bits(mixer->engine.regs,
-				   SUN8I_MIXER_BLEND_ROUTE(bld_base),
-				   SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(zpos),
-				   val);
-	}
+	regmap_update_bits(mixer->engine.regs,
+			   SUN8I_MIXER_BLEND_ROUTE(bld_base),
+			   SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(zpos),
+			   val);
 }
 
 static void sun8i_vi_layer_update_alpha(struct sun8i_mixer *mixer, int channel,
@@ -395,32 +380,29 @@ static int sun8i_vi_layer_atomic_check(struct drm_plane *plane,
 static void sun8i_vi_layer_atomic_disable(struct drm_plane *plane,
 					  struct drm_atomic_state *state)
 {
-	struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state,
-									   plane);
 	struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane);
-	unsigned int old_zpos = old_state->normalized_zpos;
 	struct sun8i_mixer *mixer = layer->mixer;
 
-	sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, false, 0,
-			      old_zpos);
+	if (layer->en_state) {
+		layer->en_state = false;
+		mixer->used_layers--;
+		sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, false,
+				      mixer->used_layers);
+	}
 }
 
 static void sun8i_vi_layer_atomic_update(struct drm_plane *plane,
 					 struct drm_atomic_state *state)
 {
-	struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state,
-									   plane);
 	struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
 									   plane);
 	struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane);
 	unsigned int zpos = new_state->normalized_zpos;
-	unsigned int old_zpos = old_state->normalized_zpos;
 	struct sun8i_mixer *mixer = layer->mixer;
 
-	if (!new_state->visible) {
-		sun8i_vi_layer_enable(mixer, layer->channel,
-				      layer->overlay, false, 0, old_zpos);
-		return;
+	if (!layer->en_state) {
+		layer->en_state = true;
+		mixer->used_layers++;
 	}
 
 	sun8i_vi_layer_update_coord(mixer, layer->channel,
@@ -432,7 +414,7 @@ static void sun8i_vi_layer_atomic_update(struct drm_plane *plane,
 	sun8i_vi_layer_update_buffer(mixer, layer->channel,
 				     layer->overlay, plane);
 	sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay,
-			      true, zpos, old_zpos);
+			      true, zpos);
 }
 
 static const struct drm_plane_helper_funcs sun8i_vi_layer_helper_funcs = {
diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.h b/drivers/gpu/drm/sun4i/sun8i_vi_layer.h
index 48c399e1c86d..9939a4cc7a52 100644
--- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.h
+++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.h
@@ -58,6 +58,8 @@ struct sun8i_vi_layer {
 	struct sun8i_mixer	*mixer;
 	int			channel;
 	int			overlay;
+
+	bool			en_state;
 };
 
 static inline struct sun8i_vi_layer *
-- 
2.30.2

Re: [PATCH] drm/sun4i: Fix blend route/enable register corruption for DE2.0/DE3.0

[Maxime Ripard]

Hi Roman,

On Wed, May 25, 2022 at 11:54:45AM +0000, Roman Stratiienko wrote:
> By this commit 2 related issues are solved:
> 
>   Issue #1. Corruption in blend route/enable register:
> 
> Register corruption happens after using old_state->zpos to disable layer
> state. Blend route/enable registers are shared with other layers
> and other layers may have already assigned this PIPE to valid value.
> 
> Solution: Do not use old_state->zpos to disable the plane pipe in
> blend registers.
> 
>   Issue #2. Remove disabled layer from blend route/enable registers:
> 
> Since sun4i/drm are using normalized_zpos, .atomic_update() will setup
> blend route/enable pipes starting from PIPE0 to PIPEX, where X+1 is a
> number of layers used by the CRTC in this frame.
> 
> Remaining pipes (PIPE[X+1] - PIPE[MAX]) can have old data that MUST be
> updated.
> 
> new_state->normalized_zpos can't be used, since drm helpers won't update
> it for disabled planes.
> 
> Solution:
> 
> 1. Track the number of total used planes for crtc.
> 2. Use this number instead of zpos to disable unused blend pipes.
> 
> Signed-off-by: Roman Stratiienko <roman.o.stratiienko@globallogic.com>

If there's two issues, and two solutions, it should be two patches.

Maxime

Re: [PATCH] drm/sun4i: Fix blend route/enable register corruption for DE2.0/DE3.0

[Roman Stratiienko]

Hi Maxime,

пн, 30 мая 2022 г. в 16:22, Maxime Ripard <maxime@cerno.tech>:
>
> Hi Roman,
>
> On Wed, May 25, 2022 at 11:54:45AM +0000, Roman Stratiienko wrote:
> > By this commit 2 related issues are solved:
> >
> >   Issue #1. Corruption in blend route/enable register:
> >
> > Register corruption happens after using old_state->zpos to disable layer
> > state. Blend route/enable registers are shared with other layers
> > and other layers may have already assigned this PIPE to valid value.
> >
> > Solution: Do not use old_state->zpos to disable the plane pipe in
> > blend registers.
> >
> >   Issue #2. Remove disabled layer from blend route/enable registers:
> >
> > Since sun4i/drm are using normalized_zpos, .atomic_update() will setup
> > blend route/enable pipes starting from PIPE0 to PIPEX, where X+1 is a
> > number of layers used by the CRTC in this frame.
> >
> > Remaining pipes (PIPE[X+1] - PIPE[MAX]) can have old data that MUST be
> > updated.
> >
> > new_state->normalized_zpos can't be used, since drm helpers won't update
> > it for disabled planes.
> >
> > Solution:
> >
> > 1. Track the number of total used planes for crtc.
> > 2. Use this number instead of zpos to disable unused blend pipes.
> >
> > Signed-off-by: Roman Stratiienko <roman.o.stratiienko@globallogic.com>
>
> If there's two issues, and two solutions, it should be two patches.

I would say.. It's a single complex issue.
Solving one part without solving another will make things only worse.

>
> Maxime