* [PATCH v3 0/4] Fix up the boe-tv101wum-nl6 panel driver
@ 2023-07-03 13:21 Linus Walleij
2023-07-03 13:21 ` [PATCH v3 1/4] drm/panel: boe-tv101wum-nl6: Drop macros and open code sequences Linus Walleij
` (5 more replies)
0 siblings, 6 replies; 19+ messages in thread
From: Linus Walleij @ 2023-07-03 13:21 UTC (permalink / raw)
To: Ruihai Zhou, Stephen Boyd, Douglas Anderson, Cong Yang,
Jitao Shi, Neil Armstrong, Sam Ravnborg, David Airlie,
Daniel Vetter
Cc: linux-kernel, dri-devel
This is two patches fixing things I would normally complain about
in reviews, but alas I missed this one, so I go in and fix it up
myself.
Discovering that a completely unrelated driver has been merged
into this panel driver I had to bite the bullet and break it out.
I am pretty suspicious of the other recently added panel as well.
I am surprised that contributors from manufacturers do not seem
to have datasheets for the display controllers embedded in the
panels of their products. Can you take a second look?
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
Changes in v3:
- Rebase on drm-misc-next
- Convert the two newly added Starry panels as well.
- Break out the obvious ILI9882t-based panel into its own driver.
- Link to v2: https://lore.kernel.org/r/20230615-fix-boe-tv101wum-nl6-v2-0-457d7ece4590@linaro.org
Changes in v2:
- Fix a missed static keyword
- Link to v1: https://lore.kernel.org/r/20230615-fix-boe-tv101wum-nl6-v1-0-8ac378405fb7@linaro.org
---
Linus Walleij (4):
drm/panel: boe-tv101wum-nl6: Drop macros and open code sequences
drm/panel: boe-tv101wum-nl6: Drop surplus prepare tracking
drm/panel: ili9882t: Break out as separate driver
drm/panel: ili9882t: Break out function for switching page
drivers/gpu/drm/panel/Kconfig | 9 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 3037 ++++++++++--------------
drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 759 ++++++
4 files changed, 2067 insertions(+), 1739 deletions(-)
---
base-commit: 14806c6415820b1c4bc317655c40784d050a2edb
change-id: 20230615-fix-boe-tv101wum-nl6-6aa3fab22b44
Best regards,
--
Linus Walleij <linus.walleij@linaro.org>
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH v3 1/4] drm/panel: boe-tv101wum-nl6: Drop macros and open code sequences
2023-07-03 13:21 [PATCH v3 0/4] Fix up the boe-tv101wum-nl6 panel driver Linus Walleij
@ 2023-07-03 13:21 ` Linus Walleij
2023-07-06 21:11 ` Doug Anderson
2023-07-03 13:21 ` [PATCH v3 2/4] drm/panel: boe-tv101wum-nl6: Drop surplus prepare tracking Linus Walleij
` (4 subsequent siblings)
5 siblings, 1 reply; 19+ messages in thread
From: Linus Walleij @ 2023-07-03 13:21 UTC (permalink / raw)
To: Ruihai Zhou, Stephen Boyd, Douglas Anderson, Cong Yang,
Jitao Shi, Neil Armstrong, Sam Ravnborg, David Airlie,
Daniel Vetter
Cc: linux-kernel, dri-devel
The boe-tv101wum-nl6 is reinventing the mechanism to send command
sequences that we usually nix during review, but I missed this one
so fixing it up myself.
Also use the explicit function calls to mipi_dsi_dcs_exit_sleep_mode()
and mipi_dsi_dcs_set_display_on() instead of reimplementing them
with homegrown sequences.
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v2->v3:
- Convert the two newly added Starry displays as well.
---
drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 3351 ++++++++++++------------
1 file changed, 1654 insertions(+), 1697 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index 3cc9fb0d4f5d..6fd4c9507c88 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -33,7 +33,7 @@ struct panel_desc {
unsigned long mode_flags;
enum mipi_dsi_pixel_format format;
- const struct panel_init_cmd *init_cmds;
+ int (*init)(struct mipi_dsi_device *dsi);
unsigned int lanes;
bool discharge_on_disable;
bool lp11_before_reset;
@@ -55,1706 +55,1661 @@ struct boe_panel {
bool prepared;
};
-enum dsi_cmd_type {
- INIT_DCS_CMD,
- DELAY_CMD,
-};
+static int boe_tv110c9m_init(struct mipi_dsi_device *dsi)
+{
+ int ret;
-struct panel_init_cmd {
- enum dsi_cmd_type type;
- size_t len;
- const char *data;
-};
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x20);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x05, 0xD9);
+ mipi_dsi_dcs_write_seq(dsi, 0x07, 0x78);
+ mipi_dsi_dcs_write_seq(dsi, 0x08, 0x5A);
+ mipi_dsi_dcs_write_seq(dsi, 0x0D, 0x63);
+ mipi_dsi_dcs_write_seq(dsi, 0x0E, 0x91);
+ mipi_dsi_dcs_write_seq(dsi, 0x0F, 0x73);
+ mipi_dsi_dcs_write_seq(dsi, 0x95, 0xE6);
+ mipi_dsi_dcs_write_seq(dsi, 0x96, 0xF0);
+ mipi_dsi_dcs_write_seq(dsi, 0x30, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x6D, 0x66);
+ mipi_dsi_dcs_write_seq(dsi, 0x75, 0xA2);
+ mipi_dsi_dcs_write_seq(dsi, 0x77, 0x3B);
-#define _INIT_DCS_CMD(...) { \
- .type = INIT_DCS_CMD, \
- .len = sizeof((char[]){__VA_ARGS__}), \
- .data = (char[]){__VA_ARGS__} }
-
-#define _INIT_DELAY_CMD(...) { \
- .type = DELAY_CMD,\
- .len = sizeof((char[]){__VA_ARGS__}), \
- .data = (char[]){__VA_ARGS__} }
-
-static const struct panel_init_cmd boe_tv110c9m_init_cmd[] = {
- _INIT_DCS_CMD(0xFF, 0x20),
- _INIT_DCS_CMD(0xFB, 0x01),
- _INIT_DCS_CMD(0x05, 0xD9),
- _INIT_DCS_CMD(0x07, 0x78),
- _INIT_DCS_CMD(0x08, 0x5A),
- _INIT_DCS_CMD(0x0D, 0x63),
- _INIT_DCS_CMD(0x0E, 0x91),
- _INIT_DCS_CMD(0x0F, 0x73),
- _INIT_DCS_CMD(0x95, 0xE6),
- _INIT_DCS_CMD(0x96, 0xF0),
- _INIT_DCS_CMD(0x30, 0x00),
- _INIT_DCS_CMD(0x6D, 0x66),
- _INIT_DCS_CMD(0x75, 0xA2),
- _INIT_DCS_CMD(0x77, 0x3B),
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9);
+ mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31);
+ mipi_dsi_dcs_write_seq(dsi, 0xB2, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B);
+ mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF);
- _INIT_DCS_CMD(0xB0, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9),
- _INIT_DCS_CMD(0xB1, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31),
- _INIT_DCS_CMD(0xB2, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B),
- _INIT_DCS_CMD(0xB3, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF),
-
- _INIT_DCS_CMD(0xB4, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9),
- _INIT_DCS_CMD(0xB5, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31),
- _INIT_DCS_CMD(0xB6, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B),
- _INIT_DCS_CMD(0xB7, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF),
- _INIT_DCS_CMD(0xB8, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9),
- _INIT_DCS_CMD(0xB9, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31),
- _INIT_DCS_CMD(0xBA, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B),
- _INIT_DCS_CMD(0xBB, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF),
-
- _INIT_DCS_CMD(0xFF, 0x21),
- _INIT_DCS_CMD(0xFB, 0x01),
-
- _INIT_DCS_CMD(0xB0, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1),
- _INIT_DCS_CMD(0xB1, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29),
- _INIT_DCS_CMD(0xB2, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73),
-
- _INIT_DCS_CMD(0xB3, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xE0),
- _INIT_DCS_CMD(0xB4, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1),
- _INIT_DCS_CMD(0xB5, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29),
- _INIT_DCS_CMD(0xB6, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73),
- _INIT_DCS_CMD(0xB7, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xE0),
-
- _INIT_DCS_CMD(0xB8, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1),
- _INIT_DCS_CMD(0xB9, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29),
- _INIT_DCS_CMD(0xBA, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73),
-
- _INIT_DCS_CMD(0xBB, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xE0),
- _INIT_DCS_CMD(0xFF, 0x24),
- _INIT_DCS_CMD(0xFB, 0x01),
-
- _INIT_DCS_CMD(0x00, 0x00),
- _INIT_DCS_CMD(0x01, 0x00),
-
- _INIT_DCS_CMD(0x02, 0x1C),
- _INIT_DCS_CMD(0x03, 0x1C),
-
- _INIT_DCS_CMD(0x04, 0x1D),
- _INIT_DCS_CMD(0x05, 0x1D),
-
- _INIT_DCS_CMD(0x06, 0x04),
- _INIT_DCS_CMD(0x07, 0x04),
-
- _INIT_DCS_CMD(0x08, 0x0F),
- _INIT_DCS_CMD(0x09, 0x0F),
-
- _INIT_DCS_CMD(0x0A, 0x0E),
- _INIT_DCS_CMD(0x0B, 0x0E),
-
- _INIT_DCS_CMD(0x0C, 0x0D),
- _INIT_DCS_CMD(0x0D, 0x0D),
-
- _INIT_DCS_CMD(0x0E, 0x0C),
- _INIT_DCS_CMD(0x0F, 0x0C),
-
- _INIT_DCS_CMD(0x10, 0x08),
- _INIT_DCS_CMD(0x11, 0x08),
-
- _INIT_DCS_CMD(0x12, 0x00),
- _INIT_DCS_CMD(0x13, 0x00),
- _INIT_DCS_CMD(0x14, 0x00),
- _INIT_DCS_CMD(0x15, 0x00),
-
- _INIT_DCS_CMD(0x16, 0x00),
- _INIT_DCS_CMD(0x17, 0x00),
-
- _INIT_DCS_CMD(0x18, 0x1C),
- _INIT_DCS_CMD(0x19, 0x1C),
-
- _INIT_DCS_CMD(0x1A, 0x1D),
- _INIT_DCS_CMD(0x1B, 0x1D),
-
- _INIT_DCS_CMD(0x1C, 0x04),
- _INIT_DCS_CMD(0x1D, 0x04),
-
- _INIT_DCS_CMD(0x1E, 0x0F),
- _INIT_DCS_CMD(0x1F, 0x0F),
-
- _INIT_DCS_CMD(0x20, 0x0E),
- _INIT_DCS_CMD(0x21, 0x0E),
-
- _INIT_DCS_CMD(0x22, 0x0D),
- _INIT_DCS_CMD(0x23, 0x0D),
-
- _INIT_DCS_CMD(0x24, 0x0C),
- _INIT_DCS_CMD(0x25, 0x0C),
-
- _INIT_DCS_CMD(0x26, 0x08),
- _INIT_DCS_CMD(0x27, 0x08),
-
- _INIT_DCS_CMD(0x28, 0x00),
- _INIT_DCS_CMD(0x29, 0x00),
- _INIT_DCS_CMD(0x2A, 0x00),
- _INIT_DCS_CMD(0x2B, 0x00),
-
- _INIT_DCS_CMD(0x2D, 0x20),
- _INIT_DCS_CMD(0x2F, 0x0A),
- _INIT_DCS_CMD(0x30, 0x44),
- _INIT_DCS_CMD(0x33, 0x0C),
- _INIT_DCS_CMD(0x34, 0x32),
-
- _INIT_DCS_CMD(0x37, 0x44),
- _INIT_DCS_CMD(0x38, 0x40),
- _INIT_DCS_CMD(0x39, 0x00),
- _INIT_DCS_CMD(0x3A, 0x5D),
- _INIT_DCS_CMD(0x3B, 0x60),
- _INIT_DCS_CMD(0x3D, 0x42),
- _INIT_DCS_CMD(0x3F, 0x06),
- _INIT_DCS_CMD(0x43, 0x06),
- _INIT_DCS_CMD(0x47, 0x66),
- _INIT_DCS_CMD(0x4A, 0x5D),
- _INIT_DCS_CMD(0x4B, 0x60),
- _INIT_DCS_CMD(0x4C, 0x91),
- _INIT_DCS_CMD(0x4D, 0x21),
- _INIT_DCS_CMD(0x4E, 0x43),
- _INIT_DCS_CMD(0x51, 0x12),
- _INIT_DCS_CMD(0x52, 0x34),
- _INIT_DCS_CMD(0x55, 0x82, 0x02),
- _INIT_DCS_CMD(0x56, 0x04),
- _INIT_DCS_CMD(0x58, 0x21),
- _INIT_DCS_CMD(0x59, 0x30),
- _INIT_DCS_CMD(0x5A, 0x60),
- _INIT_DCS_CMD(0x5B, 0x50),
- _INIT_DCS_CMD(0x5E, 0x00, 0x06),
- _INIT_DCS_CMD(0x5F, 0x00),
- _INIT_DCS_CMD(0x65, 0x82),
- _INIT_DCS_CMD(0x7E, 0x20),
- _INIT_DCS_CMD(0x7F, 0x3C),
- _INIT_DCS_CMD(0x82, 0x04),
- _INIT_DCS_CMD(0x97, 0xC0),
-
- _INIT_DCS_CMD(0xB6, 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05, 0x00, 0x00),
- _INIT_DCS_CMD(0x91, 0x44),
- _INIT_DCS_CMD(0x92, 0xA9),
- _INIT_DCS_CMD(0x93, 0x1A),
- _INIT_DCS_CMD(0x94, 0x96),
- _INIT_DCS_CMD(0xD7, 0x55),
- _INIT_DCS_CMD(0xDA, 0x0A),
- _INIT_DCS_CMD(0xDE, 0x08),
- _INIT_DCS_CMD(0xDB, 0x05),
- _INIT_DCS_CMD(0xDC, 0xA9),
- _INIT_DCS_CMD(0xDD, 0x22),
-
- _INIT_DCS_CMD(0xDF, 0x05),
- _INIT_DCS_CMD(0xE0, 0xA9),
- _INIT_DCS_CMD(0xE1, 0x05),
- _INIT_DCS_CMD(0xE2, 0xA9),
- _INIT_DCS_CMD(0xE3, 0x05),
- _INIT_DCS_CMD(0xE4, 0xA9),
- _INIT_DCS_CMD(0xE5, 0x05),
- _INIT_DCS_CMD(0xE6, 0xA9),
- _INIT_DCS_CMD(0x5C, 0x00),
- _INIT_DCS_CMD(0x5D, 0x00),
- _INIT_DCS_CMD(0x8D, 0x00),
- _INIT_DCS_CMD(0x8E, 0x00),
- _INIT_DCS_CMD(0xB5, 0x90),
- _INIT_DCS_CMD(0xFF, 0x25),
- _INIT_DCS_CMD(0xFB, 0x01),
- _INIT_DCS_CMD(0x05, 0x00),
- _INIT_DCS_CMD(0x19, 0x07),
- _INIT_DCS_CMD(0x1F, 0x60),
- _INIT_DCS_CMD(0x20, 0x50),
- _INIT_DCS_CMD(0x26, 0x60),
- _INIT_DCS_CMD(0x27, 0x50),
- _INIT_DCS_CMD(0x33, 0x60),
- _INIT_DCS_CMD(0x34, 0x50),
- _INIT_DCS_CMD(0x3F, 0xE0),
- _INIT_DCS_CMD(0x40, 0x00),
- _INIT_DCS_CMD(0x44, 0x00),
- _INIT_DCS_CMD(0x45, 0x40),
- _INIT_DCS_CMD(0x48, 0x60),
- _INIT_DCS_CMD(0x49, 0x50),
- _INIT_DCS_CMD(0x5B, 0x00),
- _INIT_DCS_CMD(0x5C, 0x00),
- _INIT_DCS_CMD(0x5D, 0x00),
- _INIT_DCS_CMD(0x5E, 0xD0),
- _INIT_DCS_CMD(0x61, 0x60),
- _INIT_DCS_CMD(0x62, 0x50),
- _INIT_DCS_CMD(0xF1, 0x10),
- _INIT_DCS_CMD(0xFF, 0x2A),
- _INIT_DCS_CMD(0xFB, 0x01),
-
- _INIT_DCS_CMD(0x64, 0x16),
- _INIT_DCS_CMD(0x67, 0x16),
- _INIT_DCS_CMD(0x6A, 0x16),
-
- _INIT_DCS_CMD(0x70, 0x30),
-
- _INIT_DCS_CMD(0xA2, 0xF3),
- _INIT_DCS_CMD(0xA3, 0xFF),
- _INIT_DCS_CMD(0xA4, 0xFF),
- _INIT_DCS_CMD(0xA5, 0xFF),
-
- _INIT_DCS_CMD(0xD6, 0x08),
-
- _INIT_DCS_CMD(0xFF, 0x26),
- _INIT_DCS_CMD(0xFB, 0x01),
- _INIT_DCS_CMD(0x00, 0xA1),
-
- _INIT_DCS_CMD(0x02, 0x31),
- _INIT_DCS_CMD(0x04, 0x28),
- _INIT_DCS_CMD(0x06, 0x30),
- _INIT_DCS_CMD(0x0C, 0x16),
- _INIT_DCS_CMD(0x0D, 0x0D),
- _INIT_DCS_CMD(0x0F, 0x00),
- _INIT_DCS_CMD(0x11, 0x00),
- _INIT_DCS_CMD(0x12, 0x50),
- _INIT_DCS_CMD(0x13, 0x56),
- _INIT_DCS_CMD(0x14, 0x57),
- _INIT_DCS_CMD(0x15, 0x00),
- _INIT_DCS_CMD(0x16, 0x10),
- _INIT_DCS_CMD(0x17, 0xA0),
- _INIT_DCS_CMD(0x18, 0x86),
- _INIT_DCS_CMD(0x19, 0x0D),
- _INIT_DCS_CMD(0x1A, 0x7F),
- _INIT_DCS_CMD(0x1B, 0x0C),
- _INIT_DCS_CMD(0x1C, 0xBF),
- _INIT_DCS_CMD(0x22, 0x00),
- _INIT_DCS_CMD(0x23, 0x00),
- _INIT_DCS_CMD(0x2A, 0x0D),
- _INIT_DCS_CMD(0x2B, 0x7F),
-
- _INIT_DCS_CMD(0x1D, 0x00),
- _INIT_DCS_CMD(0x1E, 0x65),
- _INIT_DCS_CMD(0x1F, 0x65),
- _INIT_DCS_CMD(0x24, 0x00),
- _INIT_DCS_CMD(0x25, 0x65),
- _INIT_DCS_CMD(0x2F, 0x05),
- _INIT_DCS_CMD(0x30, 0x65),
- _INIT_DCS_CMD(0x31, 0x05),
- _INIT_DCS_CMD(0x32, 0x7D),
- _INIT_DCS_CMD(0x39, 0x00),
- _INIT_DCS_CMD(0x3A, 0x65),
- _INIT_DCS_CMD(0x20, 0x01),
- _INIT_DCS_CMD(0x33, 0x11),
- _INIT_DCS_CMD(0x34, 0x78),
- _INIT_DCS_CMD(0x35, 0x16),
- _INIT_DCS_CMD(0xC8, 0x04),
- _INIT_DCS_CMD(0xC9, 0x9E),
- _INIT_DCS_CMD(0xCA, 0x4E),
- _INIT_DCS_CMD(0xCB, 0x00),
-
- _INIT_DCS_CMD(0xA9, 0x49),
- _INIT_DCS_CMD(0xAA, 0x4B),
- _INIT_DCS_CMD(0xAB, 0x48),
- _INIT_DCS_CMD(0xAC, 0x43),
- _INIT_DCS_CMD(0xAD, 0x40),
- _INIT_DCS_CMD(0xAE, 0x50),
- _INIT_DCS_CMD(0xAF, 0x44),
- _INIT_DCS_CMD(0xB0, 0x54),
- _INIT_DCS_CMD(0xB1, 0x4E),
- _INIT_DCS_CMD(0xB2, 0x4D),
- _INIT_DCS_CMD(0xB3, 0x4C),
- _INIT_DCS_CMD(0xB4, 0x41),
- _INIT_DCS_CMD(0xB5, 0x47),
- _INIT_DCS_CMD(0xB6, 0x53),
- _INIT_DCS_CMD(0xB7, 0x3E),
- _INIT_DCS_CMD(0xB8, 0x51),
- _INIT_DCS_CMD(0xB9, 0x3C),
- _INIT_DCS_CMD(0xBA, 0x3B),
- _INIT_DCS_CMD(0xBB, 0x46),
- _INIT_DCS_CMD(0xBC, 0x45),
- _INIT_DCS_CMD(0xBD, 0x55),
- _INIT_DCS_CMD(0xBE, 0x3D),
- _INIT_DCS_CMD(0xBF, 0x3F),
- _INIT_DCS_CMD(0xC0, 0x52),
- _INIT_DCS_CMD(0xC1, 0x4A),
- _INIT_DCS_CMD(0xC2, 0x39),
- _INIT_DCS_CMD(0xC3, 0x4F),
- _INIT_DCS_CMD(0xC4, 0x3A),
- _INIT_DCS_CMD(0xC5, 0x42),
- _INIT_DCS_CMD(0xFF, 0x27),
- _INIT_DCS_CMD(0xFB, 0x01),
-
- _INIT_DCS_CMD(0x56, 0x06),
- _INIT_DCS_CMD(0x58, 0x80),
- _INIT_DCS_CMD(0x59, 0x75),
- _INIT_DCS_CMD(0x5A, 0x00),
- _INIT_DCS_CMD(0x5B, 0x02),
- _INIT_DCS_CMD(0x5C, 0x00),
- _INIT_DCS_CMD(0x5D, 0x00),
- _INIT_DCS_CMD(0x5E, 0x20),
- _INIT_DCS_CMD(0x5F, 0x10),
- _INIT_DCS_CMD(0x60, 0x00),
- _INIT_DCS_CMD(0x61, 0x2E),
- _INIT_DCS_CMD(0x62, 0x00),
- _INIT_DCS_CMD(0x63, 0x01),
- _INIT_DCS_CMD(0x64, 0x43),
- _INIT_DCS_CMD(0x65, 0x2D),
- _INIT_DCS_CMD(0x66, 0x00),
- _INIT_DCS_CMD(0x67, 0x01),
- _INIT_DCS_CMD(0x68, 0x44),
-
- _INIT_DCS_CMD(0x00, 0x00),
- _INIT_DCS_CMD(0x78, 0x00),
- _INIT_DCS_CMD(0xC3, 0x00),
-
- _INIT_DCS_CMD(0xFF, 0x2A),
- _INIT_DCS_CMD(0xFB, 0x01),
-
- _INIT_DCS_CMD(0x22, 0x2F),
- _INIT_DCS_CMD(0x23, 0x08),
-
- _INIT_DCS_CMD(0x24, 0x00),
- _INIT_DCS_CMD(0x25, 0x65),
- _INIT_DCS_CMD(0x26, 0xF8),
- _INIT_DCS_CMD(0x27, 0x00),
- _INIT_DCS_CMD(0x28, 0x1A),
- _INIT_DCS_CMD(0x29, 0x00),
- _INIT_DCS_CMD(0x2A, 0x1A),
- _INIT_DCS_CMD(0x2B, 0x00),
- _INIT_DCS_CMD(0x2D, 0x1A),
-
- _INIT_DCS_CMD(0xFF, 0x23),
- _INIT_DCS_CMD(0xFB, 0x01),
-
- _INIT_DCS_CMD(0x00, 0x80),
- _INIT_DCS_CMD(0x07, 0x00),
-
- _INIT_DCS_CMD(0xFF, 0xE0),
- _INIT_DCS_CMD(0xFB, 0x01),
- _INIT_DCS_CMD(0x14, 0x60),
- _INIT_DCS_CMD(0x16, 0xC0),
-
- _INIT_DCS_CMD(0xFF, 0xF0),
- _INIT_DCS_CMD(0xFB, 0x01),
- _INIT_DCS_CMD(0x3A, 0x08),
-
- _INIT_DCS_CMD(0xFF, 0x10),
- _INIT_DCS_CMD(0xFB, 0x01),
- _INIT_DCS_CMD(0xB9, 0x01),
- _INIT_DCS_CMD(0xFF, 0x20),
- _INIT_DCS_CMD(0xFB, 0x01),
- _INIT_DCS_CMD(0x18, 0x40),
-
- _INIT_DCS_CMD(0xFF, 0x10),
- _INIT_DCS_CMD(0xFB, 0x01),
- _INIT_DCS_CMD(0xB9, 0x02),
- _INIT_DCS_CMD(0x35, 0x00),
- _INIT_DCS_CMD(0x51, 0x00, 0xFF),
- _INIT_DCS_CMD(0x53, 0x24),
- _INIT_DCS_CMD(0x55, 0x00),
- _INIT_DCS_CMD(0xBB, 0x13),
- _INIT_DCS_CMD(0x3B, 0x03, 0x96, 0x1A, 0x04, 0x04),
- _INIT_DELAY_CMD(100),
- _INIT_DCS_CMD(0x11),
- _INIT_DELAY_CMD(200),
- _INIT_DCS_CMD(0x29),
- _INIT_DELAY_CMD(100),
- {},
-};
+ mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9);
+ mipi_dsi_dcs_write_seq(dsi, 0xB5, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31);
+ mipi_dsi_dcs_write_seq(dsi, 0xB6, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B);
+ mipi_dsi_dcs_write_seq(dsi, 0xB7, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF);
+ mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9);
+ mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31);
+ mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B);
+ mipi_dsi_dcs_write_seq(dsi, 0xBB, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x21);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1);
+ mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29);
+ mipi_dsi_dcs_write_seq(dsi, 0xB2, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xE0);
+ mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1);
+ mipi_dsi_dcs_write_seq(dsi, 0xB5, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29);
+ mipi_dsi_dcs_write_seq(dsi, 0xB6, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73);
+ mipi_dsi_dcs_write_seq(dsi, 0xB7, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xE0);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1);
+ mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29);
+ mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xBB, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xE0);
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x24);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x00, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x01, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x02, 0x1C);
+ mipi_dsi_dcs_write_seq(dsi, 0x03, 0x1C);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x04, 0x1D);
+ mipi_dsi_dcs_write_seq(dsi, 0x05, 0x1D);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x06, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x07, 0x04);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x08, 0x0F);
+ mipi_dsi_dcs_write_seq(dsi, 0x09, 0x0F);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x0A, 0x0E);
+ mipi_dsi_dcs_write_seq(dsi, 0x0B, 0x0E);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x0C, 0x0D);
+ mipi_dsi_dcs_write_seq(dsi, 0x0D, 0x0D);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x0E, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0x0F, 0x0C);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x10, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x11, 0x08);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x12, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x13, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x14, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x15, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x16, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x17, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x18, 0x1C);
+ mipi_dsi_dcs_write_seq(dsi, 0x19, 0x1C);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x1A, 0x1D);
+ mipi_dsi_dcs_write_seq(dsi, 0x1B, 0x1D);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x1C, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x04);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x1E, 0x0F);
+ mipi_dsi_dcs_write_seq(dsi, 0x1F, 0x0F);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x20, 0x0E);
+ mipi_dsi_dcs_write_seq(dsi, 0x21, 0x0E);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x22, 0x0D);
+ mipi_dsi_dcs_write_seq(dsi, 0x23, 0x0D);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x24, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0x25, 0x0C);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x26, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x27, 0x08);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x28, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x29, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x2D, 0x20);
+ mipi_dsi_dcs_write_seq(dsi, 0x2F, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0x30, 0x44);
+ mipi_dsi_dcs_write_seq(dsi, 0x33, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0x34, 0x32);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x37, 0x44);
+ mipi_dsi_dcs_write_seq(dsi, 0x38, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0x39, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x5D);
+ mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x60);
+ mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x42);
+ mipi_dsi_dcs_write_seq(dsi, 0x3F, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x43, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x47, 0x66);
+ mipi_dsi_dcs_write_seq(dsi, 0x4A, 0x5D);
+ mipi_dsi_dcs_write_seq(dsi, 0x4B, 0x60);
+ mipi_dsi_dcs_write_seq(dsi, 0x4C, 0x91);
+ mipi_dsi_dcs_write_seq(dsi, 0x4D, 0x21);
+ mipi_dsi_dcs_write_seq(dsi, 0x4E, 0x43);
+ mipi_dsi_dcs_write_seq(dsi, 0x51, 0x12);
+ mipi_dsi_dcs_write_seq(dsi, 0x52, 0x34);
+ mipi_dsi_dcs_write_seq(dsi, 0x55, 0x82, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x56, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x58, 0x21);
+ mipi_dsi_dcs_write_seq(dsi, 0x59, 0x30);
+ mipi_dsi_dcs_write_seq(dsi, 0x5A, 0x60);
+ mipi_dsi_dcs_write_seq(dsi, 0x5B, 0x50);
+ mipi_dsi_dcs_write_seq(dsi, 0x5E, 0x00, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x5F, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x65, 0x82);
+ mipi_dsi_dcs_write_seq(dsi, 0x7E, 0x20);
+ mipi_dsi_dcs_write_seq(dsi, 0x7F, 0x3C);
+ mipi_dsi_dcs_write_seq(dsi, 0x82, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x97, 0xC0);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xB6, 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05, 0x00, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x91, 0x44);
+ mipi_dsi_dcs_write_seq(dsi, 0x92, 0xA9);
+ mipi_dsi_dcs_write_seq(dsi, 0x93, 0x1A);
+ mipi_dsi_dcs_write_seq(dsi, 0x94, 0x96);
+ mipi_dsi_dcs_write_seq(dsi, 0xD7, 0x55);
+ mipi_dsi_dcs_write_seq(dsi, 0xDA, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0xDE, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0xDB, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xDC, 0xA9);
+ mipi_dsi_dcs_write_seq(dsi, 0xDD, 0x22);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xDF, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xE0, 0xA9);
+ mipi_dsi_dcs_write_seq(dsi, 0xE1, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xE2, 0xA9);
+ mipi_dsi_dcs_write_seq(dsi, 0xE3, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xE4, 0xA9);
+ mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xE6, 0xA9);
+ mipi_dsi_dcs_write_seq(dsi, 0x5C, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x5D, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x8D, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x8E, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xB5, 0x90);
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x25);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x05, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x19, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x1F, 0x60);
+ mipi_dsi_dcs_write_seq(dsi, 0x20, 0x50);
+ mipi_dsi_dcs_write_seq(dsi, 0x26, 0x60);
+ mipi_dsi_dcs_write_seq(dsi, 0x27, 0x50);
+ mipi_dsi_dcs_write_seq(dsi, 0x33, 0x60);
+ mipi_dsi_dcs_write_seq(dsi, 0x34, 0x50);
+ mipi_dsi_dcs_write_seq(dsi, 0x3F, 0xE0);
+ mipi_dsi_dcs_write_seq(dsi, 0x40, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x44, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x45, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0x48, 0x60);
+ mipi_dsi_dcs_write_seq(dsi, 0x49, 0x50);
+ mipi_dsi_dcs_write_seq(dsi, 0x5B, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x5C, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x5D, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x5E, 0xD0);
+ mipi_dsi_dcs_write_seq(dsi, 0x61, 0x60);
+ mipi_dsi_dcs_write_seq(dsi, 0x62, 0x50);
+ mipi_dsi_dcs_write_seq(dsi, 0xF1, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x2A);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x64, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0x67, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0x6A, 0x16);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x70, 0x30);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xA2, 0xF3);
+ mipi_dsi_dcs_write_seq(dsi, 0xA3, 0xFF);
+ mipi_dsi_dcs_write_seq(dsi, 0xA4, 0xFF);
+ mipi_dsi_dcs_write_seq(dsi, 0xA5, 0xFF);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x08);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x26);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x00, 0xA1);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x02, 0x31);
+ mipi_dsi_dcs_write_seq(dsi, 0x04, 0x28);
+ mipi_dsi_dcs_write_seq(dsi, 0x06, 0x30);
+ mipi_dsi_dcs_write_seq(dsi, 0x0C, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0x0D, 0x0D);
+ mipi_dsi_dcs_write_seq(dsi, 0x0F, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x11, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x12, 0x50);
+ mipi_dsi_dcs_write_seq(dsi, 0x13, 0x56);
+ mipi_dsi_dcs_write_seq(dsi, 0x14, 0x57);
+ mipi_dsi_dcs_write_seq(dsi, 0x15, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x16, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0x17, 0xA0);
+ mipi_dsi_dcs_write_seq(dsi, 0x18, 0x86);
+ mipi_dsi_dcs_write_seq(dsi, 0x19, 0x0D);
+ mipi_dsi_dcs_write_seq(dsi, 0x1A, 0x7F);
+ mipi_dsi_dcs_write_seq(dsi, 0x1B, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0x1C, 0xBF);
+ mipi_dsi_dcs_write_seq(dsi, 0x22, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x23, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x0D);
+ mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x7F);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x1E, 0x65);
+ mipi_dsi_dcs_write_seq(dsi, 0x1F, 0x65);
+ mipi_dsi_dcs_write_seq(dsi, 0x24, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x25, 0x65);
+ mipi_dsi_dcs_write_seq(dsi, 0x2F, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0x30, 0x65);
+ mipi_dsi_dcs_write_seq(dsi, 0x31, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0x32, 0x7D);
+ mipi_dsi_dcs_write_seq(dsi, 0x39, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x65);
+ mipi_dsi_dcs_write_seq(dsi, 0x20, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x33, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0x34, 0x78);
+ mipi_dsi_dcs_write_seq(dsi, 0x35, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0xC8, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xC9, 0x9E);
+ mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x4E);
+ mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xA9, 0x49);
+ mipi_dsi_dcs_write_seq(dsi, 0xAA, 0x4B);
+ mipi_dsi_dcs_write_seq(dsi, 0xAB, 0x48);
+ mipi_dsi_dcs_write_seq(dsi, 0xAC, 0x43);
+ mipi_dsi_dcs_write_seq(dsi, 0xAD, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0xAE, 0x50);
+ mipi_dsi_dcs_write_seq(dsi, 0xAF, 0x44);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x54);
+ mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x4E);
+ mipi_dsi_dcs_write_seq(dsi, 0xB2, 0x4D);
+ mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x4C);
+ mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x41);
+ mipi_dsi_dcs_write_seq(dsi, 0xB5, 0x47);
+ mipi_dsi_dcs_write_seq(dsi, 0xB6, 0x53);
+ mipi_dsi_dcs_write_seq(dsi, 0xB7, 0x3E);
+ mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x51);
+ mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x3C);
+ mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x3B);
+ mipi_dsi_dcs_write_seq(dsi, 0xBB, 0x46);
+ mipi_dsi_dcs_write_seq(dsi, 0xBC, 0x45);
+ mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x55);
+ mipi_dsi_dcs_write_seq(dsi, 0xBE, 0x3D);
+ mipi_dsi_dcs_write_seq(dsi, 0xBF, 0x3F);
+ mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x52);
+ mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x4A);
+ mipi_dsi_dcs_write_seq(dsi, 0xC2, 0x39);
+ mipi_dsi_dcs_write_seq(dsi, 0xC3, 0x4F);
+ mipi_dsi_dcs_write_seq(dsi, 0xC4, 0x3A);
+ mipi_dsi_dcs_write_seq(dsi, 0xC5, 0x42);
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x27);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x56, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x58, 0x80);
+ mipi_dsi_dcs_write_seq(dsi, 0x59, 0x75);
+ mipi_dsi_dcs_write_seq(dsi, 0x5A, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x5B, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x5C, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x5D, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x5E, 0x20);
+ mipi_dsi_dcs_write_seq(dsi, 0x5F, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0x60, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x61, 0x2E);
+ mipi_dsi_dcs_write_seq(dsi, 0x62, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x63, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x64, 0x43);
+ mipi_dsi_dcs_write_seq(dsi, 0x65, 0x2D);
+ mipi_dsi_dcs_write_seq(dsi, 0x66, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x67, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x68, 0x44);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x00, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x78, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xC3, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x2A);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x22, 0x2F);
+ mipi_dsi_dcs_write_seq(dsi, 0x23, 0x08);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x24, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x25, 0x65);
+ mipi_dsi_dcs_write_seq(dsi, 0x26, 0xF8);
+ mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x28, 0x1A);
+ mipi_dsi_dcs_write_seq(dsi, 0x29, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x1A);
+ mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x2D, 0x1A);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x23);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x00, 0x80);
+ mipi_dsi_dcs_write_seq(dsi, 0x07, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0xE0);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x14, 0x60);
+ mipi_dsi_dcs_write_seq(dsi, 0x16, 0xC0);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0xF0);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x08);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x20);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x18, 0x40);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x35, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x51, 0x00, 0xFF);
+ mipi_dsi_dcs_write_seq(dsi, 0x53, 0x24);
+ mipi_dsi_dcs_write_seq(dsi, 0x55, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xBB, 0x13);
+ mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x03, 0x96, 0x1A, 0x04, 0x04);
+ msleep(100);
+ ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
+ if (ret)
+ return ret;
+ msleep(200);
+ ret = mipi_dsi_dcs_set_display_on(dsi);
+ if (ret)
+ return ret;
+ msleep(100);
-static const struct panel_init_cmd inx_hj110iz_init_cmd[] = {
- _INIT_DCS_CMD(0xFF, 0x20),
- _INIT_DCS_CMD(0xFB, 0x01),
- _INIT_DCS_CMD(0x05, 0xD1),
- _INIT_DCS_CMD(0x06, 0xC0),
- _INIT_DCS_CMD(0x07, 0x87),
- _INIT_DCS_CMD(0x08, 0x4B),
-
- _INIT_DCS_CMD(0x0D, 0x63),
- _INIT_DCS_CMD(0x0E, 0x91),
- _INIT_DCS_CMD(0x0F, 0x69),
- _INIT_DCS_CMD(0x94, 0x00),
- _INIT_DCS_CMD(0x95, 0xF5),
- _INIT_DCS_CMD(0x96, 0xF5),
- _INIT_DCS_CMD(0x9D, 0x00),
- _INIT_DCS_CMD(0x9E, 0x00),
- _INIT_DCS_CMD(0x69, 0x98),
- _INIT_DCS_CMD(0x75, 0xA2),
- _INIT_DCS_CMD(0x77, 0xB3),
-
- _INIT_DCS_CMD(0x58, 0x43),
- _INIT_DCS_CMD(0xFF, 0x24),
- _INIT_DCS_CMD(0xFB, 0x01),
- _INIT_DCS_CMD(0x91, 0x44),
- _INIT_DCS_CMD(0x92, 0x4C),
- _INIT_DCS_CMD(0x94, 0x86),
- _INIT_DCS_CMD(0x60, 0x96),
- _INIT_DCS_CMD(0x61, 0xD0),
- _INIT_DCS_CMD(0x63, 0x70),
- _INIT_DCS_CMD(0xC2, 0xCA),
-
- _INIT_DCS_CMD(0x00, 0x03),
- _INIT_DCS_CMD(0x01, 0x03),
- _INIT_DCS_CMD(0x02, 0x03),
- _INIT_DCS_CMD(0x03, 0x29),
- _INIT_DCS_CMD(0x04, 0x22),
- _INIT_DCS_CMD(0x05, 0x22),
- _INIT_DCS_CMD(0x06, 0x0B),
- _INIT_DCS_CMD(0x07, 0x1D),
- _INIT_DCS_CMD(0x08, 0x1C),
- _INIT_DCS_CMD(0x09, 0x05),
- _INIT_DCS_CMD(0x0A, 0x08),
- _INIT_DCS_CMD(0x0B, 0x09),
- _INIT_DCS_CMD(0x0C, 0x0A),
- _INIT_DCS_CMD(0x0D, 0x0C),
- _INIT_DCS_CMD(0x0E, 0x0D),
- _INIT_DCS_CMD(0x0F, 0x0E),
- _INIT_DCS_CMD(0x10, 0x0F),
- _INIT_DCS_CMD(0x11, 0x10),
- _INIT_DCS_CMD(0x12, 0x11),
- _INIT_DCS_CMD(0x13, 0x04),
- _INIT_DCS_CMD(0x14, 0x00),
- _INIT_DCS_CMD(0x15, 0x03),
- _INIT_DCS_CMD(0x16, 0x03),
- _INIT_DCS_CMD(0x17, 0x03),
- _INIT_DCS_CMD(0x18, 0x03),
- _INIT_DCS_CMD(0x19, 0x29),
- _INIT_DCS_CMD(0x1A, 0x22),
- _INIT_DCS_CMD(0x1B, 0x22),
- _INIT_DCS_CMD(0x1C, 0x0B),
- _INIT_DCS_CMD(0x1D, 0x1D),
- _INIT_DCS_CMD(0x1E, 0x1C),
- _INIT_DCS_CMD(0x1F, 0x05),
- _INIT_DCS_CMD(0x20, 0x08),
- _INIT_DCS_CMD(0x21, 0x09),
- _INIT_DCS_CMD(0x22, 0x0A),
- _INIT_DCS_CMD(0x23, 0x0C),
- _INIT_DCS_CMD(0x24, 0x0D),
- _INIT_DCS_CMD(0x25, 0x0E),
- _INIT_DCS_CMD(0x26, 0x0F),
- _INIT_DCS_CMD(0x27, 0x10),
- _INIT_DCS_CMD(0x28, 0x11),
- _INIT_DCS_CMD(0x29, 0x04),
- _INIT_DCS_CMD(0x2A, 0x00),
- _INIT_DCS_CMD(0x2B, 0x03),
-
- _INIT_DCS_CMD(0x2F, 0x0A),
- _INIT_DCS_CMD(0x30, 0x35),
- _INIT_DCS_CMD(0x37, 0xA7),
- _INIT_DCS_CMD(0x39, 0x00),
- _INIT_DCS_CMD(0x3A, 0x46),
- _INIT_DCS_CMD(0x3B, 0x32),
- _INIT_DCS_CMD(0x3D, 0x12),
-
- _INIT_DCS_CMD(0x3F, 0x33),
- _INIT_DCS_CMD(0x40, 0x31),
- _INIT_DCS_CMD(0x41, 0x40),
- _INIT_DCS_CMD(0x42, 0x42),
- _INIT_DCS_CMD(0x47, 0x77),
- _INIT_DCS_CMD(0x48, 0x77),
- _INIT_DCS_CMD(0x4A, 0x45),
- _INIT_DCS_CMD(0x4B, 0x45),
- _INIT_DCS_CMD(0x4C, 0x14),
-
- _INIT_DCS_CMD(0x4D, 0x21),
- _INIT_DCS_CMD(0x4E, 0x43),
- _INIT_DCS_CMD(0x4F, 0x65),
- _INIT_DCS_CMD(0x55, 0x06),
- _INIT_DCS_CMD(0x56, 0x06),
- _INIT_DCS_CMD(0x58, 0x21),
- _INIT_DCS_CMD(0x59, 0x70),
- _INIT_DCS_CMD(0x5A, 0x46),
- _INIT_DCS_CMD(0x5B, 0x32),
- _INIT_DCS_CMD(0x5C, 0x88),
- _INIT_DCS_CMD(0x5E, 0x00, 0x00),
- _INIT_DCS_CMD(0x5F, 0x00),
-
- _INIT_DCS_CMD(0x7A, 0xFF),
- _INIT_DCS_CMD(0x7B, 0xFF),
- _INIT_DCS_CMD(0x7C, 0x00),
- _INIT_DCS_CMD(0x7D, 0x00),
- _INIT_DCS_CMD(0x7E, 0x20),
- _INIT_DCS_CMD(0x7F, 0x3C),
- _INIT_DCS_CMD(0x80, 0x00),
- _INIT_DCS_CMD(0x81, 0x00),
- _INIT_DCS_CMD(0x82, 0x08),
- _INIT_DCS_CMD(0x97, 0x02),
- _INIT_DCS_CMD(0xC5, 0x10),
-
- _INIT_DCS_CMD(0xD7, 0x55),
- _INIT_DCS_CMD(0xD8, 0x55),
- _INIT_DCS_CMD(0xD9, 0x23),
- _INIT_DCS_CMD(0xDA, 0x05),
- _INIT_DCS_CMD(0xDB, 0x01),
- _INIT_DCS_CMD(0xDC, 0x65),
- _INIT_DCS_CMD(0xDD, 0x55),
- _INIT_DCS_CMD(0xDE, 0x27),
- _INIT_DCS_CMD(0xDF, 0x01),
- _INIT_DCS_CMD(0xE0, 0x65),
- _INIT_DCS_CMD(0xE1, 0x01),
- _INIT_DCS_CMD(0xE2, 0x65),
- _INIT_DCS_CMD(0xE3, 0x01),
- _INIT_DCS_CMD(0xE4, 0x65),
- _INIT_DCS_CMD(0xE5, 0x01),
- _INIT_DCS_CMD(0xE6, 0x65),
- _INIT_DCS_CMD(0xE7, 0x00),
- _INIT_DCS_CMD(0xE8, 0x00),
- _INIT_DCS_CMD(0xE9, 0x01),
- _INIT_DCS_CMD(0xEA, 0x65),
- _INIT_DCS_CMD(0xEB, 0x01),
- _INIT_DCS_CMD(0xEE, 0x65),
- _INIT_DCS_CMD(0xEF, 0x01),
- _INIT_DCS_CMD(0xF0, 0x65),
- _INIT_DCS_CMD(0xB6, 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05, 0x00, 0x00),
-
- _INIT_DCS_CMD(0xFF, 0x25),
-
- _INIT_DCS_CMD(0xFB, 0x01),
- _INIT_DCS_CMD(0x05, 0x00),
- _INIT_DCS_CMD(0xF1, 0x10),
-
- _INIT_DCS_CMD(0x1E, 0x00),
- _INIT_DCS_CMD(0x1F, 0x46),
- _INIT_DCS_CMD(0x20, 0x32),
-
- _INIT_DCS_CMD(0x25, 0x00),
- _INIT_DCS_CMD(0x26, 0x46),
- _INIT_DCS_CMD(0x27, 0x32),
-
- _INIT_DCS_CMD(0x3F, 0x80),
- _INIT_DCS_CMD(0x40, 0x00),
- _INIT_DCS_CMD(0x43, 0x00),
-
- _INIT_DCS_CMD(0x44, 0x46),
- _INIT_DCS_CMD(0x45, 0x46),
-
- _INIT_DCS_CMD(0x48, 0x46),
- _INIT_DCS_CMD(0x49, 0x32),
-
- _INIT_DCS_CMD(0x5B, 0x80),
-
- _INIT_DCS_CMD(0x5C, 0x00),
- _INIT_DCS_CMD(0x5D, 0x46),
- _INIT_DCS_CMD(0x5E, 0x32),
-
- _INIT_DCS_CMD(0x5F, 0x46),
- _INIT_DCS_CMD(0x60, 0x32),
-
- _INIT_DCS_CMD(0x61, 0x46),
- _INIT_DCS_CMD(0x62, 0x32),
- _INIT_DCS_CMD(0x68, 0x0C),
-
- _INIT_DCS_CMD(0x6C, 0x0D),
- _INIT_DCS_CMD(0x6E, 0x0D),
- _INIT_DCS_CMD(0x78, 0x00),
- _INIT_DCS_CMD(0x79, 0xC5),
- _INIT_DCS_CMD(0x7A, 0x0C),
- _INIT_DCS_CMD(0x7B, 0xB0),
-
- _INIT_DCS_CMD(0xFF, 0x26),
- _INIT_DCS_CMD(0xFB, 0x01),
-
- _INIT_DCS_CMD(0x00, 0xA1),
- _INIT_DCS_CMD(0x02, 0x31),
- _INIT_DCS_CMD(0x0A, 0xF4),
- _INIT_DCS_CMD(0x04, 0x50),
- _INIT_DCS_CMD(0x06, 0x30),
- _INIT_DCS_CMD(0x0C, 0x16),
- _INIT_DCS_CMD(0x0D, 0x0D),
- _INIT_DCS_CMD(0x0F, 0x00),
- _INIT_DCS_CMD(0x11, 0x00),
- _INIT_DCS_CMD(0x12, 0x50),
- _INIT_DCS_CMD(0x13, 0x40),
- _INIT_DCS_CMD(0x14, 0x58),
- _INIT_DCS_CMD(0x15, 0x00),
- _INIT_DCS_CMD(0x16, 0x10),
- _INIT_DCS_CMD(0x17, 0xA0),
- _INIT_DCS_CMD(0x18, 0x86),
- _INIT_DCS_CMD(0x22, 0x00),
- _INIT_DCS_CMD(0x23, 0x00),
-
- _INIT_DCS_CMD(0x19, 0x0E),
- _INIT_DCS_CMD(0x1A, 0x31),
- _INIT_DCS_CMD(0x1B, 0x0D),
- _INIT_DCS_CMD(0x1C, 0x29),
- _INIT_DCS_CMD(0x2A, 0x0E),
- _INIT_DCS_CMD(0x2B, 0x31),
-
- _INIT_DCS_CMD(0x1D, 0x00),
- _INIT_DCS_CMD(0x1E, 0x62),
- _INIT_DCS_CMD(0x1F, 0x62),
-
- _INIT_DCS_CMD(0x2F, 0x06),
- _INIT_DCS_CMD(0x30, 0x62),
- _INIT_DCS_CMD(0x31, 0x06),
- _INIT_DCS_CMD(0x32, 0x7F),
- _INIT_DCS_CMD(0x33, 0x11),
- _INIT_DCS_CMD(0x34, 0x89),
- _INIT_DCS_CMD(0x35, 0x67),
-
- _INIT_DCS_CMD(0x39, 0x0B),
- _INIT_DCS_CMD(0x3A, 0x62),
- _INIT_DCS_CMD(0x3B, 0x06),
-
- _INIT_DCS_CMD(0xC8, 0x04),
- _INIT_DCS_CMD(0xC9, 0x89),
- _INIT_DCS_CMD(0xCA, 0x4E),
- _INIT_DCS_CMD(0xCB, 0x00),
- _INIT_DCS_CMD(0xA9, 0x3F),
- _INIT_DCS_CMD(0xAA, 0x3E),
- _INIT_DCS_CMD(0xAB, 0x3D),
- _INIT_DCS_CMD(0xAC, 0x3C),
- _INIT_DCS_CMD(0xAD, 0x3B),
- _INIT_DCS_CMD(0xAE, 0x3A),
- _INIT_DCS_CMD(0xAF, 0x39),
- _INIT_DCS_CMD(0xB0, 0x38),
-
- _INIT_DCS_CMD(0xFF, 0x27),
- _INIT_DCS_CMD(0xFB, 0x01),
-
- _INIT_DCS_CMD(0xD0, 0x11),
- _INIT_DCS_CMD(0xD1, 0x54),
- _INIT_DCS_CMD(0xDE, 0x43),
- _INIT_DCS_CMD(0xDF, 0x02),
-
- _INIT_DCS_CMD(0xC0, 0x18),
- _INIT_DCS_CMD(0xC1, 0x00),
- _INIT_DCS_CMD(0xC2, 0x00),
- _INIT_DCS_CMD(0x00, 0x00),
- _INIT_DCS_CMD(0xC3, 0x00),
- _INIT_DCS_CMD(0x56, 0x06),
-
- _INIT_DCS_CMD(0x58, 0x80),
- _INIT_DCS_CMD(0x59, 0x78),
- _INIT_DCS_CMD(0x5A, 0x00),
- _INIT_DCS_CMD(0x5B, 0x18),
- _INIT_DCS_CMD(0x5C, 0x00),
- _INIT_DCS_CMD(0x5D, 0x01),
- _INIT_DCS_CMD(0x5E, 0x20),
- _INIT_DCS_CMD(0x5F, 0x10),
- _INIT_DCS_CMD(0x60, 0x00),
- _INIT_DCS_CMD(0x61, 0x1C),
- _INIT_DCS_CMD(0x62, 0x00),
- _INIT_DCS_CMD(0x63, 0x01),
- _INIT_DCS_CMD(0x64, 0x44),
- _INIT_DCS_CMD(0x65, 0x1B),
- _INIT_DCS_CMD(0x66, 0x00),
- _INIT_DCS_CMD(0x67, 0x01),
- _INIT_DCS_CMD(0x68, 0x44),
-
- _INIT_DCS_CMD(0x98, 0x01),
- _INIT_DCS_CMD(0xB4, 0x03),
- _INIT_DCS_CMD(0x9B, 0xBE),
-
- _INIT_DCS_CMD(0xAB, 0x14),
- _INIT_DCS_CMD(0xBC, 0x08),
- _INIT_DCS_CMD(0xBD, 0x28),
-
- _INIT_DCS_CMD(0xFF, 0x2A),
- _INIT_DCS_CMD(0xFB, 0x01),
- _INIT_DCS_CMD(0x22, 0x2F),
- _INIT_DCS_CMD(0x23, 0x08),
-
- _INIT_DCS_CMD(0x24, 0x00),
- _INIT_DCS_CMD(0x25, 0x62),
- _INIT_DCS_CMD(0x26, 0xF8),
- _INIT_DCS_CMD(0x27, 0x00),
- _INIT_DCS_CMD(0x28, 0x1A),
- _INIT_DCS_CMD(0x29, 0x00),
- _INIT_DCS_CMD(0x2A, 0x1A),
- _INIT_DCS_CMD(0x2B, 0x00),
- _INIT_DCS_CMD(0x2D, 0x1A),
-
- _INIT_DCS_CMD(0x64, 0x96),
- _INIT_DCS_CMD(0x65, 0x10),
- _INIT_DCS_CMD(0x66, 0x00),
- _INIT_DCS_CMD(0x67, 0x96),
- _INIT_DCS_CMD(0x68, 0x10),
- _INIT_DCS_CMD(0x69, 0x00),
- _INIT_DCS_CMD(0x6A, 0x96),
- _INIT_DCS_CMD(0x6B, 0x10),
- _INIT_DCS_CMD(0x6C, 0x00),
- _INIT_DCS_CMD(0x70, 0x92),
- _INIT_DCS_CMD(0x71, 0x10),
- _INIT_DCS_CMD(0x72, 0x00),
- _INIT_DCS_CMD(0x79, 0x96),
- _INIT_DCS_CMD(0x7A, 0x10),
- _INIT_DCS_CMD(0x88, 0x96),
- _INIT_DCS_CMD(0x89, 0x10),
-
- _INIT_DCS_CMD(0xA2, 0x3F),
- _INIT_DCS_CMD(0xA3, 0x30),
- _INIT_DCS_CMD(0xA4, 0xC0),
- _INIT_DCS_CMD(0xA5, 0x03),
-
- _INIT_DCS_CMD(0xE8, 0x00),
-
- _INIT_DCS_CMD(0x97, 0x3C),
- _INIT_DCS_CMD(0x98, 0x02),
- _INIT_DCS_CMD(0x99, 0x95),
- _INIT_DCS_CMD(0x9A, 0x06),
- _INIT_DCS_CMD(0x9B, 0x00),
- _INIT_DCS_CMD(0x9C, 0x0B),
- _INIT_DCS_CMD(0x9D, 0x0A),
- _INIT_DCS_CMD(0x9E, 0x90),
-
- _INIT_DCS_CMD(0xFF, 0x25),
- _INIT_DCS_CMD(0x13, 0x02),
- _INIT_DCS_CMD(0x14, 0xD7),
- _INIT_DCS_CMD(0xDB, 0x02),
- _INIT_DCS_CMD(0xDC, 0xD7),
- _INIT_DCS_CMD(0x17, 0xCF),
- _INIT_DCS_CMD(0x19, 0x0F),
- _INIT_DCS_CMD(0x1B, 0x5B),
-
- _INIT_DCS_CMD(0xFF, 0x20),
-
- _INIT_DCS_CMD(0xB0, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x24, 0x00, 0x38, 0x00, 0x4C, 0x00, 0x5E, 0x00, 0x6F, 0x00, 0x7E),
- _INIT_DCS_CMD(0xB1, 0x00, 0x8C, 0x00, 0xBE, 0x00, 0xE5, 0x01, 0x27, 0x01, 0x58, 0x01, 0xA8, 0x01, 0xE8, 0x01, 0xEA),
- _INIT_DCS_CMD(0xB2, 0x02, 0x28, 0x02, 0x71, 0x02, 0x9E, 0x02, 0xDA, 0x03, 0x00, 0x03, 0x31, 0x03, 0x40, 0x03, 0x51),
- _INIT_DCS_CMD(0xB3, 0x03, 0x62, 0x03, 0x75, 0x03, 0x89, 0x03, 0x9C, 0x03, 0xAA, 0x03, 0xB2),
-
- _INIT_DCS_CMD(0xB4, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x27, 0x00, 0x3D, 0x00, 0x52, 0x00, 0x64, 0x00, 0x75, 0x00, 0x84),
- _INIT_DCS_CMD(0xB5, 0x00, 0x93, 0x00, 0xC5, 0x00, 0xEC, 0x01, 0x2C, 0x01, 0x5D, 0x01, 0xAC, 0x01, 0xEC, 0x01, 0xEE),
- _INIT_DCS_CMD(0xB6, 0x02, 0x2B, 0x02, 0x73, 0x02, 0xA0, 0x02, 0xDB, 0x03, 0x01, 0x03, 0x31, 0x03, 0x41, 0x03, 0x51),
- _INIT_DCS_CMD(0xB7, 0x03, 0x63, 0x03, 0x75, 0x03, 0x89, 0x03, 0x9C, 0x03, 0xAA, 0x03, 0xB2),
-
- _INIT_DCS_CMD(0xB8, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x2A, 0x00, 0x40, 0x00, 0x56, 0x00, 0x68, 0x00, 0x7A, 0x00, 0x89),
- _INIT_DCS_CMD(0xB9, 0x00, 0x98, 0x00, 0xC9, 0x00, 0xF1, 0x01, 0x30, 0x01, 0x61, 0x01, 0xB0, 0x01, 0xEF, 0x01, 0xF1),
- _INIT_DCS_CMD(0xBA, 0x02, 0x2E, 0x02, 0x76, 0x02, 0xA3, 0x02, 0xDD, 0x03, 0x02, 0x03, 0x32, 0x03, 0x42, 0x03, 0x53),
- _INIT_DCS_CMD(0xBB, 0x03, 0x66, 0x03, 0x75, 0x03, 0x89, 0x03, 0x9C, 0x03, 0xAA, 0x03, 0xB2),
-
- _INIT_DCS_CMD(0xFF, 0x21),
- _INIT_DCS_CMD(0xB0, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x24, 0x00, 0x38, 0x00, 0x4C, 0x00, 0x5E, 0x00, 0x6F, 0x00, 0x7E),
- _INIT_DCS_CMD(0xB1, 0x00, 0x8C, 0x00, 0xBE, 0x00, 0xE5, 0x01, 0x27, 0x01, 0x58, 0x01, 0xA8, 0x01, 0xE8, 0x01, 0xEA),
- _INIT_DCS_CMD(0xB2, 0x02, 0x28, 0x02, 0x71, 0x02, 0x9E, 0x02, 0xDA, 0x03, 0x00, 0x03, 0x31, 0x03, 0x40, 0x03, 0x51),
- _INIT_DCS_CMD(0xB3, 0x03, 0x62, 0x03, 0x77, 0x03, 0x90, 0x03, 0xAC, 0x03, 0xCA, 0x03, 0xDA),
-
- _INIT_DCS_CMD(0xB4, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x27, 0x00, 0x3D, 0x00, 0x52, 0x00, 0x64, 0x00, 0x75, 0x00, 0x84),
- _INIT_DCS_CMD(0xB5, 0x00, 0x93, 0x00, 0xC5, 0x00, 0xEC, 0x01, 0x2C, 0x01, 0x5D, 0x01, 0xAC, 0x01, 0xEC, 0x01, 0xEE),
- _INIT_DCS_CMD(0xB6, 0x02, 0x2B, 0x02, 0x73, 0x02, 0xA0, 0x02, 0xDB, 0x03, 0x01, 0x03, 0x31, 0x03, 0x41, 0x03, 0x51),
- _INIT_DCS_CMD(0xB7, 0x03, 0x63, 0x03, 0x77, 0x03, 0x90, 0x03, 0xAC, 0x03, 0xCA, 0x03, 0xDA),
-
- _INIT_DCS_CMD(0xB8, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x2A, 0x00, 0x40, 0x00, 0x56, 0x00, 0x68, 0x00, 0x7A, 0x00, 0x89),
- _INIT_DCS_CMD(0xB9, 0x00, 0x98, 0x00, 0xC9, 0x00, 0xF1, 0x01, 0x30, 0x01, 0x61, 0x01, 0xB0, 0x01, 0xEF, 0x01, 0xF1),
- _INIT_DCS_CMD(0xBA, 0x02, 0x2E, 0x02, 0x76, 0x02, 0xA3, 0x02, 0xDD, 0x03, 0x02, 0x03, 0x32, 0x03, 0x42, 0x03, 0x53),
- _INIT_DCS_CMD(0xBB, 0x03, 0x66, 0x03, 0x77, 0x03, 0x90, 0x03, 0xAC, 0x03, 0xCA, 0x03, 0xDA),
-
- _INIT_DCS_CMD(0xFF, 0xF0),
- _INIT_DCS_CMD(0xFB, 0x01),
- _INIT_DCS_CMD(0x3A, 0x08),
-
- _INIT_DCS_CMD(0xFF, 0x10),
- _INIT_DCS_CMD(0xB9, 0x01),
-
- _INIT_DCS_CMD(0xFF, 0x20),
-
- _INIT_DCS_CMD(0x18, 0x40),
- _INIT_DCS_CMD(0xFF, 0x10),
-
- _INIT_DCS_CMD(0xB9, 0x02),
- _INIT_DCS_CMD(0xFF, 0x10),
-
- _INIT_DCS_CMD(0xFB, 0x01),
- _INIT_DCS_CMD(0xB0, 0x01),
- _INIT_DCS_CMD(0x35, 0x00),
- _INIT_DCS_CMD(0x3B, 0x03, 0xAE, 0x1A, 0x04, 0x04),
- _INIT_DELAY_CMD(100),
- _INIT_DCS_CMD(0x11),
- _INIT_DELAY_CMD(200),
- _INIT_DCS_CMD(0x29),
- _INIT_DELAY_CMD(100),
- {},
-};
+ return 0;
+}
-static const struct panel_init_cmd boe_init_cmd[] = {
- _INIT_DCS_CMD(0xB0, 0x05),
- _INIT_DCS_CMD(0xB1, 0xE5),
- _INIT_DCS_CMD(0xB3, 0x52),
- _INIT_DCS_CMD(0xB0, 0x00),
- _INIT_DCS_CMD(0xB3, 0x88),
- _INIT_DCS_CMD(0xB0, 0x04),
- _INIT_DCS_CMD(0xB8, 0x00),
- _INIT_DCS_CMD(0xB0, 0x00),
- _INIT_DCS_CMD(0xB6, 0x03),
- _INIT_DCS_CMD(0xBA, 0x8B),
- _INIT_DCS_CMD(0xBF, 0x1A),
- _INIT_DCS_CMD(0xC0, 0x0F),
- _INIT_DCS_CMD(0xC2, 0x0C),
- _INIT_DCS_CMD(0xC3, 0x02),
- _INIT_DCS_CMD(0xC4, 0x0C),
- _INIT_DCS_CMD(0xC5, 0x02),
- _INIT_DCS_CMD(0xB0, 0x01),
- _INIT_DCS_CMD(0xE0, 0x26),
- _INIT_DCS_CMD(0xE1, 0x26),
- _INIT_DCS_CMD(0xDC, 0x00),
- _INIT_DCS_CMD(0xDD, 0x00),
- _INIT_DCS_CMD(0xCC, 0x26),
- _INIT_DCS_CMD(0xCD, 0x26),
- _INIT_DCS_CMD(0xC8, 0x00),
- _INIT_DCS_CMD(0xC9, 0x00),
- _INIT_DCS_CMD(0xD2, 0x03),
- _INIT_DCS_CMD(0xD3, 0x03),
- _INIT_DCS_CMD(0xE6, 0x04),
- _INIT_DCS_CMD(0xE7, 0x04),
- _INIT_DCS_CMD(0xC4, 0x09),
- _INIT_DCS_CMD(0xC5, 0x09),
- _INIT_DCS_CMD(0xD8, 0x0A),
- _INIT_DCS_CMD(0xD9, 0x0A),
- _INIT_DCS_CMD(0xC2, 0x0B),
- _INIT_DCS_CMD(0xC3, 0x0B),
- _INIT_DCS_CMD(0xD6, 0x0C),
- _INIT_DCS_CMD(0xD7, 0x0C),
- _INIT_DCS_CMD(0xC0, 0x05),
- _INIT_DCS_CMD(0xC1, 0x05),
- _INIT_DCS_CMD(0xD4, 0x06),
- _INIT_DCS_CMD(0xD5, 0x06),
- _INIT_DCS_CMD(0xCA, 0x07),
- _INIT_DCS_CMD(0xCB, 0x07),
- _INIT_DCS_CMD(0xDE, 0x08),
- _INIT_DCS_CMD(0xDF, 0x08),
- _INIT_DCS_CMD(0xB0, 0x02),
- _INIT_DCS_CMD(0xC0, 0x00),
- _INIT_DCS_CMD(0xC1, 0x0D),
- _INIT_DCS_CMD(0xC2, 0x17),
- _INIT_DCS_CMD(0xC3, 0x26),
- _INIT_DCS_CMD(0xC4, 0x31),
- _INIT_DCS_CMD(0xC5, 0x1C),
- _INIT_DCS_CMD(0xC6, 0x2C),
- _INIT_DCS_CMD(0xC7, 0x33),
- _INIT_DCS_CMD(0xC8, 0x31),
- _INIT_DCS_CMD(0xC9, 0x37),
- _INIT_DCS_CMD(0xCA, 0x37),
- _INIT_DCS_CMD(0xCB, 0x37),
- _INIT_DCS_CMD(0xCC, 0x39),
- _INIT_DCS_CMD(0xCD, 0x2E),
- _INIT_DCS_CMD(0xCE, 0x2F),
- _INIT_DCS_CMD(0xCF, 0x2F),
- _INIT_DCS_CMD(0xD0, 0x07),
- _INIT_DCS_CMD(0xD2, 0x00),
- _INIT_DCS_CMD(0xD3, 0x0D),
- _INIT_DCS_CMD(0xD4, 0x17),
- _INIT_DCS_CMD(0xD5, 0x26),
- _INIT_DCS_CMD(0xD6, 0x31),
- _INIT_DCS_CMD(0xD7, 0x3F),
- _INIT_DCS_CMD(0xD8, 0x3F),
- _INIT_DCS_CMD(0xD9, 0x3F),
- _INIT_DCS_CMD(0xDA, 0x3F),
- _INIT_DCS_CMD(0xDB, 0x37),
- _INIT_DCS_CMD(0xDC, 0x37),
- _INIT_DCS_CMD(0xDD, 0x37),
- _INIT_DCS_CMD(0xDE, 0x39),
- _INIT_DCS_CMD(0xDF, 0x2E),
- _INIT_DCS_CMD(0xE0, 0x2F),
- _INIT_DCS_CMD(0xE1, 0x2F),
- _INIT_DCS_CMD(0xE2, 0x07),
- _INIT_DCS_CMD(0xB0, 0x03),
- _INIT_DCS_CMD(0xC8, 0x0B),
- _INIT_DCS_CMD(0xC9, 0x07),
- _INIT_DCS_CMD(0xC3, 0x00),
- _INIT_DCS_CMD(0xE7, 0x00),
- _INIT_DCS_CMD(0xC5, 0x2A),
- _INIT_DCS_CMD(0xDE, 0x2A),
- _INIT_DCS_CMD(0xCA, 0x43),
- _INIT_DCS_CMD(0xC9, 0x07),
- _INIT_DCS_CMD(0xE4, 0xC0),
- _INIT_DCS_CMD(0xE5, 0x0D),
- _INIT_DCS_CMD(0xCB, 0x00),
- _INIT_DCS_CMD(0xB0, 0x06),
- _INIT_DCS_CMD(0xB8, 0xA5),
- _INIT_DCS_CMD(0xC0, 0xA5),
- _INIT_DCS_CMD(0xC7, 0x0F),
- _INIT_DCS_CMD(0xD5, 0x32),
- _INIT_DCS_CMD(0xB8, 0x00),
- _INIT_DCS_CMD(0xC0, 0x00),
- _INIT_DCS_CMD(0xBC, 0x00),
- _INIT_DCS_CMD(0xB0, 0x07),
- _INIT_DCS_CMD(0xB1, 0x00),
- _INIT_DCS_CMD(0xB2, 0x02),
- _INIT_DCS_CMD(0xB3, 0x0F),
- _INIT_DCS_CMD(0xB4, 0x25),
- _INIT_DCS_CMD(0xB5, 0x39),
- _INIT_DCS_CMD(0xB6, 0x4E),
- _INIT_DCS_CMD(0xB7, 0x72),
- _INIT_DCS_CMD(0xB8, 0x97),
- _INIT_DCS_CMD(0xB9, 0xDC),
- _INIT_DCS_CMD(0xBA, 0x22),
- _INIT_DCS_CMD(0xBB, 0xA4),
- _INIT_DCS_CMD(0xBC, 0x2B),
- _INIT_DCS_CMD(0xBD, 0x2F),
- _INIT_DCS_CMD(0xBE, 0xA9),
- _INIT_DCS_CMD(0xBF, 0x25),
- _INIT_DCS_CMD(0xC0, 0x61),
- _INIT_DCS_CMD(0xC1, 0x97),
- _INIT_DCS_CMD(0xC2, 0xB2),
- _INIT_DCS_CMD(0xC3, 0xCD),
- _INIT_DCS_CMD(0xC4, 0xD9),
- _INIT_DCS_CMD(0xC5, 0xE7),
- _INIT_DCS_CMD(0xC6, 0xF4),
- _INIT_DCS_CMD(0xC7, 0xFA),
- _INIT_DCS_CMD(0xC8, 0xFC),
- _INIT_DCS_CMD(0xC9, 0x00),
- _INIT_DCS_CMD(0xCA, 0x00),
- _INIT_DCS_CMD(0xCB, 0x16),
- _INIT_DCS_CMD(0xCC, 0xAF),
- _INIT_DCS_CMD(0xCD, 0xFF),
- _INIT_DCS_CMD(0xCE, 0xFF),
- _INIT_DCS_CMD(0xB0, 0x08),
- _INIT_DCS_CMD(0xB1, 0x04),
- _INIT_DCS_CMD(0xB2, 0x05),
- _INIT_DCS_CMD(0xB3, 0x11),
- _INIT_DCS_CMD(0xB4, 0x24),
- _INIT_DCS_CMD(0xB5, 0x39),
- _INIT_DCS_CMD(0xB6, 0x4F),
- _INIT_DCS_CMD(0xB7, 0x72),
- _INIT_DCS_CMD(0xB8, 0x98),
- _INIT_DCS_CMD(0xB9, 0xDC),
- _INIT_DCS_CMD(0xBA, 0x23),
- _INIT_DCS_CMD(0xBB, 0xA6),
- _INIT_DCS_CMD(0xBC, 0x2C),
- _INIT_DCS_CMD(0xBD, 0x30),
- _INIT_DCS_CMD(0xBE, 0xAA),
- _INIT_DCS_CMD(0xBF, 0x26),
- _INIT_DCS_CMD(0xC0, 0x62),
- _INIT_DCS_CMD(0xC1, 0x9B),
- _INIT_DCS_CMD(0xC2, 0xB5),
- _INIT_DCS_CMD(0xC3, 0xCF),
- _INIT_DCS_CMD(0xC4, 0xDB),
- _INIT_DCS_CMD(0xC5, 0xE8),
- _INIT_DCS_CMD(0xC6, 0xF5),
- _INIT_DCS_CMD(0xC7, 0xFA),
- _INIT_DCS_CMD(0xC8, 0xFC),
- _INIT_DCS_CMD(0xC9, 0x00),
- _INIT_DCS_CMD(0xCA, 0x00),
- _INIT_DCS_CMD(0xCB, 0x16),
- _INIT_DCS_CMD(0xCC, 0xAF),
- _INIT_DCS_CMD(0xCD, 0xFF),
- _INIT_DCS_CMD(0xCE, 0xFF),
- _INIT_DCS_CMD(0xB0, 0x09),
- _INIT_DCS_CMD(0xB1, 0x04),
- _INIT_DCS_CMD(0xB2, 0x02),
- _INIT_DCS_CMD(0xB3, 0x16),
- _INIT_DCS_CMD(0xB4, 0x24),
- _INIT_DCS_CMD(0xB5, 0x3B),
- _INIT_DCS_CMD(0xB6, 0x4F),
- _INIT_DCS_CMD(0xB7, 0x73),
- _INIT_DCS_CMD(0xB8, 0x99),
- _INIT_DCS_CMD(0xB9, 0xE0),
- _INIT_DCS_CMD(0xBA, 0x26),
- _INIT_DCS_CMD(0xBB, 0xAD),
- _INIT_DCS_CMD(0xBC, 0x36),
- _INIT_DCS_CMD(0xBD, 0x3A),
- _INIT_DCS_CMD(0xBE, 0xAE),
- _INIT_DCS_CMD(0xBF, 0x2A),
- _INIT_DCS_CMD(0xC0, 0x66),
- _INIT_DCS_CMD(0xC1, 0x9E),
- _INIT_DCS_CMD(0xC2, 0xB8),
- _INIT_DCS_CMD(0xC3, 0xD1),
- _INIT_DCS_CMD(0xC4, 0xDD),
- _INIT_DCS_CMD(0xC5, 0xE9),
- _INIT_DCS_CMD(0xC6, 0xF6),
- _INIT_DCS_CMD(0xC7, 0xFA),
- _INIT_DCS_CMD(0xC8, 0xFC),
- _INIT_DCS_CMD(0xC9, 0x00),
- _INIT_DCS_CMD(0xCA, 0x00),
- _INIT_DCS_CMD(0xCB, 0x16),
- _INIT_DCS_CMD(0xCC, 0xAF),
- _INIT_DCS_CMD(0xCD, 0xFF),
- _INIT_DCS_CMD(0xCE, 0xFF),
- _INIT_DCS_CMD(0xB0, 0x0A),
- _INIT_DCS_CMD(0xB1, 0x00),
- _INIT_DCS_CMD(0xB2, 0x02),
- _INIT_DCS_CMD(0xB3, 0x0F),
- _INIT_DCS_CMD(0xB4, 0x25),
- _INIT_DCS_CMD(0xB5, 0x39),
- _INIT_DCS_CMD(0xB6, 0x4E),
- _INIT_DCS_CMD(0xB7, 0x72),
- _INIT_DCS_CMD(0xB8, 0x97),
- _INIT_DCS_CMD(0xB9, 0xDC),
- _INIT_DCS_CMD(0xBA, 0x22),
- _INIT_DCS_CMD(0xBB, 0xA4),
- _INIT_DCS_CMD(0xBC, 0x2B),
- _INIT_DCS_CMD(0xBD, 0x2F),
- _INIT_DCS_CMD(0xBE, 0xA9),
- _INIT_DCS_CMD(0xBF, 0x25),
- _INIT_DCS_CMD(0xC0, 0x61),
- _INIT_DCS_CMD(0xC1, 0x97),
- _INIT_DCS_CMD(0xC2, 0xB2),
- _INIT_DCS_CMD(0xC3, 0xCD),
- _INIT_DCS_CMD(0xC4, 0xD9),
- _INIT_DCS_CMD(0xC5, 0xE7),
- _INIT_DCS_CMD(0xC6, 0xF4),
- _INIT_DCS_CMD(0xC7, 0xFA),
- _INIT_DCS_CMD(0xC8, 0xFC),
- _INIT_DCS_CMD(0xC9, 0x00),
- _INIT_DCS_CMD(0xCA, 0x00),
- _INIT_DCS_CMD(0xCB, 0x16),
- _INIT_DCS_CMD(0xCC, 0xAF),
- _INIT_DCS_CMD(0xCD, 0xFF),
- _INIT_DCS_CMD(0xCE, 0xFF),
- _INIT_DCS_CMD(0xB0, 0x0B),
- _INIT_DCS_CMD(0xB1, 0x04),
- _INIT_DCS_CMD(0xB2, 0x05),
- _INIT_DCS_CMD(0xB3, 0x11),
- _INIT_DCS_CMD(0xB4, 0x24),
- _INIT_DCS_CMD(0xB5, 0x39),
- _INIT_DCS_CMD(0xB6, 0x4F),
- _INIT_DCS_CMD(0xB7, 0x72),
- _INIT_DCS_CMD(0xB8, 0x98),
- _INIT_DCS_CMD(0xB9, 0xDC),
- _INIT_DCS_CMD(0xBA, 0x23),
- _INIT_DCS_CMD(0xBB, 0xA6),
- _INIT_DCS_CMD(0xBC, 0x2C),
- _INIT_DCS_CMD(0xBD, 0x30),
- _INIT_DCS_CMD(0xBE, 0xAA),
- _INIT_DCS_CMD(0xBF, 0x26),
- _INIT_DCS_CMD(0xC0, 0x62),
- _INIT_DCS_CMD(0xC1, 0x9B),
- _INIT_DCS_CMD(0xC2, 0xB5),
- _INIT_DCS_CMD(0xC3, 0xCF),
- _INIT_DCS_CMD(0xC4, 0xDB),
- _INIT_DCS_CMD(0xC5, 0xE8),
- _INIT_DCS_CMD(0xC6, 0xF5),
- _INIT_DCS_CMD(0xC7, 0xFA),
- _INIT_DCS_CMD(0xC8, 0xFC),
- _INIT_DCS_CMD(0xC9, 0x00),
- _INIT_DCS_CMD(0xCA, 0x00),
- _INIT_DCS_CMD(0xCB, 0x16),
- _INIT_DCS_CMD(0xCC, 0xAF),
- _INIT_DCS_CMD(0xCD, 0xFF),
- _INIT_DCS_CMD(0xCE, 0xFF),
- _INIT_DCS_CMD(0xB0, 0x0C),
- _INIT_DCS_CMD(0xB1, 0x04),
- _INIT_DCS_CMD(0xB2, 0x02),
- _INIT_DCS_CMD(0xB3, 0x16),
- _INIT_DCS_CMD(0xB4, 0x24),
- _INIT_DCS_CMD(0xB5, 0x3B),
- _INIT_DCS_CMD(0xB6, 0x4F),
- _INIT_DCS_CMD(0xB7, 0x73),
- _INIT_DCS_CMD(0xB8, 0x99),
- _INIT_DCS_CMD(0xB9, 0xE0),
- _INIT_DCS_CMD(0xBA, 0x26),
- _INIT_DCS_CMD(0xBB, 0xAD),
- _INIT_DCS_CMD(0xBC, 0x36),
- _INIT_DCS_CMD(0xBD, 0x3A),
- _INIT_DCS_CMD(0xBE, 0xAE),
- _INIT_DCS_CMD(0xBF, 0x2A),
- _INIT_DCS_CMD(0xC0, 0x66),
- _INIT_DCS_CMD(0xC1, 0x9E),
- _INIT_DCS_CMD(0xC2, 0xB8),
- _INIT_DCS_CMD(0xC3, 0xD1),
- _INIT_DCS_CMD(0xC4, 0xDD),
- _INIT_DCS_CMD(0xC5, 0xE9),
- _INIT_DCS_CMD(0xC6, 0xF6),
- _INIT_DCS_CMD(0xC7, 0xFA),
- _INIT_DCS_CMD(0xC8, 0xFC),
- _INIT_DCS_CMD(0xC9, 0x00),
- _INIT_DCS_CMD(0xCA, 0x00),
- _INIT_DCS_CMD(0xCB, 0x16),
- _INIT_DCS_CMD(0xCC, 0xAF),
- _INIT_DCS_CMD(0xCD, 0xFF),
- _INIT_DCS_CMD(0xCE, 0xFF),
- _INIT_DCS_CMD(0xB0, 0x00),
- _INIT_DCS_CMD(0xB3, 0x08),
- _INIT_DCS_CMD(0xB0, 0x04),
- _INIT_DCS_CMD(0xB8, 0x68),
- _INIT_DELAY_CMD(150),
- {},
-};
+static int inx_hj110iz_init(struct mipi_dsi_device *dsi)
+{
+ int ret;
-static const struct panel_init_cmd auo_kd101n80_45na_init_cmd[] = {
- _INIT_DELAY_CMD(24),
- _INIT_DCS_CMD(0x11),
- _INIT_DELAY_CMD(120),
- _INIT_DCS_CMD(0x29),
- _INIT_DELAY_CMD(120),
- {},
-};
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x20);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x05, 0xD1);
+ mipi_dsi_dcs_write_seq(dsi, 0x0D, 0x63);
+ mipi_dsi_dcs_write_seq(dsi, 0x07, 0x8C);
+ mipi_dsi_dcs_write_seq(dsi, 0x08, 0x4B);
+ mipi_dsi_dcs_write_seq(dsi, 0x0E, 0x91);
+ mipi_dsi_dcs_write_seq(dsi, 0x0F, 0x69);
+ mipi_dsi_dcs_write_seq(dsi, 0x95, 0xF5);
+ mipi_dsi_dcs_write_seq(dsi, 0x96, 0xF5);
+ mipi_dsi_dcs_write_seq(dsi, 0x9D, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x9E, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x69, 0x98);
+ mipi_dsi_dcs_write_seq(dsi, 0x75, 0xA2);
+ mipi_dsi_dcs_write_seq(dsi, 0x77, 0xB3);
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x24);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x91, 0x44);
+ mipi_dsi_dcs_write_seq(dsi, 0x92, 0x7A);
+ mipi_dsi_dcs_write_seq(dsi, 0x93, 0x1A);
+ mipi_dsi_dcs_write_seq(dsi, 0x94, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0x9A, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x60, 0x96);
+ mipi_dsi_dcs_write_seq(dsi, 0x61, 0xD0);
+ mipi_dsi_dcs_write_seq(dsi, 0x63, 0x70);
+ mipi_dsi_dcs_write_seq(dsi, 0xC2, 0xCF);
+ mipi_dsi_dcs_write_seq(dsi, 0x9B, 0x0F);
+ mipi_dsi_dcs_write_seq(dsi, 0x9A, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x00, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x01, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x02, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x03, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x04, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x05, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x06, 0x22);
+ mipi_dsi_dcs_write_seq(dsi, 0x07, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x08, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x09, 0x1D);
+ mipi_dsi_dcs_write_seq(dsi, 0x0A, 0x1C);
+ mipi_dsi_dcs_write_seq(dsi, 0x0B, 0x13);
+ mipi_dsi_dcs_write_seq(dsi, 0x0C, 0x12);
+ mipi_dsi_dcs_write_seq(dsi, 0x0D, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0x0E, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0x0F, 0x0F);
+ mipi_dsi_dcs_write_seq(dsi, 0x10, 0x0E);
+ mipi_dsi_dcs_write_seq(dsi, 0x11, 0x0D);
+ mipi_dsi_dcs_write_seq(dsi, 0x12, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0x13, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x14, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x15, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x16, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x17, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x18, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x19, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x1A, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x1B, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x1C, 0x22);
+ mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x1E, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x1F, 0x1D);
+ mipi_dsi_dcs_write_seq(dsi, 0x20, 0x1C);
+ mipi_dsi_dcs_write_seq(dsi, 0x21, 0x13);
+ mipi_dsi_dcs_write_seq(dsi, 0x22, 0x12);
+ mipi_dsi_dcs_write_seq(dsi, 0x23, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0x24, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0x25, 0x0F);
+ mipi_dsi_dcs_write_seq(dsi, 0x26, 0x0E);
+ mipi_dsi_dcs_write_seq(dsi, 0x27, 0x0D);
+ mipi_dsi_dcs_write_seq(dsi, 0x28, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0x29, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x03);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x2F, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0x30, 0x32);
+ mipi_dsi_dcs_write_seq(dsi, 0x31, 0x43);
+ mipi_dsi_dcs_write_seq(dsi, 0x33, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0x34, 0x32);
+ mipi_dsi_dcs_write_seq(dsi, 0x35, 0x43);
+ mipi_dsi_dcs_write_seq(dsi, 0x37, 0x44);
+ mipi_dsi_dcs_write_seq(dsi, 0x38, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0x39, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x18);
+ mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x93);
+ mipi_dsi_dcs_write_seq(dsi, 0xAB, 0x44);
+ mipi_dsi_dcs_write_seq(dsi, 0xAC, 0x40);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x4D, 0x21);
+ mipi_dsi_dcs_write_seq(dsi, 0x4E, 0x43);
+ mipi_dsi_dcs_write_seq(dsi, 0x4F, 0x65);
+ mipi_dsi_dcs_write_seq(dsi, 0x50, 0x87);
+ mipi_dsi_dcs_write_seq(dsi, 0x51, 0x78);
+ mipi_dsi_dcs_write_seq(dsi, 0x52, 0x56);
+ mipi_dsi_dcs_write_seq(dsi, 0x53, 0x34);
+ mipi_dsi_dcs_write_seq(dsi, 0x54, 0x21);
+ mipi_dsi_dcs_write_seq(dsi, 0x55, 0x83);
+ mipi_dsi_dcs_write_seq(dsi, 0x56, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x58, 0x21);
+ mipi_dsi_dcs_write_seq(dsi, 0x59, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0x5A, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x5B, 0x2C);
+ mipi_dsi_dcs_write_seq(dsi, 0x5E, 0x00, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0x5F, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x7A, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x7B, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x7C, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x7D, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x7E, 0x20);
+ mipi_dsi_dcs_write_seq(dsi, 0x7F, 0x3C);
+ mipi_dsi_dcs_write_seq(dsi, 0x80, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x81, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x82, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x97, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0xC5, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0xDA, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xDB, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xDC, 0x7A);
+ mipi_dsi_dcs_write_seq(dsi, 0xDD, 0x55);
+ mipi_dsi_dcs_write_seq(dsi, 0xDE, 0x27);
+ mipi_dsi_dcs_write_seq(dsi, 0xDF, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x7A);
+ mipi_dsi_dcs_write_seq(dsi, 0xE1, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xE2, 0x7A);
+ mipi_dsi_dcs_write_seq(dsi, 0xE3, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xE4, 0x7A);
+ mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x7A);
+ mipi_dsi_dcs_write_seq(dsi, 0xE7, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xE8, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xE9, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xEA, 0x7A);
+ mipi_dsi_dcs_write_seq(dsi, 0xEB, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xEE, 0x7A);
+ mipi_dsi_dcs_write_seq(dsi, 0xEF, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xF0, 0x7A);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xB6, 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05, 0x00, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x25);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x05, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x13, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x14, 0xDF);
+ mipi_dsi_dcs_write_seq(dsi, 0xF1, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0x1E, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x1F, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x20, 0x2C);
+ mipi_dsi_dcs_write_seq(dsi, 0x25, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x26, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x27, 0x2C);
+ mipi_dsi_dcs_write_seq(dsi, 0x3F, 0x80);
+ mipi_dsi_dcs_write_seq(dsi, 0x40, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x43, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x44, 0x18);
+ mipi_dsi_dcs_write_seq(dsi, 0x45, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x48, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x49, 0x2C);
+ mipi_dsi_dcs_write_seq(dsi, 0x5B, 0x80);
+ mipi_dsi_dcs_write_seq(dsi, 0x5C, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x5D, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x5E, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x61, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x62, 0x2C);
+ mipi_dsi_dcs_write_seq(dsi, 0x68, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x26);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x00, 0xA1);
+ mipi_dsi_dcs_write_seq(dsi, 0x02, 0x31);
+ mipi_dsi_dcs_write_seq(dsi, 0x0A, 0xF2);
+ mipi_dsi_dcs_write_seq(dsi, 0x04, 0x28);
+ mipi_dsi_dcs_write_seq(dsi, 0x06, 0x30);
+ mipi_dsi_dcs_write_seq(dsi, 0x0C, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0x0D, 0x0D);
+ mipi_dsi_dcs_write_seq(dsi, 0x0F, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x11, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x12, 0x50);
+ mipi_dsi_dcs_write_seq(dsi, 0x13, 0x56);
+ mipi_dsi_dcs_write_seq(dsi, 0x14, 0x57);
+ mipi_dsi_dcs_write_seq(dsi, 0x15, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x16, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0x17, 0xA0);
+ mipi_dsi_dcs_write_seq(dsi, 0x18, 0x86);
+ mipi_dsi_dcs_write_seq(dsi, 0x22, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x23, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x19, 0x0D);
+ mipi_dsi_dcs_write_seq(dsi, 0x1A, 0x7F);
+ mipi_dsi_dcs_write_seq(dsi, 0x1B, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0x1C, 0xBF);
+ mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x0D);
+ mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x7F);
+ mipi_dsi_dcs_write_seq(dsi, 0x20, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x1E, 0x78);
+ mipi_dsi_dcs_write_seq(dsi, 0x1F, 0x78);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x2F, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x30, 0x78);
+ mipi_dsi_dcs_write_seq(dsi, 0x33, 0x78);
+ mipi_dsi_dcs_write_seq(dsi, 0x34, 0x66);
+ mipi_dsi_dcs_write_seq(dsi, 0x35, 0x11);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x39, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x78);
+ mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x06);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xC8, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xC9, 0x84);
+ mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x4E);
+ mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xA9, 0x50);
+ mipi_dsi_dcs_write_seq(dsi, 0xAA, 0x4F);
+ mipi_dsi_dcs_write_seq(dsi, 0xAB, 0x4D);
+ mipi_dsi_dcs_write_seq(dsi, 0xAC, 0x4A);
+ mipi_dsi_dcs_write_seq(dsi, 0xAD, 0x48);
+ mipi_dsi_dcs_write_seq(dsi, 0xAE, 0x46);
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x27);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x18);
+ mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xC2, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x56, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x58, 0x80);
+ mipi_dsi_dcs_write_seq(dsi, 0x59, 0x75);
+ mipi_dsi_dcs_write_seq(dsi, 0x5A, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x5B, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x5C, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x5D, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x5E, 0x20);
+ mipi_dsi_dcs_write_seq(dsi, 0x5F, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0x60, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x61, 0x2E);
+ mipi_dsi_dcs_write_seq(dsi, 0x62, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x63, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x64, 0x43);
+ mipi_dsi_dcs_write_seq(dsi, 0x65, 0x2D);
+ mipi_dsi_dcs_write_seq(dsi, 0x66, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x67, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x68, 0x43);
+ mipi_dsi_dcs_write_seq(dsi, 0x98, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x9B, 0xBD);
+ mipi_dsi_dcs_write_seq(dsi, 0xA0, 0x90);
+ mipi_dsi_dcs_write_seq(dsi, 0xAB, 0x1B);
+ mipi_dsi_dcs_write_seq(dsi, 0xBC, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x28);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x2A);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x22, 0x2F);
+ mipi_dsi_dcs_write_seq(dsi, 0x23, 0x08);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x24, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x25, 0x65);
+ mipi_dsi_dcs_write_seq(dsi, 0x26, 0xF8);
+ mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x28, 0x1A);
+ mipi_dsi_dcs_write_seq(dsi, 0x29, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x1A);
+ mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x2D, 0x1A);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x64, 0x96);
+ mipi_dsi_dcs_write_seq(dsi, 0x65, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x66, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x6A, 0x96);
+ mipi_dsi_dcs_write_seq(dsi, 0x6B, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x6C, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x70, 0x92);
+ mipi_dsi_dcs_write_seq(dsi, 0x71, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x72, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xA2, 0x33);
+ mipi_dsi_dcs_write_seq(dsi, 0xA3, 0x30);
+ mipi_dsi_dcs_write_seq(dsi, 0xA4, 0xC0);
+ mipi_dsi_dcs_write_seq(dsi, 0xE8, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x97, 0x3C);
+ mipi_dsi_dcs_write_seq(dsi, 0x98, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x99, 0x95);
+ mipi_dsi_dcs_write_seq(dsi, 0x9A, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x9B, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x9C, 0x0B);
+ mipi_dsi_dcs_write_seq(dsi, 0x9D, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0x9E, 0x90);
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0xF0);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0xD0);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x00, 0x33);
+ mipi_dsi_dcs_write_seq(dsi, 0x08, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x09, 0xBF);
+ mipi_dsi_dcs_write_seq(dsi, 0x2F, 0x33);
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x23);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x00, 0x80);
+ mipi_dsi_dcs_write_seq(dsi, 0x07, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x20);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x30, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x24);
+ mipi_dsi_dcs_write_seq(dsi, 0x5C, 0x88);
+ mipi_dsi_dcs_write_seq(dsi, 0x5D, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x20);
+ mipi_dsi_dcs_write_seq(dsi, 0x18, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xBB, 0x13);
+ mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x03, 0x96, 0x1A, 0x04, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x35, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x51, 0x0F, 0xFF);
+ mipi_dsi_dcs_write_seq(dsi, 0x53, 0x24);
+ msleep(100);
+ ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
+ if (ret)
+ return ret;
+ msleep(200);
+ ret = mipi_dsi_dcs_set_display_on(dsi);
+ if (ret)
+ return ret;
+ msleep(100);
-static const struct panel_init_cmd auo_b101uan08_3_init_cmd[] = {
- _INIT_DELAY_CMD(24),
- _INIT_DCS_CMD(0xB0, 0x01),
- _INIT_DCS_CMD(0xC0, 0x48),
- _INIT_DCS_CMD(0xC1, 0x48),
- _INIT_DCS_CMD(0xC2, 0x47),
- _INIT_DCS_CMD(0xC3, 0x47),
- _INIT_DCS_CMD(0xC4, 0x46),
- _INIT_DCS_CMD(0xC5, 0x46),
- _INIT_DCS_CMD(0xC6, 0x45),
- _INIT_DCS_CMD(0xC7, 0x45),
- _INIT_DCS_CMD(0xC8, 0x64),
- _INIT_DCS_CMD(0xC9, 0x64),
- _INIT_DCS_CMD(0xCA, 0x4F),
- _INIT_DCS_CMD(0xCB, 0x4F),
- _INIT_DCS_CMD(0xCC, 0x40),
- _INIT_DCS_CMD(0xCD, 0x40),
- _INIT_DCS_CMD(0xCE, 0x66),
- _INIT_DCS_CMD(0xCF, 0x66),
- _INIT_DCS_CMD(0xD0, 0x4F),
- _INIT_DCS_CMD(0xD1, 0x4F),
- _INIT_DCS_CMD(0xD2, 0x41),
- _INIT_DCS_CMD(0xD3, 0x41),
- _INIT_DCS_CMD(0xD4, 0x48),
- _INIT_DCS_CMD(0xD5, 0x48),
- _INIT_DCS_CMD(0xD6, 0x47),
- _INIT_DCS_CMD(0xD7, 0x47),
- _INIT_DCS_CMD(0xD8, 0x46),
- _INIT_DCS_CMD(0xD9, 0x46),
- _INIT_DCS_CMD(0xDA, 0x45),
- _INIT_DCS_CMD(0xDB, 0x45),
- _INIT_DCS_CMD(0xDC, 0x64),
- _INIT_DCS_CMD(0xDD, 0x64),
- _INIT_DCS_CMD(0xDE, 0x4F),
- _INIT_DCS_CMD(0xDF, 0x4F),
- _INIT_DCS_CMD(0xE0, 0x40),
- _INIT_DCS_CMD(0xE1, 0x40),
- _INIT_DCS_CMD(0xE2, 0x66),
- _INIT_DCS_CMD(0xE3, 0x66),
- _INIT_DCS_CMD(0xE4, 0x4F),
- _INIT_DCS_CMD(0xE5, 0x4F),
- _INIT_DCS_CMD(0xE6, 0x41),
- _INIT_DCS_CMD(0xE7, 0x41),
- _INIT_DELAY_CMD(150),
- {},
-};
+ return 0;
+}
-static const struct panel_init_cmd starry_qfh032011_53g_init_cmd[] = {
- _INIT_DCS_CMD(0xB0, 0x01),
- _INIT_DCS_CMD(0xC3, 0x4F),
- _INIT_DCS_CMD(0xC4, 0x40),
- _INIT_DCS_CMD(0xC5, 0x40),
- _INIT_DCS_CMD(0xC6, 0x40),
- _INIT_DCS_CMD(0xC7, 0x40),
- _INIT_DCS_CMD(0xC8, 0x4D),
- _INIT_DCS_CMD(0xC9, 0x52),
- _INIT_DCS_CMD(0xCA, 0x51),
- _INIT_DCS_CMD(0xCD, 0x5D),
- _INIT_DCS_CMD(0xCE, 0x5B),
- _INIT_DCS_CMD(0xCF, 0x4B),
- _INIT_DCS_CMD(0xD0, 0x49),
- _INIT_DCS_CMD(0xD1, 0x47),
- _INIT_DCS_CMD(0xD2, 0x45),
- _INIT_DCS_CMD(0xD3, 0x41),
- _INIT_DCS_CMD(0xD7, 0x50),
- _INIT_DCS_CMD(0xD8, 0x40),
- _INIT_DCS_CMD(0xD9, 0x40),
- _INIT_DCS_CMD(0xDA, 0x40),
- _INIT_DCS_CMD(0xDB, 0x40),
- _INIT_DCS_CMD(0xDC, 0x4E),
- _INIT_DCS_CMD(0xDD, 0x52),
- _INIT_DCS_CMD(0xDE, 0x51),
- _INIT_DCS_CMD(0xE1, 0x5E),
- _INIT_DCS_CMD(0xE2, 0x5C),
- _INIT_DCS_CMD(0xE3, 0x4C),
- _INIT_DCS_CMD(0xE4, 0x4A),
- _INIT_DCS_CMD(0xE5, 0x48),
- _INIT_DCS_CMD(0xE6, 0x46),
- _INIT_DCS_CMD(0xE7, 0x42),
- _INIT_DCS_CMD(0xB0, 0x03),
- _INIT_DCS_CMD(0xBE, 0x03),
- _INIT_DCS_CMD(0xCC, 0x44),
- _INIT_DCS_CMD(0xC8, 0x07),
- _INIT_DCS_CMD(0xC9, 0x05),
- _INIT_DCS_CMD(0xCA, 0x42),
- _INIT_DCS_CMD(0xCD, 0x3E),
- _INIT_DCS_CMD(0xCF, 0x60),
- _INIT_DCS_CMD(0xD2, 0x04),
- _INIT_DCS_CMD(0xD3, 0x04),
- _INIT_DCS_CMD(0xD4, 0x01),
- _INIT_DCS_CMD(0xD5, 0x00),
- _INIT_DCS_CMD(0xD6, 0x03),
- _INIT_DCS_CMD(0xD7, 0x04),
- _INIT_DCS_CMD(0xD9, 0x01),
- _INIT_DCS_CMD(0xDB, 0x01),
- _INIT_DCS_CMD(0xE4, 0xF0),
- _INIT_DCS_CMD(0xE5, 0x0A),
- _INIT_DCS_CMD(0xB0, 0x00),
- _INIT_DCS_CMD(0xCC, 0x08),
- _INIT_DCS_CMD(0xC2, 0x08),
- _INIT_DCS_CMD(0xC4, 0x10),
- _INIT_DCS_CMD(0xB0, 0x02),
- _INIT_DCS_CMD(0xC0, 0x00),
- _INIT_DCS_CMD(0xC1, 0x0A),
- _INIT_DCS_CMD(0xC2, 0x20),
- _INIT_DCS_CMD(0xC3, 0x24),
- _INIT_DCS_CMD(0xC4, 0x23),
- _INIT_DCS_CMD(0xC5, 0x29),
- _INIT_DCS_CMD(0xC6, 0x23),
- _INIT_DCS_CMD(0xC7, 0x1C),
- _INIT_DCS_CMD(0xC8, 0x19),
- _INIT_DCS_CMD(0xC9, 0x17),
- _INIT_DCS_CMD(0xCA, 0x17),
- _INIT_DCS_CMD(0xCB, 0x18),
- _INIT_DCS_CMD(0xCC, 0x1A),
- _INIT_DCS_CMD(0xCD, 0x1E),
- _INIT_DCS_CMD(0xCE, 0x20),
- _INIT_DCS_CMD(0xCF, 0x23),
- _INIT_DCS_CMD(0xD0, 0x07),
- _INIT_DCS_CMD(0xD1, 0x00),
- _INIT_DCS_CMD(0xD2, 0x00),
- _INIT_DCS_CMD(0xD3, 0x0A),
- _INIT_DCS_CMD(0xD4, 0x13),
- _INIT_DCS_CMD(0xD5, 0x1C),
- _INIT_DCS_CMD(0xD6, 0x1A),
- _INIT_DCS_CMD(0xD7, 0x13),
- _INIT_DCS_CMD(0xD8, 0x17),
- _INIT_DCS_CMD(0xD9, 0x1C),
- _INIT_DCS_CMD(0xDA, 0x19),
- _INIT_DCS_CMD(0xDB, 0x17),
- _INIT_DCS_CMD(0xDC, 0x17),
- _INIT_DCS_CMD(0xDD, 0x18),
- _INIT_DCS_CMD(0xDE, 0x1A),
- _INIT_DCS_CMD(0xDF, 0x1E),
- _INIT_DCS_CMD(0xE0, 0x20),
- _INIT_DCS_CMD(0xE1, 0x23),
- _INIT_DCS_CMD(0xE2, 0x07),
- _INIT_DCS_CMD(0X11),
- _INIT_DELAY_CMD(120),
- _INIT_DCS_CMD(0X29),
- _INIT_DELAY_CMD(80),
- {},
-};
+static int boe_init(struct mipi_dsi_device *dsi)
+{
+ msleep(24);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xB1, 0xE5);
+ mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x52);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x88);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xB6, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x8B);
+ mipi_dsi_dcs_write_seq(dsi, 0xBF, 0x1A);
+ mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x0F);
+ mipi_dsi_dcs_write_seq(dsi, 0xC2, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0xC3, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0xC4, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0xC5, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x26);
+ mipi_dsi_dcs_write_seq(dsi, 0xE1, 0x26);
+ mipi_dsi_dcs_write_seq(dsi, 0xDC, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xDD, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xCC, 0x26);
+ mipi_dsi_dcs_write_seq(dsi, 0xCD, 0x26);
+ mipi_dsi_dcs_write_seq(dsi, 0xC8, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xC9, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xD2, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xE7, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xC4, 0x09);
+ mipi_dsi_dcs_write_seq(dsi, 0xC5, 0x09);
+ mipi_dsi_dcs_write_seq(dsi, 0xD8, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0xD9, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0xC2, 0x0B);
+ mipi_dsi_dcs_write_seq(dsi, 0xC3, 0x0B);
+ mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0xD7, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xD4, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0xD5, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0xDE, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0xDF, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x0D);
+ mipi_dsi_dcs_write_seq(dsi, 0xC2, 0x17);
+ mipi_dsi_dcs_write_seq(dsi, 0xC3, 0x26);
+ mipi_dsi_dcs_write_seq(dsi, 0xC4, 0x31);
+ mipi_dsi_dcs_write_seq(dsi, 0xC5, 0x1C);
+ mipi_dsi_dcs_write_seq(dsi, 0xC6, 0x2C);
+ mipi_dsi_dcs_write_seq(dsi, 0xC7, 0x33);
+ mipi_dsi_dcs_write_seq(dsi, 0xC8, 0x31);
+ mipi_dsi_dcs_write_seq(dsi, 0xC9, 0x37);
+ mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x37);
+ mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x37);
+ mipi_dsi_dcs_write_seq(dsi, 0xCC, 0x39);
+ mipi_dsi_dcs_write_seq(dsi, 0xCD, 0x2E);
+ mipi_dsi_dcs_write_seq(dsi, 0xCE, 0x2F);
+ mipi_dsi_dcs_write_seq(dsi, 0xCF, 0x2F);
+ mipi_dsi_dcs_write_seq(dsi, 0xD0, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0xD2, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x0D);
+ mipi_dsi_dcs_write_seq(dsi, 0xD4, 0x17);
+ mipi_dsi_dcs_write_seq(dsi, 0xD5, 0x26);
+ mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x31);
+ mipi_dsi_dcs_write_seq(dsi, 0xD7, 0x3F);
+ mipi_dsi_dcs_write_seq(dsi, 0xD8, 0x3F);
+ mipi_dsi_dcs_write_seq(dsi, 0xD9, 0x3F);
+ mipi_dsi_dcs_write_seq(dsi, 0xDA, 0x3F);
+ mipi_dsi_dcs_write_seq(dsi, 0xDB, 0x37);
+ mipi_dsi_dcs_write_seq(dsi, 0xDC, 0x37);
+ mipi_dsi_dcs_write_seq(dsi, 0xDD, 0x37);
+ mipi_dsi_dcs_write_seq(dsi, 0xDE, 0x39);
+ mipi_dsi_dcs_write_seq(dsi, 0xDF, 0x2E);
+ mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x2F);
+ mipi_dsi_dcs_write_seq(dsi, 0xE1, 0x2F);
+ mipi_dsi_dcs_write_seq(dsi, 0xE2, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0xC8, 0x0B);
+ mipi_dsi_dcs_write_seq(dsi, 0xC9, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0xC3, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xE7, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xC5, 0x2A);
+ mipi_dsi_dcs_write_seq(dsi, 0xDE, 0x2A);
+ mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x43);
+ mipi_dsi_dcs_write_seq(dsi, 0xC9, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0xE4, 0xC0);
+ mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x0D);
+ mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0xB8, 0xA5);
+ mipi_dsi_dcs_write_seq(dsi, 0xC0, 0xA5);
+ mipi_dsi_dcs_write_seq(dsi, 0xC7, 0x0F);
+ mipi_dsi_dcs_write_seq(dsi, 0xD5, 0x32);
+ mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xBC, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xB2, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x0F);
+ mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x25);
+ mipi_dsi_dcs_write_seq(dsi, 0xB5, 0x39);
+ mipi_dsi_dcs_write_seq(dsi, 0xB6, 0x4E);
+ mipi_dsi_dcs_write_seq(dsi, 0xB7, 0x72);
+ mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x97);
+ mipi_dsi_dcs_write_seq(dsi, 0xB9, 0xDC);
+ mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x22);
+ mipi_dsi_dcs_write_seq(dsi, 0xBB, 0xA4);
+ mipi_dsi_dcs_write_seq(dsi, 0xBC, 0x2B);
+ mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x2F);
+ mipi_dsi_dcs_write_seq(dsi, 0xBE, 0xA9);
+ mipi_dsi_dcs_write_seq(dsi, 0xBF, 0x25);
+ mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x61);
+ mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x97);
+ mipi_dsi_dcs_write_seq(dsi, 0xC2, 0xB2);
+ mipi_dsi_dcs_write_seq(dsi, 0xC3, 0xCD);
+ mipi_dsi_dcs_write_seq(dsi, 0xC4, 0xD9);
+ mipi_dsi_dcs_write_seq(dsi, 0xC5, 0xE7);
+ mipi_dsi_dcs_write_seq(dsi, 0xC6, 0xF4);
+ mipi_dsi_dcs_write_seq(dsi, 0xC7, 0xFA);
+ mipi_dsi_dcs_write_seq(dsi, 0xC8, 0xFC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC9, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0xCC, 0xAF);
+ mipi_dsi_dcs_write_seq(dsi, 0xCD, 0xFF);
+ mipi_dsi_dcs_write_seq(dsi, 0xCE, 0xFF);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xB2, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x24);
+ mipi_dsi_dcs_write_seq(dsi, 0xB5, 0x39);
+ mipi_dsi_dcs_write_seq(dsi, 0xB6, 0x4F);
+ mipi_dsi_dcs_write_seq(dsi, 0xB7, 0x72);
+ mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x98);
+ mipi_dsi_dcs_write_seq(dsi, 0xB9, 0xDC);
+ mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x23);
+ mipi_dsi_dcs_write_seq(dsi, 0xBB, 0xA6);
+ mipi_dsi_dcs_write_seq(dsi, 0xBC, 0x2C);
+ mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x30);
+ mipi_dsi_dcs_write_seq(dsi, 0xBE, 0xAA);
+ mipi_dsi_dcs_write_seq(dsi, 0xBF, 0x26);
+ mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x62);
+ mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x9B);
+ mipi_dsi_dcs_write_seq(dsi, 0xC2, 0xB5);
+ mipi_dsi_dcs_write_seq(dsi, 0xC3, 0xCF);
+ mipi_dsi_dcs_write_seq(dsi, 0xC4, 0xDB);
+ mipi_dsi_dcs_write_seq(dsi, 0xC5, 0xE8);
+ mipi_dsi_dcs_write_seq(dsi, 0xC6, 0xF5);
+ mipi_dsi_dcs_write_seq(dsi, 0xC7, 0xFA);
+ mipi_dsi_dcs_write_seq(dsi, 0xC8, 0xFC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC9, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0xCC, 0xAF);
+ mipi_dsi_dcs_write_seq(dsi, 0xCD, 0xFF);
+ mipi_dsi_dcs_write_seq(dsi, 0xCE, 0xFF);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x09);
+ mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xB2, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x24);
+ mipi_dsi_dcs_write_seq(dsi, 0xB5, 0x3B);
+ mipi_dsi_dcs_write_seq(dsi, 0xB6, 0x4F);
+ mipi_dsi_dcs_write_seq(dsi, 0xB7, 0x73);
+ mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x99);
+ mipi_dsi_dcs_write_seq(dsi, 0xB9, 0xE0);
+ mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x26);
+ mipi_dsi_dcs_write_seq(dsi, 0xBB, 0xAD);
+ mipi_dsi_dcs_write_seq(dsi, 0xBC, 0x36);
+ mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x3A);
+ mipi_dsi_dcs_write_seq(dsi, 0xBE, 0xAE);
+ mipi_dsi_dcs_write_seq(dsi, 0xBF, 0x2A);
+ mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x66);
+ mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x9E);
+ mipi_dsi_dcs_write_seq(dsi, 0xC2, 0xB8);
+ mipi_dsi_dcs_write_seq(dsi, 0xC3, 0xD1);
+ mipi_dsi_dcs_write_seq(dsi, 0xC4, 0xDD);
+ mipi_dsi_dcs_write_seq(dsi, 0xC5, 0xE9);
+ mipi_dsi_dcs_write_seq(dsi, 0xC6, 0xF6);
+ mipi_dsi_dcs_write_seq(dsi, 0xC7, 0xFA);
+ mipi_dsi_dcs_write_seq(dsi, 0xC8, 0xFC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC9, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0xCC, 0xAF);
+ mipi_dsi_dcs_write_seq(dsi, 0xCD, 0xFF);
+ mipi_dsi_dcs_write_seq(dsi, 0xCE, 0xFF);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xB2, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x0F);
+ mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x25);
+ mipi_dsi_dcs_write_seq(dsi, 0xB5, 0x39);
+ mipi_dsi_dcs_write_seq(dsi, 0xB6, 0x4E);
+ mipi_dsi_dcs_write_seq(dsi, 0xB7, 0x72);
+ mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x97);
+ mipi_dsi_dcs_write_seq(dsi, 0xB9, 0xDC);
+ mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x22);
+ mipi_dsi_dcs_write_seq(dsi, 0xBB, 0xA4);
+ mipi_dsi_dcs_write_seq(dsi, 0xBC, 0x2B);
+ mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x2F);
+ mipi_dsi_dcs_write_seq(dsi, 0xBE, 0xA9);
+ mipi_dsi_dcs_write_seq(dsi, 0xBF, 0x25);
+ mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x61);
+ mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x97);
+ mipi_dsi_dcs_write_seq(dsi, 0xC2, 0xB2);
+ mipi_dsi_dcs_write_seq(dsi, 0xC3, 0xCD);
+ mipi_dsi_dcs_write_seq(dsi, 0xC4, 0xD9);
+ mipi_dsi_dcs_write_seq(dsi, 0xC5, 0xE7);
+ mipi_dsi_dcs_write_seq(dsi, 0xC6, 0xF4);
+ mipi_dsi_dcs_write_seq(dsi, 0xC7, 0xFA);
+ mipi_dsi_dcs_write_seq(dsi, 0xC8, 0xFC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC9, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0xCC, 0xAF);
+ mipi_dsi_dcs_write_seq(dsi, 0xCD, 0xFF);
+ mipi_dsi_dcs_write_seq(dsi, 0xCE, 0xFF);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x0B);
+ mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xB2, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x24);
+ mipi_dsi_dcs_write_seq(dsi, 0xB5, 0x39);
+ mipi_dsi_dcs_write_seq(dsi, 0xB6, 0x4F);
+ mipi_dsi_dcs_write_seq(dsi, 0xB7, 0x72);
+ mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x98);
+ mipi_dsi_dcs_write_seq(dsi, 0xB9, 0xDC);
+ mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x23);
+ mipi_dsi_dcs_write_seq(dsi, 0xBB, 0xA6);
+ mipi_dsi_dcs_write_seq(dsi, 0xBC, 0x2C);
+ mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x30);
+ mipi_dsi_dcs_write_seq(dsi, 0xBE, 0xAA);
+ mipi_dsi_dcs_write_seq(dsi, 0xBF, 0x26);
+ mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x62);
+ mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x9B);
+ mipi_dsi_dcs_write_seq(dsi, 0xC2, 0xB5);
+ mipi_dsi_dcs_write_seq(dsi, 0xC3, 0xCF);
+ mipi_dsi_dcs_write_seq(dsi, 0xC4, 0xDB);
+ mipi_dsi_dcs_write_seq(dsi, 0xC5, 0xE8);
+ mipi_dsi_dcs_write_seq(dsi, 0xC6, 0xF5);
+ mipi_dsi_dcs_write_seq(dsi, 0xC7, 0xFA);
+ mipi_dsi_dcs_write_seq(dsi, 0xC8, 0xFC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC9, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0xCC, 0xAF);
+ mipi_dsi_dcs_write_seq(dsi, 0xCD, 0xFF);
+ mipi_dsi_dcs_write_seq(dsi, 0xCE, 0xFF);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xB2, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x24);
+ mipi_dsi_dcs_write_seq(dsi, 0xB5, 0x3B);
+ mipi_dsi_dcs_write_seq(dsi, 0xB6, 0x4F);
+ mipi_dsi_dcs_write_seq(dsi, 0xB7, 0x73);
+ mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x99);
+ mipi_dsi_dcs_write_seq(dsi, 0xB9, 0xE0);
+ mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x26);
+ mipi_dsi_dcs_write_seq(dsi, 0xBB, 0xAD);
+ mipi_dsi_dcs_write_seq(dsi, 0xBC, 0x36);
+ mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x3A);
+ mipi_dsi_dcs_write_seq(dsi, 0xBE, 0xAE);
+ mipi_dsi_dcs_write_seq(dsi, 0xBF, 0x2A);
+ mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x66);
+ mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x9E);
+ mipi_dsi_dcs_write_seq(dsi, 0xC2, 0xB8);
+ mipi_dsi_dcs_write_seq(dsi, 0xC3, 0xD1);
+ mipi_dsi_dcs_write_seq(dsi, 0xC4, 0xDD);
+ mipi_dsi_dcs_write_seq(dsi, 0xC5, 0xE9);
+ mipi_dsi_dcs_write_seq(dsi, 0xC6, 0xF6);
+ mipi_dsi_dcs_write_seq(dsi, 0xC7, 0xFA);
+ mipi_dsi_dcs_write_seq(dsi, 0xC8, 0xFC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC9, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0xCC, 0xAF);
+ mipi_dsi_dcs_write_seq(dsi, 0xCD, 0xFF);
+ mipi_dsi_dcs_write_seq(dsi, 0xCE, 0xFF);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x68);
+ msleep(150);
-static const struct panel_init_cmd starry_himax83102_j02_init_cmd[] = {
- _INIT_DCS_CMD(0xB9, 0x83, 0x10, 0x21, 0x55, 0x00),
- _INIT_DCS_CMD(0xB1, 0x2C, 0xB5, 0xB5, 0x31, 0xF1, 0x31, 0xD7, 0x2F, 0x36, 0x36, 0x36, 0x36, 0x1A, 0x8B, 0x11,
- 0x65, 0x00, 0x88, 0xFA, 0xFF, 0xFF, 0x8F, 0xFF, 0x08, 0x74, 0x33),
- _INIT_DCS_CMD(0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x12, 0x72, 0x3C, 0xA3, 0x03, 0x03, 0x00, 0x00, 0x88, 0xF5),
- _INIT_DCS_CMD(0xB4, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x63, 0x5C, 0x63, 0x5C, 0x01, 0x9E),
- _INIT_DCS_CMD(0xE9, 0xCD),
- _INIT_DCS_CMD(0xBA, 0x84),
- _INIT_DCS_CMD(0xE9, 0x3F),
- _INIT_DCS_CMD(0xBC, 0x1B, 0x04),
- _INIT_DCS_CMD(0xBE, 0x20),
- _INIT_DCS_CMD(0xBF, 0xFC, 0xC4),
- _INIT_DCS_CMD(0xC0, 0x36, 0x36, 0x22, 0x11, 0x22, 0xA0, 0x61, 0x08, 0xF5, 0x03),
- _INIT_DCS_CMD(0xE9, 0xCC),
- _INIT_DCS_CMD(0xC7, 0x80),
- _INIT_DCS_CMD(0xE9, 0x3F),
- _INIT_DCS_CMD(0xE9, 0xC6),
- _INIT_DCS_CMD(0xC8, 0x97),
- _INIT_DCS_CMD(0xE9, 0x3F),
- _INIT_DCS_CMD(0xC9, 0x00, 0x1E, 0x13, 0x88, 0x01),
- _INIT_DCS_CMD(0xCB, 0x08, 0x13, 0x07, 0x00, 0x0F, 0x33),
- _INIT_DCS_CMD(0xCC, 0x02),
- _INIT_DCS_CMD(0xE9, 0xC4),
- _INIT_DCS_CMD(0xD0, 0x03),
- _INIT_DCS_CMD(0xE9, 0x3F),
- _INIT_DCS_CMD(0xD1, 0x37, 0x06, 0x00, 0x02, 0x04, 0x0C, 0xFF),
- _INIT_DCS_CMD(0xD2, 0x1F, 0x11, 0x1F),
- _INIT_DCS_CMD(0xD3, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x08, 0x37, 0x47, 0x34, 0x3B, 0x12, 0x12, 0x03,
- 0x03, 0x32, 0x10, 0x10, 0x00, 0x10, 0x32, 0x10, 0x08, 0x00, 0x08, 0x32, 0x17, 0x94, 0x07, 0x94, 0x00, 0x00),
- _INIT_DCS_CMD(0xD5, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x19, 0x19, 0x40, 0x40, 0x1A, 0x1A,
- 0x1B, 0x1B, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x20, 0x21, 0x28, 0x29, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18),
- _INIT_DCS_CMD(0xD6, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x40, 0x40, 0x19, 0x19, 0x1A, 0x1A,
- 0x1B, 0x1B, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 0x29, 0x28, 0x21, 0x20, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18),
- _INIT_DCS_CMD(0xD8, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA,
- 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0),
- _INIT_DCS_CMD(0xE0, 0x00, 0x09, 0x14, 0x1E, 0x26, 0x48, 0x61, 0x67, 0x6C, 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB,
- 0xAB, 0x55, 0x5C, 0x68, 0x73, 0x00, 0x09, 0x14, 0x1E, 0x26, 0x48, 0x61, 0x67, 0x6C, 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB, 0xAB, 0x55, 0x5C, 0x68, 0x73),
- _INIT_DCS_CMD(0xE7, 0x0E, 0x10, 0x10, 0x21, 0x2B, 0x9A, 0x02, 0x54, 0x9A, 0x14, 0x14, 0x00, 0x00, 0x00, 0x00, 0x12, 0x05, 0x02, 0x02, 0x10),
- _INIT_DCS_CMD(0xBD, 0x01),
- _INIT_DCS_CMD(0xB1, 0x01, 0xBF, 0x11),
- _INIT_DCS_CMD(0xCB, 0x86),
- _INIT_DCS_CMD(0xD2, 0x3C, 0xFA),
- _INIT_DCS_CMD(0xE9, 0xC5),
- _INIT_DCS_CMD(0xD3, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0C, 0x01),
- _INIT_DCS_CMD(0xE9, 0x3F),
- _INIT_DCS_CMD(0xE7, 0x02, 0x00, 0x28, 0x01, 0x7E, 0x0F, 0x7E, 0x10, 0xA0, 0x00, 0x00, 0x20, 0x40, 0x50, 0x40),
- _INIT_DCS_CMD(0xBD, 0x02),
- _INIT_DCS_CMD(0xD8, 0xFF, 0xFF, 0xBF, 0xFE, 0xAA, 0xA0, 0xFF, 0xFF, 0xBF, 0xFE, 0xAA, 0xA0),
- _INIT_DCS_CMD(0xE7, 0xFE, 0x04, 0xFE, 0x04, 0xFE, 0x04, 0x03, 0x03, 0x03, 0x26, 0x00, 0x26, 0x81, 0x02, 0x40, 0x00, 0x20, 0x9E, 0x04, 0x03, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00),
- _INIT_DCS_CMD(0xBD, 0x03),
- _INIT_DCS_CMD(0xE9, 0xC6),
- _INIT_DCS_CMD(0xB4, 0x03, 0xFF, 0xF8),
- _INIT_DCS_CMD(0xE9, 0x3F),
- _INIT_DCS_CMD(0xD8, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x3F, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x3F, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8,
- 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00),
- _INIT_DCS_CMD(0xBD, 0x00),
- _INIT_DCS_CMD(0xE9, 0xC4),
- _INIT_DCS_CMD(0xBA, 0x96),
- _INIT_DCS_CMD(0xE9, 0x3F),
- _INIT_DCS_CMD(0xBD, 0x01),
- _INIT_DCS_CMD(0xE9, 0xC5),
- _INIT_DCS_CMD(0xBA, 0x4F),
- _INIT_DCS_CMD(0xE9, 0x3F),
- _INIT_DCS_CMD(0xBD, 0x00),
- _INIT_DCS_CMD(0x11),
- _INIT_DELAY_CMD(120),
- _INIT_DCS_CMD(0x29),
- {},
-};
+ return 0;
+}
-static const struct panel_init_cmd starry_ili9882t_init_cmd[] = {
- _INIT_DELAY_CMD(5),
- _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x01),
- _INIT_DCS_CMD(0x00, 0x42),
- _INIT_DCS_CMD(0x01, 0x11),
- _INIT_DCS_CMD(0x02, 0x00),
- _INIT_DCS_CMD(0x03, 0x00),
-
- _INIT_DCS_CMD(0x04, 0x01),
- _INIT_DCS_CMD(0x05, 0x11),
- _INIT_DCS_CMD(0x06, 0x00),
- _INIT_DCS_CMD(0x07, 0x00),
-
- _INIT_DCS_CMD(0x08, 0x80),
- _INIT_DCS_CMD(0x09, 0x81),
- _INIT_DCS_CMD(0x0A, 0x71),
- _INIT_DCS_CMD(0x0B, 0x00),
-
- _INIT_DCS_CMD(0x0C, 0x00),
- _INIT_DCS_CMD(0x0E, 0x1A),
-
- _INIT_DCS_CMD(0x24, 0x00),
- _INIT_DCS_CMD(0x25, 0x00),
- _INIT_DCS_CMD(0x26, 0x00),
- _INIT_DCS_CMD(0x27, 0x00),
-
- _INIT_DCS_CMD(0x2C, 0xD4),
- _INIT_DCS_CMD(0xB9, 0x40),
-
- _INIT_DCS_CMD(0xB0, 0x11),
-
- _INIT_DCS_CMD(0xE6, 0x32),
- _INIT_DCS_CMD(0xD1, 0x30),
-
- _INIT_DCS_CMD(0xD6, 0x55),
-
- _INIT_DCS_CMD(0xD0, 0x01),
- _INIT_DCS_CMD(0xE3, 0x93),
- _INIT_DCS_CMD(0xE4, 0x00),
- _INIT_DCS_CMD(0xE5, 0x80),
-
- _INIT_DCS_CMD(0x31, 0x07),
- _INIT_DCS_CMD(0x32, 0x07),
- _INIT_DCS_CMD(0x33, 0x07),
- _INIT_DCS_CMD(0x34, 0x07),
- _INIT_DCS_CMD(0x35, 0x07),
- _INIT_DCS_CMD(0x36, 0x01),
- _INIT_DCS_CMD(0x37, 0x00),
- _INIT_DCS_CMD(0x38, 0x28),
- _INIT_DCS_CMD(0x39, 0x29),
- _INIT_DCS_CMD(0x3A, 0x11),
- _INIT_DCS_CMD(0x3B, 0x13),
- _INIT_DCS_CMD(0x3C, 0x15),
- _INIT_DCS_CMD(0x3D, 0x17),
- _INIT_DCS_CMD(0x3E, 0x09),
- _INIT_DCS_CMD(0x3F, 0x0D),
- _INIT_DCS_CMD(0x40, 0x02),
- _INIT_DCS_CMD(0x41, 0x02),
- _INIT_DCS_CMD(0x42, 0x02),
- _INIT_DCS_CMD(0x43, 0x02),
- _INIT_DCS_CMD(0x44, 0x02),
- _INIT_DCS_CMD(0x45, 0x02),
- _INIT_DCS_CMD(0x46, 0x02),
-
- _INIT_DCS_CMD(0x47, 0x07),
- _INIT_DCS_CMD(0x48, 0x07),
- _INIT_DCS_CMD(0x49, 0x07),
- _INIT_DCS_CMD(0x4A, 0x07),
- _INIT_DCS_CMD(0x4B, 0x07),
- _INIT_DCS_CMD(0x4C, 0x01),
- _INIT_DCS_CMD(0x4D, 0x00),
- _INIT_DCS_CMD(0x4E, 0x28),
- _INIT_DCS_CMD(0x4F, 0x29),
- _INIT_DCS_CMD(0x50, 0x10),
- _INIT_DCS_CMD(0x51, 0x12),
- _INIT_DCS_CMD(0x52, 0x14),
- _INIT_DCS_CMD(0x53, 0x16),
- _INIT_DCS_CMD(0x54, 0x08),
- _INIT_DCS_CMD(0x55, 0x0C),
- _INIT_DCS_CMD(0x56, 0x02),
- _INIT_DCS_CMD(0x57, 0x02),
- _INIT_DCS_CMD(0x58, 0x02),
- _INIT_DCS_CMD(0x59, 0x02),
- _INIT_DCS_CMD(0x5A, 0x02),
- _INIT_DCS_CMD(0x5B, 0x02),
- _INIT_DCS_CMD(0x5C, 0x02),
-
- _INIT_DCS_CMD(0x61, 0x07),
- _INIT_DCS_CMD(0x62, 0x07),
- _INIT_DCS_CMD(0x63, 0x07),
- _INIT_DCS_CMD(0x64, 0x07),
- _INIT_DCS_CMD(0x65, 0x07),
- _INIT_DCS_CMD(0x66, 0x01),
- _INIT_DCS_CMD(0x67, 0x00),
- _INIT_DCS_CMD(0x68, 0x28),
- _INIT_DCS_CMD(0x69, 0x29),
- _INIT_DCS_CMD(0x6A, 0x16),
- _INIT_DCS_CMD(0x6B, 0x14),
- _INIT_DCS_CMD(0x6C, 0x12),
- _INIT_DCS_CMD(0x6D, 0x10),
- _INIT_DCS_CMD(0x6E, 0x0C),
- _INIT_DCS_CMD(0x6F, 0x08),
- _INIT_DCS_CMD(0x70, 0x02),
- _INIT_DCS_CMD(0x71, 0x02),
- _INIT_DCS_CMD(0x72, 0x02),
- _INIT_DCS_CMD(0x73, 0x02),
- _INIT_DCS_CMD(0x74, 0x02),
- _INIT_DCS_CMD(0x75, 0x02),
- _INIT_DCS_CMD(0x76, 0x02),
-
- _INIT_DCS_CMD(0x77, 0x07),
- _INIT_DCS_CMD(0x78, 0x07),
- _INIT_DCS_CMD(0x79, 0x07),
- _INIT_DCS_CMD(0x7A, 0x07),
- _INIT_DCS_CMD(0x7B, 0x07),
- _INIT_DCS_CMD(0x7C, 0x01),
- _INIT_DCS_CMD(0x7D, 0x00),
- _INIT_DCS_CMD(0x7E, 0x28),
- _INIT_DCS_CMD(0x7F, 0x29),
- _INIT_DCS_CMD(0x80, 0x17),
- _INIT_DCS_CMD(0x81, 0x15),
- _INIT_DCS_CMD(0x82, 0x13),
- _INIT_DCS_CMD(0x83, 0x11),
- _INIT_DCS_CMD(0x84, 0x0D),
- _INIT_DCS_CMD(0x85, 0x09),
- _INIT_DCS_CMD(0x86, 0x02),
- _INIT_DCS_CMD(0x87, 0x07),
- _INIT_DCS_CMD(0x88, 0x07),
- _INIT_DCS_CMD(0x89, 0x07),
- _INIT_DCS_CMD(0x8A, 0x07),
- _INIT_DCS_CMD(0x8B, 0x07),
- _INIT_DCS_CMD(0x8C, 0x07),
-
- _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x02),
- _INIT_DCS_CMD(0x29, 0x3A),
- _INIT_DCS_CMD(0x2A, 0x3B),
-
- _INIT_DCS_CMD(0x06, 0x01),
- _INIT_DCS_CMD(0x07, 0x01),
- _INIT_DCS_CMD(0x08, 0x0C),
- _INIT_DCS_CMD(0x09, 0x44),
-
- _INIT_DCS_CMD(0x3C, 0x0A),
- _INIT_DCS_CMD(0x39, 0x11),
- _INIT_DCS_CMD(0x3D, 0x00),
- _INIT_DCS_CMD(0x3A, 0x0C),
- _INIT_DCS_CMD(0x3B, 0x44),
-
- _INIT_DCS_CMD(0x53, 0x1F),
- _INIT_DCS_CMD(0x5E, 0x40),
- _INIT_DCS_CMD(0x84, 0x00),
-
- _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x03),
- _INIT_DCS_CMD(0x20, 0x01),
- _INIT_DCS_CMD(0x21, 0x3C),
- _INIT_DCS_CMD(0x22, 0xFA),
-
- _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x0A),
- _INIT_DCS_CMD(0xE0, 0x01),
- _INIT_DCS_CMD(0xE2, 0x01),
- _INIT_DCS_CMD(0xE5, 0x91),
- _INIT_DCS_CMD(0xE6, 0x3C),
- _INIT_DCS_CMD(0xE7, 0x00),
- _INIT_DCS_CMD(0xE8, 0xFA),
-
- _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x12),
- _INIT_DCS_CMD(0x87, 0x2C),
-
- _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x05),
- _INIT_DCS_CMD(0x73, 0xE5),
- _INIT_DCS_CMD(0x7F, 0x6B),
- _INIT_DCS_CMD(0x6D, 0xA4),
- _INIT_DCS_CMD(0x79, 0x54),
- _INIT_DCS_CMD(0x69, 0x97),
- _INIT_DCS_CMD(0x6A, 0x97),
- _INIT_DCS_CMD(0xA5, 0x3F),
- _INIT_DCS_CMD(0x61, 0xDA),
- _INIT_DCS_CMD(0xA7, 0xF1),
- _INIT_DCS_CMD(0x5F, 0x01),
- _INIT_DCS_CMD(0x62, 0x3F),
- _INIT_DCS_CMD(0x1D, 0x90),
- _INIT_DCS_CMD(0x86, 0x87),
-
- _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x06),
- _INIT_DCS_CMD(0xC0, 0x80),
- _INIT_DCS_CMD(0xC1, 0x07),
- _INIT_DCS_CMD(0xCA, 0x58),
- _INIT_DCS_CMD(0xCB, 0x02),
- _INIT_DCS_CMD(0xCE, 0x58),
- _INIT_DCS_CMD(0xCF, 0x02),
- _INIT_DCS_CMD(0x67, 0x60),
- _INIT_DCS_CMD(0x10, 0x00),
- _INIT_DCS_CMD(0x92, 0x22),
- _INIT_DCS_CMD(0xD3, 0x08),
- _INIT_DCS_CMD(0xD6, 0x55),
- _INIT_DCS_CMD(0xDC, 0x38),
-
- _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x08),
- _INIT_DCS_CMD(0xE0, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79, 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD, 0xD5, 0xE2, 0xE8),
- _INIT_DCS_CMD(0xE1, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79, 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD, 0xD5, 0xE2, 0xE8),
-
- _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x04),
- _INIT_DCS_CMD(0xBA, 0x81),
-
- _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x0C),
- _INIT_DCS_CMD(0x00, 0x02),
- _INIT_DCS_CMD(0x01, 0x00),
- _INIT_DCS_CMD(0x02, 0x03),
- _INIT_DCS_CMD(0x03, 0x01),
- _INIT_DCS_CMD(0x04, 0x03),
- _INIT_DCS_CMD(0x05, 0x02),
- _INIT_DCS_CMD(0x06, 0x04),
- _INIT_DCS_CMD(0x07, 0x03),
- _INIT_DCS_CMD(0x08, 0x03),
- _INIT_DCS_CMD(0x09, 0x04),
- _INIT_DCS_CMD(0x0A, 0x04),
- _INIT_DCS_CMD(0x0B, 0x05),
- _INIT_DCS_CMD(0x0C, 0x04),
- _INIT_DCS_CMD(0x0D, 0x06),
- _INIT_DCS_CMD(0x0E, 0x05),
- _INIT_DCS_CMD(0x0F, 0x07),
- _INIT_DCS_CMD(0x10, 0x04),
- _INIT_DCS_CMD(0x11, 0x08),
- _INIT_DCS_CMD(0x12, 0x05),
- _INIT_DCS_CMD(0x13, 0x09),
- _INIT_DCS_CMD(0x14, 0x05),
- _INIT_DCS_CMD(0x15, 0x0A),
- _INIT_DCS_CMD(0x16, 0x06),
- _INIT_DCS_CMD(0x17, 0x0B),
- _INIT_DCS_CMD(0x18, 0x05),
- _INIT_DCS_CMD(0x19, 0x0C),
- _INIT_DCS_CMD(0x1A, 0x06),
- _INIT_DCS_CMD(0x1B, 0x0D),
- _INIT_DCS_CMD(0x1C, 0x06),
- _INIT_DCS_CMD(0x1D, 0x0E),
- _INIT_DCS_CMD(0x1E, 0x07),
- _INIT_DCS_CMD(0x1F, 0x0F),
- _INIT_DCS_CMD(0x20, 0x06),
- _INIT_DCS_CMD(0x21, 0x10),
- _INIT_DCS_CMD(0x22, 0x07),
- _INIT_DCS_CMD(0x23, 0x11),
- _INIT_DCS_CMD(0x24, 0x07),
- _INIT_DCS_CMD(0x25, 0x12),
- _INIT_DCS_CMD(0x26, 0x08),
- _INIT_DCS_CMD(0x27, 0x13),
- _INIT_DCS_CMD(0x28, 0x07),
- _INIT_DCS_CMD(0x29, 0x14),
- _INIT_DCS_CMD(0x2A, 0x08),
- _INIT_DCS_CMD(0x2B, 0x15),
- _INIT_DCS_CMD(0x2C, 0x08),
- _INIT_DCS_CMD(0x2D, 0x16),
- _INIT_DCS_CMD(0x2E, 0x09),
- _INIT_DCS_CMD(0x2F, 0x17),
- _INIT_DCS_CMD(0x30, 0x08),
- _INIT_DCS_CMD(0x31, 0x18),
- _INIT_DCS_CMD(0x32, 0x09),
- _INIT_DCS_CMD(0x33, 0x19),
- _INIT_DCS_CMD(0x34, 0x09),
- _INIT_DCS_CMD(0x35, 0x1A),
- _INIT_DCS_CMD(0x36, 0x0A),
- _INIT_DCS_CMD(0x37, 0x1B),
- _INIT_DCS_CMD(0x38, 0x0A),
- _INIT_DCS_CMD(0x39, 0x1C),
- _INIT_DCS_CMD(0x3A, 0x0A),
- _INIT_DCS_CMD(0x3B, 0x1D),
- _INIT_DCS_CMD(0x3C, 0x0A),
- _INIT_DCS_CMD(0x3D, 0x1E),
- _INIT_DCS_CMD(0x3E, 0x0A),
- _INIT_DCS_CMD(0x3F, 0x1F),
-
- _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x04),
- _INIT_DCS_CMD(0xBA, 0x01),
-
- _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x0E),
- _INIT_DCS_CMD(0x02, 0x0C),
- _INIT_DCS_CMD(0x20, 0x10),
- _INIT_DCS_CMD(0x25, 0x16),
- _INIT_DCS_CMD(0x26, 0xE0),
- _INIT_DCS_CMD(0x27, 0x00),
- _INIT_DCS_CMD(0x29, 0x71),
- _INIT_DCS_CMD(0x2A, 0x46),
- _INIT_DCS_CMD(0x2B, 0x1F),
- _INIT_DCS_CMD(0x2D, 0xC7),
- _INIT_DCS_CMD(0x31, 0x02),
- _INIT_DCS_CMD(0x32, 0xDF),
- _INIT_DCS_CMD(0x33, 0x5A),
- _INIT_DCS_CMD(0x34, 0xC0),
- _INIT_DCS_CMD(0x35, 0x5A),
- _INIT_DCS_CMD(0x36, 0xC0),
- _INIT_DCS_CMD(0x38, 0x65),
- _INIT_DCS_CMD(0x80, 0x3E),
- _INIT_DCS_CMD(0x81, 0xA0),
- _INIT_DCS_CMD(0xB0, 0x01),
- _INIT_DCS_CMD(0xB1, 0xCC),
- _INIT_DCS_CMD(0xC0, 0x12),
- _INIT_DCS_CMD(0xC2, 0xCC),
- _INIT_DCS_CMD(0xC3, 0xCC),
- _INIT_DCS_CMD(0xC4, 0xCC),
- _INIT_DCS_CMD(0xC5, 0xCC),
- _INIT_DCS_CMD(0xC6, 0xCC),
- _INIT_DCS_CMD(0xC7, 0xCC),
- _INIT_DCS_CMD(0xC8, 0xCC),
- _INIT_DCS_CMD(0xC9, 0xCC),
- _INIT_DCS_CMD(0x30, 0x00),
- _INIT_DCS_CMD(0x00, 0x81),
- _INIT_DCS_CMD(0x08, 0x02),
- _INIT_DCS_CMD(0x09, 0x00),
- _INIT_DCS_CMD(0x07, 0x21),
- _INIT_DCS_CMD(0x04, 0x10),
-
- _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x1E),
- _INIT_DCS_CMD(0x60, 0x00),
- _INIT_DCS_CMD(0x64, 0x00),
- _INIT_DCS_CMD(0x6D, 0x00),
-
- _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x0B),
- _INIT_DCS_CMD(0xA6, 0x44),
- _INIT_DCS_CMD(0xA7, 0xB6),
- _INIT_DCS_CMD(0xA8, 0x03),
- _INIT_DCS_CMD(0xA9, 0x03),
- _INIT_DCS_CMD(0xAA, 0x51),
- _INIT_DCS_CMD(0xAB, 0x51),
- _INIT_DCS_CMD(0xAC, 0x04),
- _INIT_DCS_CMD(0xBD, 0x92),
- _INIT_DCS_CMD(0xBE, 0xA1),
-
- _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x05),
- _INIT_DCS_CMD(0x86, 0x87),
-
- _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x06),
- _INIT_DCS_CMD(0x92, 0x22),
-
- _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x00),
- _INIT_DCS_CMD(0x11),
- _INIT_DELAY_CMD(120),
- _INIT_DCS_CMD(0x29),
- _INIT_DELAY_CMD(20),
- {},
-};
+static int auo_kd101n80_45na_init(struct mipi_dsi_device *dsi)
+{
+ int ret;
-static inline struct boe_panel *to_boe_panel(struct drm_panel *panel)
+ msleep(24);
+ ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
+ if (ret)
+ return ret;
+ msleep(120);
+ ret = mipi_dsi_dcs_set_display_on(dsi);
+ if (ret)
+ return ret;
+ msleep(120);
+
+ return 0;
+}
+
+static int auo_b101uan08_3_init(struct mipi_dsi_device *dsi)
{
- return container_of(panel, struct boe_panel, base);
+ msleep(24);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x48);
+ mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x48);
+ mipi_dsi_dcs_write_seq(dsi, 0xC2, 0x47);
+ mipi_dsi_dcs_write_seq(dsi, 0xC3, 0x47);
+ mipi_dsi_dcs_write_seq(dsi, 0xC4, 0x46);
+ mipi_dsi_dcs_write_seq(dsi, 0xC5, 0x46);
+ mipi_dsi_dcs_write_seq(dsi, 0xC6, 0x45);
+ mipi_dsi_dcs_write_seq(dsi, 0xC7, 0x45);
+ mipi_dsi_dcs_write_seq(dsi, 0xC8, 0x64);
+ mipi_dsi_dcs_write_seq(dsi, 0xC9, 0x64);
+ mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x4F);
+ mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x4F);
+ mipi_dsi_dcs_write_seq(dsi, 0xCC, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0xCD, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0xCE, 0x66);
+ mipi_dsi_dcs_write_seq(dsi, 0xCF, 0x66);
+ mipi_dsi_dcs_write_seq(dsi, 0xD0, 0x4F);
+ mipi_dsi_dcs_write_seq(dsi, 0xD1, 0x4F);
+ mipi_dsi_dcs_write_seq(dsi, 0xD2, 0x41);
+ mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x41);
+ mipi_dsi_dcs_write_seq(dsi, 0xD4, 0x48);
+ mipi_dsi_dcs_write_seq(dsi, 0xD5, 0x48);
+ mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x47);
+ mipi_dsi_dcs_write_seq(dsi, 0xD7, 0x47);
+ mipi_dsi_dcs_write_seq(dsi, 0xD8, 0x46);
+ mipi_dsi_dcs_write_seq(dsi, 0xD9, 0x46);
+ mipi_dsi_dcs_write_seq(dsi, 0xDA, 0x45);
+ mipi_dsi_dcs_write_seq(dsi, 0xDB, 0x45);
+ mipi_dsi_dcs_write_seq(dsi, 0xDC, 0x64);
+ mipi_dsi_dcs_write_seq(dsi, 0xDD, 0x64);
+ mipi_dsi_dcs_write_seq(dsi, 0xDE, 0x4F);
+ mipi_dsi_dcs_write_seq(dsi, 0xDF, 0x4F);
+ mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0xE1, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0xE2, 0x66);
+ mipi_dsi_dcs_write_seq(dsi, 0xE3, 0x66);
+ mipi_dsi_dcs_write_seq(dsi, 0xE4, 0x4F);
+ mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x4F);
+ mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x41);
+ mipi_dsi_dcs_write_seq(dsi, 0xE7, 0x41);
+ msleep(150);
+
+ return 0;
}
-static int boe_panel_init_dcs_cmd(struct boe_panel *boe)
+static int starry_qfh032011_53g_init(struct mipi_dsi_device *dsi)
{
- struct mipi_dsi_device *dsi = boe->dsi;
- struct drm_panel *panel = &boe->base;
- int i, err = 0;
-
- if (boe->desc->init_cmds) {
- const struct panel_init_cmd *init_cmds = boe->desc->init_cmds;
-
- for (i = 0; init_cmds[i].len != 0; i++) {
- const struct panel_init_cmd *cmd = &init_cmds[i];
-
- switch (cmd->type) {
- case DELAY_CMD:
- msleep(cmd->data[0]);
- err = 0;
- break;
-
- case INIT_DCS_CMD:
- err = mipi_dsi_dcs_write(dsi, cmd->data[0],
- cmd->len <= 1 ? NULL :
- &cmd->data[1],
- cmd->len - 1);
- break;
-
- default:
- err = -EINVAL;
- }
-
- if (err < 0) {
- dev_err(panel->dev,
- "failed to write command %u\n", i);
- return err;
- }
- }
- }
+ int ret;
+
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xC3, 0x4F);
+ mipi_dsi_dcs_write_seq(dsi, 0xC4, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0xC5, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0xC6, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0xC7, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0xC8, 0x4D);
+ mipi_dsi_dcs_write_seq(dsi, 0xC9, 0x52);
+ mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x51);
+ mipi_dsi_dcs_write_seq(dsi, 0xCD, 0x5D);
+ mipi_dsi_dcs_write_seq(dsi, 0xCE, 0x5B);
+ mipi_dsi_dcs_write_seq(dsi, 0xCF, 0x4B);
+ mipi_dsi_dcs_write_seq(dsi, 0xD0, 0x49);
+ mipi_dsi_dcs_write_seq(dsi, 0xD1, 0x47);
+ mipi_dsi_dcs_write_seq(dsi, 0xD2, 0x45);
+ mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x41);
+ mipi_dsi_dcs_write_seq(dsi, 0xD7, 0x50);
+ mipi_dsi_dcs_write_seq(dsi, 0xD8, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0xD9, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0xDA, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0xDB, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0xDC, 0x4E);
+ mipi_dsi_dcs_write_seq(dsi, 0xDD, 0x52);
+ mipi_dsi_dcs_write_seq(dsi, 0xDE, 0x51);
+ mipi_dsi_dcs_write_seq(dsi, 0xE1, 0x5E);
+ mipi_dsi_dcs_write_seq(dsi, 0xE2, 0x5C);
+ mipi_dsi_dcs_write_seq(dsi, 0xE3, 0x4C);
+ mipi_dsi_dcs_write_seq(dsi, 0xE4, 0x4A);
+ mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x48);
+ mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x46);
+ mipi_dsi_dcs_write_seq(dsi, 0xE7, 0x42);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0xBE, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0xCC, 0x44);
+ mipi_dsi_dcs_write_seq(dsi, 0xC8, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0xC9, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x42);
+ mipi_dsi_dcs_write_seq(dsi, 0xCD, 0x3E);
+ mipi_dsi_dcs_write_seq(dsi, 0xCF, 0x60);
+ mipi_dsi_dcs_write_seq(dsi, 0xD2, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xD4, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xD5, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0xD7, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xD9, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xDB, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xE4, 0xF0);
+ mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xCC, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0xC2, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0xC4, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0xC2, 0x20);
+ mipi_dsi_dcs_write_seq(dsi, 0xC3, 0x24);
+ mipi_dsi_dcs_write_seq(dsi, 0xC4, 0x23);
+ mipi_dsi_dcs_write_seq(dsi, 0xC5, 0x29);
+ mipi_dsi_dcs_write_seq(dsi, 0xC6, 0x23);
+ mipi_dsi_dcs_write_seq(dsi, 0xC7, 0x1C);
+ mipi_dsi_dcs_write_seq(dsi, 0xC8, 0x19);
+ mipi_dsi_dcs_write_seq(dsi, 0xC9, 0x17);
+ mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x17);
+ mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x18);
+ mipi_dsi_dcs_write_seq(dsi, 0xCC, 0x1A);
+ mipi_dsi_dcs_write_seq(dsi, 0xCD, 0x1E);
+ mipi_dsi_dcs_write_seq(dsi, 0xCE, 0x20);
+ mipi_dsi_dcs_write_seq(dsi, 0xCF, 0x23);
+ mipi_dsi_dcs_write_seq(dsi, 0xD0, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0xD1, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xD2, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0xD4, 0x13);
+ mipi_dsi_dcs_write_seq(dsi, 0xD5, 0x1C);
+ mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x1A);
+ mipi_dsi_dcs_write_seq(dsi, 0xD7, 0x13);
+ mipi_dsi_dcs_write_seq(dsi, 0xD8, 0x17);
+ mipi_dsi_dcs_write_seq(dsi, 0xD9, 0x1C);
+ mipi_dsi_dcs_write_seq(dsi, 0xDA, 0x19);
+ mipi_dsi_dcs_write_seq(dsi, 0xDB, 0x17);
+ mipi_dsi_dcs_write_seq(dsi, 0xDC, 0x17);
+ mipi_dsi_dcs_write_seq(dsi, 0xDD, 0x18);
+ mipi_dsi_dcs_write_seq(dsi, 0xDE, 0x1A);
+ mipi_dsi_dcs_write_seq(dsi, 0xDF, 0x1E);
+ mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x20);
+ mipi_dsi_dcs_write_seq(dsi, 0xE1, 0x23);
+ mipi_dsi_dcs_write_seq(dsi, 0xE2, 0x07);
+
+ ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
+ if (ret)
+ return ret;
+ msleep(120);
+ ret = mipi_dsi_dcs_set_display_on(dsi);
+ if (ret)
+ return ret;
+ msleep(80);
+
return 0;
}
+
+static int starry_himax83102_j02_init(struct mipi_dsi_device *dsi)
+{
+ int ret;
+
+ mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x83, 0x10, 0x21, 0x55, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x2C, 0xB5, 0xB5, 0x31, 0xF1, 0x31, 0xD7, 0x2F, 0x36, 0x36,
+ 0x36, 0x36, 0x1A, 0x8B, 0x11, 0x65, 0x00, 0x88, 0xFA, 0xFF, 0xFF, 0x8F,
+ 0xFF, 0x08, 0x74, 0x33);
+ mipi_dsi_dcs_write_seq(dsi, 0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x12, 0x72, 0x3C, 0xA3, 0x03,
+ 0x03, 0x00, 0x00, 0x88, 0xF5);
+ mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x63, 0x5C, 0x63, 0x5C,
+ 0x01, 0x9E);
+ mipi_dsi_dcs_write_seq(dsi, 0xE9, 0xCD);
+ mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x84);
+ mipi_dsi_dcs_write_seq(dsi, 0xE9, 0x3F);
+ mipi_dsi_dcs_write_seq(dsi, 0xBC, 0x1B, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xBE, 0x20);
+ mipi_dsi_dcs_write_seq(dsi, 0xBF, 0xFC, 0xC4);
+ mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x36, 0x36, 0x22, 0x11, 0x22, 0xA0, 0x61, 0x08, 0xF5, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0xE9, 0xCC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC7, 0x80);
+ mipi_dsi_dcs_write_seq(dsi, 0xE9, 0x3F);
+ mipi_dsi_dcs_write_seq(dsi, 0xE9, 0xC6);
+ mipi_dsi_dcs_write_seq(dsi, 0xC8, 0x97);
+ mipi_dsi_dcs_write_seq(dsi, 0xE9, 0x3F);
+ mipi_dsi_dcs_write_seq(dsi, 0xC9, 0x00, 0x1E, 0x13, 0x88, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x08, 0x13, 0x07, 0x00, 0x0F, 0x33);
+ mipi_dsi_dcs_write_seq(dsi, 0xCC, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0xE9, 0xC4);
+ mipi_dsi_dcs_write_seq(dsi, 0xD0, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0xE9, 0x3F);
+ mipi_dsi_dcs_write_seq(dsi, 0xD1, 0x37, 0x06, 0x00, 0x02, 0x04, 0x0C, 0xFF);
+ mipi_dsi_dcs_write_seq(dsi, 0xD2, 0x1F, 0x11, 0x1F);
+ mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x08,
+ 0x37, 0x47, 0x34, 0x3B, 0x12, 0x12, 0x03, 0x03, 0x32, 0x10, 0x10,
+ 0x00, 0x10, 0x32, 0x10, 0x08, 0x00, 0x08, 0x32, 0x17, 0x94, 0x07,
+ 0x94, 0x00, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xD5, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+ 0x18, 0x19, 0x19, 0x40, 0x40, 0x1A, 0x1A, 0x1B, 0x1B, 0x00, 0x01,
+ 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x20, 0x21, 0x28, 0x29, 0x18,
+ 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+ 0x18, 0x18);
+ mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+ 0x18, 0x40, 0x40, 0x19, 0x19, 0x1A, 0x1A, 0x1B, 0x1B, 0x07, 0x06,
+ 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 0x29, 0x28, 0x21, 0x20, 0x18,
+ 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+ 0x18, 0x18);
+ mipi_dsi_dcs_write_seq(dsi, 0xD8, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA,
+ 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA,
+ 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA,
+ 0xBA, 0xEA, 0xAA, 0xAA, 0xA0);
+ mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x00, 0x09, 0x14, 0x1E, 0x26, 0x48, 0x61, 0x67, 0x6C,
+ 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB, 0xAB, 0x55,
+ 0x5C, 0x68, 0x73, 0x00, 0x09, 0x14, 0x1E, 0x26, 0x48, 0x61, 0x67,
+ 0x6C, 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB, 0xAB,
+ 0x55, 0x5C, 0x68, 0x73);
+ mipi_dsi_dcs_write_seq(dsi, 0xE7, 0x0E, 0x10, 0x10, 0x21, 0x2B, 0x9A, 0x02, 0x54, 0x9A,
+ 0x14, 0x14, 0x00, 0x00, 0x00, 0x00, 0x12, 0x05, 0x02, 0x02, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x01, 0xBF, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x86);
+ mipi_dsi_dcs_write_seq(dsi, 0xD2, 0x3C, 0xFA);
+ mipi_dsi_dcs_write_seq(dsi, 0xE9, 0xC5);
+ mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0C, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xE9, 0x3F);
+ mipi_dsi_dcs_write_seq(dsi, 0xE7, 0x02, 0x00, 0x28, 0x01, 0x7E, 0x0F, 0x7E, 0x10, 0xA0,
+ 0x00, 0x00, 0x20, 0x40, 0x50, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0xD8, 0xFF, 0xFF, 0xBF, 0xFE, 0xAA, 0xA0, 0xFF, 0xFF, 0xBF,
+ 0xFE, 0xAA, 0xA0);
+ mipi_dsi_dcs_write_seq(dsi, 0xE7, 0xFE, 0x04, 0xFE, 0x04, 0xFE, 0x04, 0x03, 0x03, 0x03,
+ 0x26, 0x00, 0x26, 0x81, 0x02, 0x40, 0x00, 0x20, 0x9E, 0x04, 0x03,
+ 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0xE9, 0xC6);
+ mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x03, 0xFF, 0xF8);
+ mipi_dsi_dcs_write_seq(dsi, 0xE9, 0x3F);
+ mipi_dsi_dcs_write_seq(dsi, 0xD8, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x2A, 0xAA,
+ 0xA8, 0x00, 0x00, 0x00, 0x3F, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x3F,
+ 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00,
+ 0x2A, 0xAA, 0xA8, 0x00, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xE9, 0xC4);
+ mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x96);
+ mipi_dsi_dcs_write_seq(dsi, 0xE9, 0x3F);
+ mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xE9, 0xC5);
+ mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x4F);
+ mipi_dsi_dcs_write_seq(dsi, 0xE9, 0x3F);
+ mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x00);
+
+
+ ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
+ if (ret)
+ return ret;
+ msleep(120);
+ ret = mipi_dsi_dcs_set_display_on(dsi);
+ if (ret)
+ return ret;
+ msleep(80);
+
+ return 0;
+};
+
+
+static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
+{
+ int ret;
+
+ msleep(5);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x00, 0x42);
+ mipi_dsi_dcs_write_seq(dsi, 0x01, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0x02, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x03, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x04, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x05, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0x06, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x07, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x08, 0x80);
+ mipi_dsi_dcs_write_seq(dsi, 0x09, 0x81);
+ mipi_dsi_dcs_write_seq(dsi, 0x0A, 0x71);
+ mipi_dsi_dcs_write_seq(dsi, 0x0B, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x0C, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x0E, 0x1A);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x24, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x25, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x26, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x2C, 0xD4);
+ mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x40);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x11);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x32);
+ mipi_dsi_dcs_write_seq(dsi, 0xD1, 0x30);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x55);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xD0, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xE3, 0x93);
+ mipi_dsi_dcs_write_seq(dsi, 0xE4, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x80);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x31, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x32, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x33, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x34, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x35, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x36, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x37, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x38, 0x28);
+ mipi_dsi_dcs_write_seq(dsi, 0x39, 0x29);
+ mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x13);
+ mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x15);
+ mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x17);
+ mipi_dsi_dcs_write_seq(dsi, 0x3E, 0x09);
+ mipi_dsi_dcs_write_seq(dsi, 0x3F, 0x0D);
+ mipi_dsi_dcs_write_seq(dsi, 0x40, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x41, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x42, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x43, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x44, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x45, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x46, 0x02);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x47, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x48, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x49, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x4A, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x4B, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x4C, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x4D, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x4E, 0x28);
+ mipi_dsi_dcs_write_seq(dsi, 0x4F, 0x29);
+ mipi_dsi_dcs_write_seq(dsi, 0x50, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0x51, 0x12);
+ mipi_dsi_dcs_write_seq(dsi, 0x52, 0x14);
+ mipi_dsi_dcs_write_seq(dsi, 0x53, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0x54, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x55, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0x56, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x57, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x58, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x59, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x5A, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x5B, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x5C, 0x02);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x61, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x62, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x63, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x64, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x65, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x66, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x67, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x68, 0x28);
+ mipi_dsi_dcs_write_seq(dsi, 0x69, 0x29);
+ mipi_dsi_dcs_write_seq(dsi, 0x6A, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0x6B, 0x14);
+ mipi_dsi_dcs_write_seq(dsi, 0x6C, 0x12);
+ mipi_dsi_dcs_write_seq(dsi, 0x6D, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0x6E, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0x6F, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x70, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x71, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x72, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x73, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x74, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x75, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x76, 0x02);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x77, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x78, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x79, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x7A, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x7B, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x7C, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x7D, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x7E, 0x28);
+ mipi_dsi_dcs_write_seq(dsi, 0x7F, 0x29);
+ mipi_dsi_dcs_write_seq(dsi, 0x80, 0x17);
+ mipi_dsi_dcs_write_seq(dsi, 0x81, 0x15);
+ mipi_dsi_dcs_write_seq(dsi, 0x82, 0x13);
+ mipi_dsi_dcs_write_seq(dsi, 0x83, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0x84, 0x0D);
+ mipi_dsi_dcs_write_seq(dsi, 0x85, 0x09);
+ mipi_dsi_dcs_write_seq(dsi, 0x86, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x87, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x88, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x89, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x8A, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x8B, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x8C, 0x07);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x29, 0x3A);
+ mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x3B);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x06, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x07, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x08, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0x09, 0x44);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0x39, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x44);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x53, 0x1F);
+ mipi_dsi_dcs_write_seq(dsi, 0x5E, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0x84, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x20, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x21, 0x3C);
+ mipi_dsi_dcs_write_seq(dsi, 0x22, 0xFA);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xE2, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x91);
+ mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x3C);
+ mipi_dsi_dcs_write_seq(dsi, 0xE7, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xE8, 0xFA);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x12);
+ mipi_dsi_dcs_write_seq(dsi, 0x87, 0x2C);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0x73, 0xE5);
+ mipi_dsi_dcs_write_seq(dsi, 0x7F, 0x6B);
+ mipi_dsi_dcs_write_seq(dsi, 0x6D, 0xA4);
+ mipi_dsi_dcs_write_seq(dsi, 0x79, 0x54);
+ mipi_dsi_dcs_write_seq(dsi, 0x69, 0x97);
+ mipi_dsi_dcs_write_seq(dsi, 0x6A, 0x97);
+ mipi_dsi_dcs_write_seq(dsi, 0xA5, 0x3F);
+ mipi_dsi_dcs_write_seq(dsi, 0x61, 0xDA);
+ mipi_dsi_dcs_write_seq(dsi, 0xA7, 0xF1);
+ mipi_dsi_dcs_write_seq(dsi, 0x5F, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x62, 0x3F);
+ mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x90);
+ mipi_dsi_dcs_write_seq(dsi, 0x86, 0x87);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x80);
+ mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x58);
+ mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0xCE, 0x58);
+ mipi_dsi_dcs_write_seq(dsi, 0xCF, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x67, 0x60);
+ mipi_dsi_dcs_write_seq(dsi, 0x10, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x92, 0x22);
+ mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x55);
+ mipi_dsi_dcs_write_seq(dsi, 0xDC, 0x38);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79,
+ 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD,
+ 0xD5, 0xE2, 0xE8);
+ mipi_dsi_dcs_write_seq(dsi, 0xE1, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79,
+ 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD,
+ 0xD5, 0xE2, 0xE8);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x81);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0x00, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x01, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x02, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x03, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x04, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x05, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x06, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x07, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x08, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x09, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x0A, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x0B, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0x0C, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x0D, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x0E, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0x0F, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x10, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x11, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x12, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0x13, 0x09);
+ mipi_dsi_dcs_write_seq(dsi, 0x14, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0x15, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0x16, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x17, 0x0B);
+ mipi_dsi_dcs_write_seq(dsi, 0x18, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0x19, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0x1A, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x1B, 0x0D);
+ mipi_dsi_dcs_write_seq(dsi, 0x1C, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x0E);
+ mipi_dsi_dcs_write_seq(dsi, 0x1E, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x1F, 0x0F);
+ mipi_dsi_dcs_write_seq(dsi, 0x20, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x21, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0x22, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x23, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0x24, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x25, 0x12);
+ mipi_dsi_dcs_write_seq(dsi, 0x26, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x27, 0x13);
+ mipi_dsi_dcs_write_seq(dsi, 0x28, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x29, 0x14);
+ mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x15);
+ mipi_dsi_dcs_write_seq(dsi, 0x2C, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x2D, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0x2E, 0x09);
+ mipi_dsi_dcs_write_seq(dsi, 0x2F, 0x17);
+ mipi_dsi_dcs_write_seq(dsi, 0x30, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x31, 0x18);
+ mipi_dsi_dcs_write_seq(dsi, 0x32, 0x09);
+ mipi_dsi_dcs_write_seq(dsi, 0x33, 0x19);
+ mipi_dsi_dcs_write_seq(dsi, 0x34, 0x09);
+ mipi_dsi_dcs_write_seq(dsi, 0x35, 0x1A);
+ mipi_dsi_dcs_write_seq(dsi, 0x36, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0x37, 0x1B);
+ mipi_dsi_dcs_write_seq(dsi, 0x38, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0x39, 0x1C);
+ mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x1D);
+ mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x1E);
+ mipi_dsi_dcs_write_seq(dsi, 0x3E, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0x3F, 0x1F);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x01);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0E);
+ mipi_dsi_dcs_write_seq(dsi, 0x02, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0x20, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0x25, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0x26, 0xE0);
+ mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x29, 0x71);
+ mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x46);
+ mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x1F);
+ mipi_dsi_dcs_write_seq(dsi, 0x2D, 0xC7);
+ mipi_dsi_dcs_write_seq(dsi, 0x31, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x32, 0xDF);
+ mipi_dsi_dcs_write_seq(dsi, 0x33, 0x5A);
+ mipi_dsi_dcs_write_seq(dsi, 0x34, 0xC0);
+ mipi_dsi_dcs_write_seq(dsi, 0x35, 0x5A);
+ mipi_dsi_dcs_write_seq(dsi, 0x36, 0xC0);
+ mipi_dsi_dcs_write_seq(dsi, 0x38, 0x65);
+ mipi_dsi_dcs_write_seq(dsi, 0x80, 0x3E);
+ mipi_dsi_dcs_write_seq(dsi, 0x81, 0xA0);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xB1, 0xCC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x12);
+ mipi_dsi_dcs_write_seq(dsi, 0xC2, 0xCC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC3, 0xCC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC4, 0xCC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC5, 0xCC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC6, 0xCC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC7, 0xCC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC8, 0xCC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC9, 0xCC);
+ mipi_dsi_dcs_write_seq(dsi, 0x30, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x00, 0x81);
+ mipi_dsi_dcs_write_seq(dsi, 0x08, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x09, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x07, 0x21);
+ mipi_dsi_dcs_write_seq(dsi, 0x04, 0x10);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x1E);
+ mipi_dsi_dcs_write_seq(dsi, 0x60, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x64, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x6D, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0B);
+ mipi_dsi_dcs_write_seq(dsi, 0xA6, 0x44);
+ mipi_dsi_dcs_write_seq(dsi, 0xA7, 0xB6);
+ mipi_dsi_dcs_write_seq(dsi, 0xA8, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0xA9, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0xAA, 0x51);
+ mipi_dsi_dcs_write_seq(dsi, 0xAB, 0x51);
+ mipi_dsi_dcs_write_seq(dsi, 0xAC, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x92);
+ mipi_dsi_dcs_write_seq(dsi, 0xBE, 0xA1);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0x86, 0x87);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x92, 0x22);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x00);
+
+ ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
+ if (ret)
+ return ret;
+ msleep(120);
+ ret = mipi_dsi_dcs_set_display_on(dsi);
+ if (ret)
+ return ret;
+ msleep(20);
+
+ return 0;
+};
+
+static inline struct boe_panel *to_boe_panel(struct drm_panel *panel)
+{
+ return container_of(panel, struct boe_panel, base);
+}
+
static int boe_panel_enter_sleep_mode(struct boe_panel *boe)
{
struct mipi_dsi_device *dsi = boe->dsi;
@@ -1860,10 +1815,12 @@ static int boe_panel_prepare(struct drm_panel *panel)
gpiod_set_value(boe->enable_gpio, 1);
usleep_range(6000, 10000);
- ret = boe_panel_init_dcs_cmd(boe);
- if (ret < 0) {
- dev_err(panel->dev, "failed to init panel: %d\n", ret);
- goto poweroff;
+ if (boe->desc->init) {
+ ret = boe->desc->init(boe->dsi);
+ if (ret < 0) {
+ dev_err(panel->dev, "failed to init panel: %d\n", ret);
+ goto poweroff;
+ }
}
boe->prepared = true;
@@ -1914,7 +1871,7 @@ static const struct panel_desc boe_tv110c9m_desc = {
| MIPI_DSI_MODE_VIDEO_HSE
| MIPI_DSI_CLOCK_NON_CONTINUOUS
| MIPI_DSI_MODE_VIDEO_BURST,
- .init_cmds = boe_tv110c9m_init_cmd,
+ .init = boe_tv110c9m_init,
};
static const struct drm_display_mode inx_hj110iz_default_mode = {
@@ -1943,7 +1900,7 @@ static const struct panel_desc inx_hj110iz_desc = {
| MIPI_DSI_MODE_VIDEO_HSE
| MIPI_DSI_CLOCK_NON_CONTINUOUS
| MIPI_DSI_MODE_VIDEO_BURST,
- .init_cmds = inx_hj110iz_init_cmd,
+ .init = inx_hj110iz_init,
};
static const struct drm_display_mode boe_tv101wum_nl6_default_mode = {
@@ -1969,7 +1926,7 @@ static const struct panel_desc boe_tv101wum_nl6_desc = {
.format = MIPI_DSI_FMT_RGB888,
.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
MIPI_DSI_MODE_LPM,
- .init_cmds = boe_init_cmd,
+ .init = boe_init,
.discharge_on_disable = false,
};
@@ -1996,7 +1953,7 @@ static const struct panel_desc auo_kd101n80_45na_desc = {
.format = MIPI_DSI_FMT_RGB888,
.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
MIPI_DSI_MODE_LPM,
- .init_cmds = auo_kd101n80_45na_init_cmd,
+ .init = auo_kd101n80_45na_init,
.discharge_on_disable = true,
};
@@ -2024,7 +1981,7 @@ static const struct panel_desc boe_tv101wum_n53_desc = {
.format = MIPI_DSI_FMT_RGB888,
.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
MIPI_DSI_MODE_LPM,
- .init_cmds = boe_init_cmd,
+ .init = boe_init,
};
static const struct drm_display_mode auo_b101uan08_3_default_mode = {
@@ -2051,7 +2008,7 @@ static const struct panel_desc auo_b101uan08_3_desc = {
.format = MIPI_DSI_FMT_RGB888,
.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
MIPI_DSI_MODE_LPM,
- .init_cmds = auo_b101uan08_3_init_cmd,
+ .init = auo_b101uan08_3_init,
};
static const struct drm_display_mode boe_tv105wum_nw0_default_mode = {
@@ -2078,7 +2035,7 @@ static const struct panel_desc boe_tv105wum_nw0_desc = {
.format = MIPI_DSI_FMT_RGB888,
.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
MIPI_DSI_MODE_LPM,
- .init_cmds = boe_init_cmd,
+ .init = boe_init,
.lp11_before_reset = true,
};
@@ -2105,7 +2062,7 @@ static const struct panel_desc starry_qfh032011_53g_desc = {
.format = MIPI_DSI_FMT_RGB888,
.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
MIPI_DSI_MODE_LPM,
- .init_cmds = starry_qfh032011_53g_init_cmd,
+ .init = starry_qfh032011_53g_init,
};
static const struct drm_display_mode starry_himax83102_j02_default_mode = {
@@ -2132,7 +2089,7 @@ static const struct panel_desc starry_himax83102_j02_desc = {
.format = MIPI_DSI_FMT_RGB888,
.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
MIPI_DSI_MODE_LPM,
- .init_cmds = starry_himax83102_j02_init_cmd,
+ .init = starry_himax83102_j02_init,
.lp11_before_reset = true,
};
@@ -2160,7 +2117,7 @@ static const struct panel_desc starry_ili9882t_desc = {
.format = MIPI_DSI_FMT_RGB888,
.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
MIPI_DSI_MODE_LPM,
- .init_cmds = starry_ili9882t_init_cmd,
+ .init = starry_ili9882t_init,
.lp11_before_reset = true,
};
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH v3 2/4] drm/panel: boe-tv101wum-nl6: Drop surplus prepare tracking
2023-07-03 13:21 [PATCH v3 0/4] Fix up the boe-tv101wum-nl6 panel driver Linus Walleij
2023-07-03 13:21 ` [PATCH v3 1/4] drm/panel: boe-tv101wum-nl6: Drop macros and open code sequences Linus Walleij
@ 2023-07-03 13:21 ` Linus Walleij
2023-07-06 21:11 ` Doug Anderson
2023-07-03 13:21 ` [PATCH v3 3/4] drm/panel: ili9882t: Break out as separate driver Linus Walleij
` (3 subsequent siblings)
5 siblings, 1 reply; 19+ messages in thread
From: Linus Walleij @ 2023-07-03 13:21 UTC (permalink / raw)
To: Ruihai Zhou, Stephen Boyd, Douglas Anderson, Cong Yang,
Jitao Shi, Neil Armstrong, Sam Ravnborg, David Airlie,
Daniel Vetter
Cc: linux-kernel, dri-devel
The DRM panel core already keeps track of if the panel is already
prepared so do not reimplement this.
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 12 ------------
1 file changed, 12 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index 6fd4c9507c88..358918e0f03f 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -51,8 +51,6 @@ struct boe_panel {
struct regulator *avee;
struct regulator *avdd;
struct gpio_desc *enable_gpio;
-
- bool prepared;
};
static int boe_tv110c9m_init(struct mipi_dsi_device *dsi)
@@ -1748,9 +1746,6 @@ static int boe_panel_unprepare(struct drm_panel *panel)
{
struct boe_panel *boe = to_boe_panel(panel);
- if (!boe->prepared)
- return 0;
-
if (boe->desc->discharge_on_disable) {
regulator_disable(boe->avee);
regulator_disable(boe->avdd);
@@ -1769,8 +1764,6 @@ static int boe_panel_unprepare(struct drm_panel *panel)
regulator_disable(boe->pp3300);
}
- boe->prepared = false;
-
return 0;
}
@@ -1779,9 +1772,6 @@ static int boe_panel_prepare(struct drm_panel *panel)
struct boe_panel *boe = to_boe_panel(panel);
int ret;
- if (boe->prepared)
- return 0;
-
gpiod_set_value(boe->enable_gpio, 0);
usleep_range(1000, 1500);
@@ -1823,8 +1813,6 @@ static int boe_panel_prepare(struct drm_panel *panel)
}
}
- boe->prepared = true;
-
return 0;
poweroff:
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH v3 3/4] drm/panel: ili9882t: Break out as separate driver
2023-07-03 13:21 [PATCH v3 0/4] Fix up the boe-tv101wum-nl6 panel driver Linus Walleij
2023-07-03 13:21 ` [PATCH v3 1/4] drm/panel: boe-tv101wum-nl6: Drop macros and open code sequences Linus Walleij
2023-07-03 13:21 ` [PATCH v3 2/4] drm/panel: boe-tv101wum-nl6: Drop surplus prepare tracking Linus Walleij
@ 2023-07-03 13:21 ` Linus Walleij
2023-07-06 21:14 ` Doug Anderson
` (2 more replies)
2023-07-03 13:21 ` [PATCH v3 4/4] drm/panel: ili9882t: Break out function for switching page Linus Walleij
` (2 subsequent siblings)
5 siblings, 3 replies; 19+ messages in thread
From: Linus Walleij @ 2023-07-03 13:21 UTC (permalink / raw)
To: Ruihai Zhou, Stephen Boyd, Douglas Anderson, Cong Yang,
Jitao Shi, Neil Armstrong, Sam Ravnborg, David Airlie,
Daniel Vetter
Cc: linux-kernel, dri-devel
The Starry ILI9882t-based panel should never have been part of the boe
tv101wum driver, it is clearly based on the Ilitek ILI9882t display
controller and if you look at the custom command sequences for the
panel these clearly contain the signature Ilitek page switch (0xff)
commands. The hardware has nothing in common with the other panels
supported by this driver.
Break this out into a separate driver and config symbol instead.
If the placement here is out of convenience for using similar code,
we should consider creating a helper library instead.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/gpu/drm/panel/Kconfig | 9 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 386 -------------
drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 739 +++++++++++++++++++++++++
4 files changed, 749 insertions(+), 386 deletions(-)
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 1a0fd0754692..c39e949a26eb 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -203,6 +203,15 @@ config DRM_PANEL_ILITEK_ILI9881C
Say Y if you want to enable support for panels based on the
Ilitek ILI9881c controller.
+config DRM_PANEL_ILITEK_ILI9882T
+ tristate "Ilitek ILI9882t-based panels"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ help
+ Say Y if you want to enable support for panels based on the
+ Ilitek ILI9882t controller.
+
config DRM_PANEL_INNOLUX_EJ030NA
tristate "Innolux EJ030NA 320x480 LCD panel"
depends on OF && SPI
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index 499e38244253..75c2533d337e 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_DRM_PANEL_HIMAX_HX8394) += panel-himax-hx8394.o
obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
+obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9882T) += panel-ilitek-ili9882t.o
obj-$(CONFIG_DRM_PANEL_INNOLUX_EJ030NA) += panel-innolux-ej030na.o
obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
obj-$(CONFIG_DRM_PANEL_JADARD_JD9365DA_H3) += panel-jadard-jd9365da-h3.o
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index 358918e0f03f..14a0ee95a803 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1348,361 +1348,6 @@ static int starry_himax83102_j02_init(struct mipi_dsi_device *dsi)
return 0;
};
-
-static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
-{
- int ret;
-
- msleep(5);
-
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x01);
- mipi_dsi_dcs_write_seq(dsi, 0x00, 0x42);
- mipi_dsi_dcs_write_seq(dsi, 0x01, 0x11);
- mipi_dsi_dcs_write_seq(dsi, 0x02, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0x03, 0x00);
-
- mipi_dsi_dcs_write_seq(dsi, 0x04, 0x01);
- mipi_dsi_dcs_write_seq(dsi, 0x05, 0x11);
- mipi_dsi_dcs_write_seq(dsi, 0x06, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0x07, 0x00);
-
- mipi_dsi_dcs_write_seq(dsi, 0x08, 0x80);
- mipi_dsi_dcs_write_seq(dsi, 0x09, 0x81);
- mipi_dsi_dcs_write_seq(dsi, 0x0A, 0x71);
- mipi_dsi_dcs_write_seq(dsi, 0x0B, 0x00);
-
- mipi_dsi_dcs_write_seq(dsi, 0x0C, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0x0E, 0x1A);
-
- mipi_dsi_dcs_write_seq(dsi, 0x24, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0x25, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0x26, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00);
-
- mipi_dsi_dcs_write_seq(dsi, 0x2C, 0xD4);
- mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x40);
-
- mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x11);
-
- mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x32);
- mipi_dsi_dcs_write_seq(dsi, 0xD1, 0x30);
-
- mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x55);
-
- mipi_dsi_dcs_write_seq(dsi, 0xD0, 0x01);
- mipi_dsi_dcs_write_seq(dsi, 0xE3, 0x93);
- mipi_dsi_dcs_write_seq(dsi, 0xE4, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x80);
-
- mipi_dsi_dcs_write_seq(dsi, 0x31, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x32, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x33, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x34, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x35, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x36, 0x01);
- mipi_dsi_dcs_write_seq(dsi, 0x37, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0x38, 0x28);
- mipi_dsi_dcs_write_seq(dsi, 0x39, 0x29);
- mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x11);
- mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x13);
- mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x15);
- mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x17);
- mipi_dsi_dcs_write_seq(dsi, 0x3E, 0x09);
- mipi_dsi_dcs_write_seq(dsi, 0x3F, 0x0D);
- mipi_dsi_dcs_write_seq(dsi, 0x40, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x41, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x42, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x43, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x44, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x45, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x46, 0x02);
-
- mipi_dsi_dcs_write_seq(dsi, 0x47, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x48, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x49, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x4A, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x4B, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x4C, 0x01);
- mipi_dsi_dcs_write_seq(dsi, 0x4D, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0x4E, 0x28);
- mipi_dsi_dcs_write_seq(dsi, 0x4F, 0x29);
- mipi_dsi_dcs_write_seq(dsi, 0x50, 0x10);
- mipi_dsi_dcs_write_seq(dsi, 0x51, 0x12);
- mipi_dsi_dcs_write_seq(dsi, 0x52, 0x14);
- mipi_dsi_dcs_write_seq(dsi, 0x53, 0x16);
- mipi_dsi_dcs_write_seq(dsi, 0x54, 0x08);
- mipi_dsi_dcs_write_seq(dsi, 0x55, 0x0C);
- mipi_dsi_dcs_write_seq(dsi, 0x56, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x57, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x58, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x59, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x5A, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x5B, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x5C, 0x02);
-
- mipi_dsi_dcs_write_seq(dsi, 0x61, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x62, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x63, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x64, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x65, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x66, 0x01);
- mipi_dsi_dcs_write_seq(dsi, 0x67, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0x68, 0x28);
- mipi_dsi_dcs_write_seq(dsi, 0x69, 0x29);
- mipi_dsi_dcs_write_seq(dsi, 0x6A, 0x16);
- mipi_dsi_dcs_write_seq(dsi, 0x6B, 0x14);
- mipi_dsi_dcs_write_seq(dsi, 0x6C, 0x12);
- mipi_dsi_dcs_write_seq(dsi, 0x6D, 0x10);
- mipi_dsi_dcs_write_seq(dsi, 0x6E, 0x0C);
- mipi_dsi_dcs_write_seq(dsi, 0x6F, 0x08);
- mipi_dsi_dcs_write_seq(dsi, 0x70, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x71, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x72, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x73, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x74, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x75, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x76, 0x02);
-
- mipi_dsi_dcs_write_seq(dsi, 0x77, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x78, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x79, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x7A, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x7B, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x7C, 0x01);
- mipi_dsi_dcs_write_seq(dsi, 0x7D, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0x7E, 0x28);
- mipi_dsi_dcs_write_seq(dsi, 0x7F, 0x29);
- mipi_dsi_dcs_write_seq(dsi, 0x80, 0x17);
- mipi_dsi_dcs_write_seq(dsi, 0x81, 0x15);
- mipi_dsi_dcs_write_seq(dsi, 0x82, 0x13);
- mipi_dsi_dcs_write_seq(dsi, 0x83, 0x11);
- mipi_dsi_dcs_write_seq(dsi, 0x84, 0x0D);
- mipi_dsi_dcs_write_seq(dsi, 0x85, 0x09);
- mipi_dsi_dcs_write_seq(dsi, 0x86, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x87, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x88, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x89, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x8A, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x8B, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x8C, 0x07);
-
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x29, 0x3A);
- mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x3B);
-
- mipi_dsi_dcs_write_seq(dsi, 0x06, 0x01);
- mipi_dsi_dcs_write_seq(dsi, 0x07, 0x01);
- mipi_dsi_dcs_write_seq(dsi, 0x08, 0x0C);
- mipi_dsi_dcs_write_seq(dsi, 0x09, 0x44);
-
- mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x0A);
- mipi_dsi_dcs_write_seq(dsi, 0x39, 0x11);
- mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x0C);
- mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x44);
-
- mipi_dsi_dcs_write_seq(dsi, 0x53, 0x1F);
- mipi_dsi_dcs_write_seq(dsi, 0x5E, 0x40);
- mipi_dsi_dcs_write_seq(dsi, 0x84, 0x00);
-
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x03);
- mipi_dsi_dcs_write_seq(dsi, 0x20, 0x01);
- mipi_dsi_dcs_write_seq(dsi, 0x21, 0x3C);
- mipi_dsi_dcs_write_seq(dsi, 0x22, 0xFA);
-
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0A);
- mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x01);
- mipi_dsi_dcs_write_seq(dsi, 0xE2, 0x01);
- mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x91);
- mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x3C);
- mipi_dsi_dcs_write_seq(dsi, 0xE7, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0xE8, 0xFA);
-
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x12);
- mipi_dsi_dcs_write_seq(dsi, 0x87, 0x2C);
-
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x05);
- mipi_dsi_dcs_write_seq(dsi, 0x73, 0xE5);
- mipi_dsi_dcs_write_seq(dsi, 0x7F, 0x6B);
- mipi_dsi_dcs_write_seq(dsi, 0x6D, 0xA4);
- mipi_dsi_dcs_write_seq(dsi, 0x79, 0x54);
- mipi_dsi_dcs_write_seq(dsi, 0x69, 0x97);
- mipi_dsi_dcs_write_seq(dsi, 0x6A, 0x97);
- mipi_dsi_dcs_write_seq(dsi, 0xA5, 0x3F);
- mipi_dsi_dcs_write_seq(dsi, 0x61, 0xDA);
- mipi_dsi_dcs_write_seq(dsi, 0xA7, 0xF1);
- mipi_dsi_dcs_write_seq(dsi, 0x5F, 0x01);
- mipi_dsi_dcs_write_seq(dsi, 0x62, 0x3F);
- mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x90);
- mipi_dsi_dcs_write_seq(dsi, 0x86, 0x87);
-
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x06);
- mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x80);
- mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x58);
- mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0xCE, 0x58);
- mipi_dsi_dcs_write_seq(dsi, 0xCF, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x67, 0x60);
- mipi_dsi_dcs_write_seq(dsi, 0x10, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0x92, 0x22);
- mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x08);
- mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x55);
- mipi_dsi_dcs_write_seq(dsi, 0xDC, 0x38);
-
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x08);
- mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79,
- 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD,
- 0xD5, 0xE2, 0xE8);
- mipi_dsi_dcs_write_seq(dsi, 0xE1, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79,
- 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD,
- 0xD5, 0xE2, 0xE8);
-
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x04);
- mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x81);
-
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0C);
- mipi_dsi_dcs_write_seq(dsi, 0x00, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x01, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0x02, 0x03);
- mipi_dsi_dcs_write_seq(dsi, 0x03, 0x01);
- mipi_dsi_dcs_write_seq(dsi, 0x04, 0x03);
- mipi_dsi_dcs_write_seq(dsi, 0x05, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x06, 0x04);
- mipi_dsi_dcs_write_seq(dsi, 0x07, 0x03);
- mipi_dsi_dcs_write_seq(dsi, 0x08, 0x03);
- mipi_dsi_dcs_write_seq(dsi, 0x09, 0x04);
- mipi_dsi_dcs_write_seq(dsi, 0x0A, 0x04);
- mipi_dsi_dcs_write_seq(dsi, 0x0B, 0x05);
- mipi_dsi_dcs_write_seq(dsi, 0x0C, 0x04);
- mipi_dsi_dcs_write_seq(dsi, 0x0D, 0x06);
- mipi_dsi_dcs_write_seq(dsi, 0x0E, 0x05);
- mipi_dsi_dcs_write_seq(dsi, 0x0F, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x10, 0x04);
- mipi_dsi_dcs_write_seq(dsi, 0x11, 0x08);
- mipi_dsi_dcs_write_seq(dsi, 0x12, 0x05);
- mipi_dsi_dcs_write_seq(dsi, 0x13, 0x09);
- mipi_dsi_dcs_write_seq(dsi, 0x14, 0x05);
- mipi_dsi_dcs_write_seq(dsi, 0x15, 0x0A);
- mipi_dsi_dcs_write_seq(dsi, 0x16, 0x06);
- mipi_dsi_dcs_write_seq(dsi, 0x17, 0x0B);
- mipi_dsi_dcs_write_seq(dsi, 0x18, 0x05);
- mipi_dsi_dcs_write_seq(dsi, 0x19, 0x0C);
- mipi_dsi_dcs_write_seq(dsi, 0x1A, 0x06);
- mipi_dsi_dcs_write_seq(dsi, 0x1B, 0x0D);
- mipi_dsi_dcs_write_seq(dsi, 0x1C, 0x06);
- mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x0E);
- mipi_dsi_dcs_write_seq(dsi, 0x1E, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x1F, 0x0F);
- mipi_dsi_dcs_write_seq(dsi, 0x20, 0x06);
- mipi_dsi_dcs_write_seq(dsi, 0x21, 0x10);
- mipi_dsi_dcs_write_seq(dsi, 0x22, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x23, 0x11);
- mipi_dsi_dcs_write_seq(dsi, 0x24, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x25, 0x12);
- mipi_dsi_dcs_write_seq(dsi, 0x26, 0x08);
- mipi_dsi_dcs_write_seq(dsi, 0x27, 0x13);
- mipi_dsi_dcs_write_seq(dsi, 0x28, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0x29, 0x14);
- mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x08);
- mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x15);
- mipi_dsi_dcs_write_seq(dsi, 0x2C, 0x08);
- mipi_dsi_dcs_write_seq(dsi, 0x2D, 0x16);
- mipi_dsi_dcs_write_seq(dsi, 0x2E, 0x09);
- mipi_dsi_dcs_write_seq(dsi, 0x2F, 0x17);
- mipi_dsi_dcs_write_seq(dsi, 0x30, 0x08);
- mipi_dsi_dcs_write_seq(dsi, 0x31, 0x18);
- mipi_dsi_dcs_write_seq(dsi, 0x32, 0x09);
- mipi_dsi_dcs_write_seq(dsi, 0x33, 0x19);
- mipi_dsi_dcs_write_seq(dsi, 0x34, 0x09);
- mipi_dsi_dcs_write_seq(dsi, 0x35, 0x1A);
- mipi_dsi_dcs_write_seq(dsi, 0x36, 0x0A);
- mipi_dsi_dcs_write_seq(dsi, 0x37, 0x1B);
- mipi_dsi_dcs_write_seq(dsi, 0x38, 0x0A);
- mipi_dsi_dcs_write_seq(dsi, 0x39, 0x1C);
- mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x0A);
- mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x1D);
- mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x0A);
- mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x1E);
- mipi_dsi_dcs_write_seq(dsi, 0x3E, 0x0A);
- mipi_dsi_dcs_write_seq(dsi, 0x3F, 0x1F);
-
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x04);
- mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x01);
-
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0E);
- mipi_dsi_dcs_write_seq(dsi, 0x02, 0x0C);
- mipi_dsi_dcs_write_seq(dsi, 0x20, 0x10);
- mipi_dsi_dcs_write_seq(dsi, 0x25, 0x16);
- mipi_dsi_dcs_write_seq(dsi, 0x26, 0xE0);
- mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0x29, 0x71);
- mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x46);
- mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x1F);
- mipi_dsi_dcs_write_seq(dsi, 0x2D, 0xC7);
- mipi_dsi_dcs_write_seq(dsi, 0x31, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x32, 0xDF);
- mipi_dsi_dcs_write_seq(dsi, 0x33, 0x5A);
- mipi_dsi_dcs_write_seq(dsi, 0x34, 0xC0);
- mipi_dsi_dcs_write_seq(dsi, 0x35, 0x5A);
- mipi_dsi_dcs_write_seq(dsi, 0x36, 0xC0);
- mipi_dsi_dcs_write_seq(dsi, 0x38, 0x65);
- mipi_dsi_dcs_write_seq(dsi, 0x80, 0x3E);
- mipi_dsi_dcs_write_seq(dsi, 0x81, 0xA0);
- mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x01);
- mipi_dsi_dcs_write_seq(dsi, 0xB1, 0xCC);
- mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x12);
- mipi_dsi_dcs_write_seq(dsi, 0xC2, 0xCC);
- mipi_dsi_dcs_write_seq(dsi, 0xC3, 0xCC);
- mipi_dsi_dcs_write_seq(dsi, 0xC4, 0xCC);
- mipi_dsi_dcs_write_seq(dsi, 0xC5, 0xCC);
- mipi_dsi_dcs_write_seq(dsi, 0xC6, 0xCC);
- mipi_dsi_dcs_write_seq(dsi, 0xC7, 0xCC);
- mipi_dsi_dcs_write_seq(dsi, 0xC8, 0xCC);
- mipi_dsi_dcs_write_seq(dsi, 0xC9, 0xCC);
- mipi_dsi_dcs_write_seq(dsi, 0x30, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0x00, 0x81);
- mipi_dsi_dcs_write_seq(dsi, 0x08, 0x02);
- mipi_dsi_dcs_write_seq(dsi, 0x09, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0x07, 0x21);
- mipi_dsi_dcs_write_seq(dsi, 0x04, 0x10);
-
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x1E);
- mipi_dsi_dcs_write_seq(dsi, 0x60, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0x64, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0x6D, 0x00);
-
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0B);
- mipi_dsi_dcs_write_seq(dsi, 0xA6, 0x44);
- mipi_dsi_dcs_write_seq(dsi, 0xA7, 0xB6);
- mipi_dsi_dcs_write_seq(dsi, 0xA8, 0x03);
- mipi_dsi_dcs_write_seq(dsi, 0xA9, 0x03);
- mipi_dsi_dcs_write_seq(dsi, 0xAA, 0x51);
- mipi_dsi_dcs_write_seq(dsi, 0xAB, 0x51);
- mipi_dsi_dcs_write_seq(dsi, 0xAC, 0x04);
- mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x92);
- mipi_dsi_dcs_write_seq(dsi, 0xBE, 0xA1);
-
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x05);
- mipi_dsi_dcs_write_seq(dsi, 0x86, 0x87);
-
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x06);
- mipi_dsi_dcs_write_seq(dsi, 0x92, 0x22);
-
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x00);
-
- ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
- if (ret)
- return ret;
- msleep(120);
- ret = mipi_dsi_dcs_set_display_on(dsi);
- if (ret)
- return ret;
- msleep(20);
-
- return 0;
-};
-
static inline struct boe_panel *to_boe_panel(struct drm_panel *panel)
{
return container_of(panel, struct boe_panel, base);
@@ -2081,34 +1726,6 @@ static const struct panel_desc starry_himax83102_j02_desc = {
.lp11_before_reset = true,
};
-static const struct drm_display_mode starry_ili9882t_default_mode = {
- .clock = 165280,
- .hdisplay = 1200,
- .hsync_start = 1200 + 32,
- .hsync_end = 1200 + 32 + 30,
- .htotal = 1200 + 32 + 30 + 32,
- .vdisplay = 1920,
- .vsync_start = 1920 + 68,
- .vsync_end = 1920 + 68 + 2,
- .vtotal = 1920 + 68 + 2 + 10,
- .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
-};
-
-static const struct panel_desc starry_ili9882t_desc = {
- .modes = &starry_ili9882t_default_mode,
- .bpc = 8,
- .size = {
- .width_mm = 141,
- .height_mm = 226,
- },
- .lanes = 4,
- .format = MIPI_DSI_FMT_RGB888,
- .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
- MIPI_DSI_MODE_LPM,
- .init = starry_ili9882t_init,
- .lp11_before_reset = true,
-};
-
static int boe_panel_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
{
@@ -2285,9 +1902,6 @@ static const struct of_device_id boe_of_match[] = {
{ .compatible = "starry,himax83102-j02",
.data = &starry_himax83102_j02_desc
},
- { .compatible = "starry,ili9882t",
- .data = &starry_ili9882t_desc
- },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, boe_of_match);
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
new file mode 100644
index 000000000000..20f3cc37fa83
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
@@ -0,0 +1,739 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Panels based on the Ilitek ILI9882T display controller.
+ */
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/regulator/consumer.h>
+
+#include <drm/drm_connector.h>
+#include <drm/drm_crtc.h>
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_panel.h>
+
+#include <video/mipi_display.h>
+
+/*
+ * Use this descriptor struct to describe different panels using the
+ * Ilitek ILI9882T display controller.
+ */
+struct panel_desc {
+ const struct drm_display_mode *modes;
+ unsigned int bpc;
+
+ /**
+ * @width_mm: width of the panel's active display area
+ * @height_mm: height of the panel's active display area
+ */
+ struct {
+ unsigned int width_mm;
+ unsigned int height_mm;
+ } size;
+
+ unsigned long mode_flags;
+ enum mipi_dsi_pixel_format format;
+ int (*init)(struct mipi_dsi_device *dsi);
+ unsigned int lanes;
+ bool discharge_on_disable;
+ bool lp11_before_reset;
+};
+
+struct ili9882t {
+ struct drm_panel base;
+ struct mipi_dsi_device *dsi;
+
+ const struct panel_desc *desc;
+
+ enum drm_panel_orientation orientation;
+ struct regulator *pp3300;
+ struct regulator *pp1800;
+ struct regulator *avee;
+ struct regulator *avdd;
+ struct gpio_desc *enable_gpio;
+};
+
+static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
+{
+ int ret;
+
+ msleep(5);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x00, 0x42);
+ mipi_dsi_dcs_write_seq(dsi, 0x01, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0x02, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x03, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x04, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x05, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0x06, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x07, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x08, 0x80);
+ mipi_dsi_dcs_write_seq(dsi, 0x09, 0x81);
+ mipi_dsi_dcs_write_seq(dsi, 0x0A, 0x71);
+ mipi_dsi_dcs_write_seq(dsi, 0x0B, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x0C, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x0E, 0x1A);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x24, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x25, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x26, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x2C, 0xD4);
+ mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x40);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x11);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x32);
+ mipi_dsi_dcs_write_seq(dsi, 0xD1, 0x30);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x55);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xD0, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xE3, 0x93);
+ mipi_dsi_dcs_write_seq(dsi, 0xE4, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x80);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x31, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x32, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x33, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x34, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x35, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x36, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x37, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x38, 0x28);
+ mipi_dsi_dcs_write_seq(dsi, 0x39, 0x29);
+ mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x13);
+ mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x15);
+ mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x17);
+ mipi_dsi_dcs_write_seq(dsi, 0x3E, 0x09);
+ mipi_dsi_dcs_write_seq(dsi, 0x3F, 0x0D);
+ mipi_dsi_dcs_write_seq(dsi, 0x40, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x41, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x42, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x43, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x44, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x45, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x46, 0x02);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x47, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x48, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x49, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x4A, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x4B, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x4C, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x4D, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x4E, 0x28);
+ mipi_dsi_dcs_write_seq(dsi, 0x4F, 0x29);
+ mipi_dsi_dcs_write_seq(dsi, 0x50, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0x51, 0x12);
+ mipi_dsi_dcs_write_seq(dsi, 0x52, 0x14);
+ mipi_dsi_dcs_write_seq(dsi, 0x53, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0x54, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x55, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0x56, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x57, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x58, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x59, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x5A, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x5B, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x5C, 0x02);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x61, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x62, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x63, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x64, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x65, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x66, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x67, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x68, 0x28);
+ mipi_dsi_dcs_write_seq(dsi, 0x69, 0x29);
+ mipi_dsi_dcs_write_seq(dsi, 0x6A, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0x6B, 0x14);
+ mipi_dsi_dcs_write_seq(dsi, 0x6C, 0x12);
+ mipi_dsi_dcs_write_seq(dsi, 0x6D, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0x6E, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0x6F, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x70, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x71, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x72, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x73, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x74, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x75, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x76, 0x02);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x77, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x78, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x79, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x7A, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x7B, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x7C, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x7D, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x7E, 0x28);
+ mipi_dsi_dcs_write_seq(dsi, 0x7F, 0x29);
+ mipi_dsi_dcs_write_seq(dsi, 0x80, 0x17);
+ mipi_dsi_dcs_write_seq(dsi, 0x81, 0x15);
+ mipi_dsi_dcs_write_seq(dsi, 0x82, 0x13);
+ mipi_dsi_dcs_write_seq(dsi, 0x83, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0x84, 0x0D);
+ mipi_dsi_dcs_write_seq(dsi, 0x85, 0x09);
+ mipi_dsi_dcs_write_seq(dsi, 0x86, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x87, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x88, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x89, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x8A, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x8B, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x8C, 0x07);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x29, 0x3A);
+ mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x3B);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x06, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x07, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x08, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0x09, 0x44);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0x39, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x44);
+
+ mipi_dsi_dcs_write_seq(dsi, 0x53, 0x1F);
+ mipi_dsi_dcs_write_seq(dsi, 0x5E, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0x84, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x20, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x21, 0x3C);
+ mipi_dsi_dcs_write_seq(dsi, 0x22, 0xFA);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xE2, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x91);
+ mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x3C);
+ mipi_dsi_dcs_write_seq(dsi, 0xE7, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xE8, 0xFA);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x12);
+ mipi_dsi_dcs_write_seq(dsi, 0x87, 0x2C);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0x73, 0xE5);
+ mipi_dsi_dcs_write_seq(dsi, 0x7F, 0x6B);
+ mipi_dsi_dcs_write_seq(dsi, 0x6D, 0xA4);
+ mipi_dsi_dcs_write_seq(dsi, 0x79, 0x54);
+ mipi_dsi_dcs_write_seq(dsi, 0x69, 0x97);
+ mipi_dsi_dcs_write_seq(dsi, 0x6A, 0x97);
+ mipi_dsi_dcs_write_seq(dsi, 0xA5, 0x3F);
+ mipi_dsi_dcs_write_seq(dsi, 0x61, 0xDA);
+ mipi_dsi_dcs_write_seq(dsi, 0xA7, 0xF1);
+ mipi_dsi_dcs_write_seq(dsi, 0x5F, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x62, 0x3F);
+ mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x90);
+ mipi_dsi_dcs_write_seq(dsi, 0x86, 0x87);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x80);
+ mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x58);
+ mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0xCE, 0x58);
+ mipi_dsi_dcs_write_seq(dsi, 0xCF, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x67, 0x60);
+ mipi_dsi_dcs_write_seq(dsi, 0x10, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x92, 0x22);
+ mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x55);
+ mipi_dsi_dcs_write_seq(dsi, 0xDC, 0x38);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79,
+ 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD,
+ 0xD5, 0xE2, 0xE8);
+ mipi_dsi_dcs_write_seq(dsi, 0xE1, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79,
+ 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD,
+ 0xD5, 0xE2, 0xE8);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x81);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0x00, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x01, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x02, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x03, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x04, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x05, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x06, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x07, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x08, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0x09, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x0A, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x0B, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0x0C, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x0D, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x0E, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0x0F, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x10, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x11, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x12, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0x13, 0x09);
+ mipi_dsi_dcs_write_seq(dsi, 0x14, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0x15, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0x16, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x17, 0x0B);
+ mipi_dsi_dcs_write_seq(dsi, 0x18, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0x19, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0x1A, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x1B, 0x0D);
+ mipi_dsi_dcs_write_seq(dsi, 0x1C, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x0E);
+ mipi_dsi_dcs_write_seq(dsi, 0x1E, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x1F, 0x0F);
+ mipi_dsi_dcs_write_seq(dsi, 0x20, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x21, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0x22, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x23, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0x24, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x25, 0x12);
+ mipi_dsi_dcs_write_seq(dsi, 0x26, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x27, 0x13);
+ mipi_dsi_dcs_write_seq(dsi, 0x28, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x29, 0x14);
+ mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x15);
+ mipi_dsi_dcs_write_seq(dsi, 0x2C, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x2D, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0x2E, 0x09);
+ mipi_dsi_dcs_write_seq(dsi, 0x2F, 0x17);
+ mipi_dsi_dcs_write_seq(dsi, 0x30, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x31, 0x18);
+ mipi_dsi_dcs_write_seq(dsi, 0x32, 0x09);
+ mipi_dsi_dcs_write_seq(dsi, 0x33, 0x19);
+ mipi_dsi_dcs_write_seq(dsi, 0x34, 0x09);
+ mipi_dsi_dcs_write_seq(dsi, 0x35, 0x1A);
+ mipi_dsi_dcs_write_seq(dsi, 0x36, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0x37, 0x1B);
+ mipi_dsi_dcs_write_seq(dsi, 0x38, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0x39, 0x1C);
+ mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x1D);
+ mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x1E);
+ mipi_dsi_dcs_write_seq(dsi, 0x3E, 0x0A);
+ mipi_dsi_dcs_write_seq(dsi, 0x3F, 0x1F);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x01);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0E);
+ mipi_dsi_dcs_write_seq(dsi, 0x02, 0x0C);
+ mipi_dsi_dcs_write_seq(dsi, 0x20, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0x25, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0x26, 0xE0);
+ mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x29, 0x71);
+ mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x46);
+ mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x1F);
+ mipi_dsi_dcs_write_seq(dsi, 0x2D, 0xC7);
+ mipi_dsi_dcs_write_seq(dsi, 0x31, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x32, 0xDF);
+ mipi_dsi_dcs_write_seq(dsi, 0x33, 0x5A);
+ mipi_dsi_dcs_write_seq(dsi, 0x34, 0xC0);
+ mipi_dsi_dcs_write_seq(dsi, 0x35, 0x5A);
+ mipi_dsi_dcs_write_seq(dsi, 0x36, 0xC0);
+ mipi_dsi_dcs_write_seq(dsi, 0x38, 0x65);
+ mipi_dsi_dcs_write_seq(dsi, 0x80, 0x3E);
+ mipi_dsi_dcs_write_seq(dsi, 0x81, 0xA0);
+ mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xB1, 0xCC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x12);
+ mipi_dsi_dcs_write_seq(dsi, 0xC2, 0xCC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC3, 0xCC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC4, 0xCC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC5, 0xCC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC6, 0xCC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC7, 0xCC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC8, 0xCC);
+ mipi_dsi_dcs_write_seq(dsi, 0xC9, 0xCC);
+ mipi_dsi_dcs_write_seq(dsi, 0x30, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x00, 0x81);
+ mipi_dsi_dcs_write_seq(dsi, 0x08, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x09, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x07, 0x21);
+ mipi_dsi_dcs_write_seq(dsi, 0x04, 0x10);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x1E);
+ mipi_dsi_dcs_write_seq(dsi, 0x60, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x64, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x6D, 0x00);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0B);
+ mipi_dsi_dcs_write_seq(dsi, 0xA6, 0x44);
+ mipi_dsi_dcs_write_seq(dsi, 0xA7, 0xB6);
+ mipi_dsi_dcs_write_seq(dsi, 0xA8, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0xA9, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0xAA, 0x51);
+ mipi_dsi_dcs_write_seq(dsi, 0xAB, 0x51);
+ mipi_dsi_dcs_write_seq(dsi, 0xAC, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x92);
+ mipi_dsi_dcs_write_seq(dsi, 0xBE, 0xA1);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0x86, 0x87);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x92, 0x22);
+
+ mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x00);
+
+ ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
+ if (ret)
+ return ret;
+ msleep(120);
+ ret = mipi_dsi_dcs_set_display_on(dsi);
+ if (ret)
+ return ret;
+ msleep(20);
+
+ return 0;
+};
+
+static inline struct ili9882t *to_ili9882t(struct drm_panel *panel)
+{
+ return container_of(panel, struct ili9882t, base);
+}
+
+static int ili9882t_enter_sleep_mode(struct ili9882t *ili)
+{
+ struct mipi_dsi_device *dsi = ili->dsi;
+ int ret;
+
+ dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
+
+ ret = mipi_dsi_dcs_set_display_off(dsi);
+ if (ret < 0)
+ return ret;
+
+ ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
+ if (ret < 0)
+ return ret;
+
+ return 0;
+}
+
+static int ili9882t_disable(struct drm_panel *panel)
+{
+ struct ili9882t *ili = to_ili9882t(panel);
+ int ret;
+
+ ret = ili9882t_enter_sleep_mode(ili);
+ if (ret < 0) {
+ dev_err(panel->dev, "failed to set panel off: %d\n", ret);
+ return ret;
+ }
+
+ msleep(150);
+
+ return 0;
+}
+
+static int ili9882t_unprepare(struct drm_panel *panel)
+{
+ struct ili9882t *ili = to_ili9882t(panel);
+
+ if (ili->desc->discharge_on_disable) {
+ regulator_disable(ili->avee);
+ regulator_disable(ili->avdd);
+ usleep_range(5000, 7000);
+ gpiod_set_value(ili->enable_gpio, 0);
+ usleep_range(5000, 7000);
+ regulator_disable(ili->pp1800);
+ regulator_disable(ili->pp3300);
+ } else {
+ gpiod_set_value(ili->enable_gpio, 0);
+ usleep_range(1000, 2000);
+ regulator_disable(ili->avee);
+ regulator_disable(ili->avdd);
+ usleep_range(5000, 7000);
+ regulator_disable(ili->pp1800);
+ regulator_disable(ili->pp3300);
+ }
+
+ return 0;
+}
+
+static int ili9882t_prepare(struct drm_panel *panel)
+{
+ struct ili9882t *ili = to_ili9882t(panel);
+ int ret;
+
+ gpiod_set_value(ili->enable_gpio, 0);
+ usleep_range(1000, 1500);
+
+ ret = regulator_enable(ili->pp3300);
+ if (ret < 0)
+ return ret;
+
+ ret = regulator_enable(ili->pp1800);
+ if (ret < 0)
+ return ret;
+
+ usleep_range(3000, 5000);
+
+ ret = regulator_enable(ili->avdd);
+ if (ret < 0)
+ goto poweroff1v8;
+ ret = regulator_enable(ili->avee);
+ if (ret < 0)
+ goto poweroffavdd;
+
+ usleep_range(10000, 11000);
+
+ if (ili->desc->lp11_before_reset) {
+ mipi_dsi_dcs_nop(ili->dsi);
+ usleep_range(1000, 2000);
+ }
+ gpiod_set_value(ili->enable_gpio, 1);
+ usleep_range(1000, 2000);
+ gpiod_set_value(ili->enable_gpio, 0);
+ usleep_range(1000, 2000);
+ gpiod_set_value(ili->enable_gpio, 1);
+ usleep_range(6000, 10000);
+
+ if (ili->desc->init) {
+ ret = ili->desc->init(ili->dsi);
+ if (ret < 0) {
+ dev_err(panel->dev, "failed to init panel: %d\n", ret);
+ goto poweroff;
+ }
+ }
+
+ return 0;
+
+poweroff:
+ regulator_disable(ili->avee);
+poweroffavdd:
+ regulator_disable(ili->avdd);
+poweroff1v8:
+ usleep_range(5000, 7000);
+ regulator_disable(ili->pp1800);
+ gpiod_set_value(ili->enable_gpio, 0);
+
+ return ret;
+}
+
+static int ili9882t_enable(struct drm_panel *panel)
+{
+ msleep(130);
+ return 0;
+}
+
+static const struct drm_display_mode starry_ili9882t_default_mode = {
+ .clock = 165280,
+ .hdisplay = 1200,
+ .hsync_start = 1200 + 32,
+ .hsync_end = 1200 + 32 + 30,
+ .htotal = 1200 + 32 + 30 + 32,
+ .vdisplay = 1920,
+ .vsync_start = 1920 + 68,
+ .vsync_end = 1920 + 68 + 2,
+ .vtotal = 1920 + 68 + 2 + 10,
+ .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct panel_desc starry_ili9882t_desc = {
+ .modes = &starry_ili9882t_default_mode,
+ .bpc = 8,
+ .size = {
+ .width_mm = 141,
+ .height_mm = 226,
+ },
+ .lanes = 4,
+ .format = MIPI_DSI_FMT_RGB888,
+ .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
+ MIPI_DSI_MODE_LPM,
+ .init = starry_ili9882t_init,
+ .lp11_before_reset = true,
+};
+
+static int ili9882t_get_modes(struct drm_panel *panel,
+ struct drm_connector *connector)
+{
+ struct ili9882t *ili = to_ili9882t(panel);
+ const struct drm_display_mode *m = ili->desc->modes;
+ struct drm_display_mode *mode;
+
+ mode = drm_mode_duplicate(connector->dev, m);
+ if (!mode) {
+ dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
+ m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
+ return -ENOMEM;
+ }
+
+ mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
+ drm_mode_set_name(mode);
+ drm_mode_probed_add(connector, mode);
+
+ connector->display_info.width_mm = ili->desc->size.width_mm;
+ connector->display_info.height_mm = ili->desc->size.height_mm;
+ connector->display_info.bpc = ili->desc->bpc;
+ /*
+ * TODO: Remove once all drm drivers call
+ * drm_connector_set_orientation_from_panel()
+ */
+ drm_connector_set_panel_orientation(connector, ili->orientation);
+
+ return 1;
+}
+
+static enum drm_panel_orientation ili9882t_get_orientation(struct drm_panel *panel)
+{
+ struct ili9882t *ili = to_ili9882t(panel);
+
+ return ili->orientation;
+}
+
+static const struct drm_panel_funcs ili9882t_funcs = {
+ .disable = ili9882t_disable,
+ .unprepare = ili9882t_unprepare,
+ .prepare = ili9882t_prepare,
+ .enable = ili9882t_enable,
+ .get_modes = ili9882t_get_modes,
+ .get_orientation = ili9882t_get_orientation,
+};
+
+static int ili9882t_add(struct ili9882t *ili)
+{
+ struct device *dev = &ili->dsi->dev;
+ int err;
+
+ ili->avdd = devm_regulator_get(dev, "avdd");
+ if (IS_ERR(ili->avdd))
+ return PTR_ERR(ili->avdd);
+
+ ili->avee = devm_regulator_get(dev, "avee");
+ if (IS_ERR(ili->avee))
+ return PTR_ERR(ili->avee);
+
+ ili->pp3300 = devm_regulator_get(dev, "pp3300");
+ if (IS_ERR(ili->pp3300))
+ return PTR_ERR(ili->pp3300);
+
+ ili->pp1800 = devm_regulator_get(dev, "pp1800");
+ if (IS_ERR(ili->pp1800))
+ return PTR_ERR(ili->pp1800);
+
+ ili->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW);
+ if (IS_ERR(ili->enable_gpio)) {
+ dev_err(dev, "cannot get reset-gpios %ld\n",
+ PTR_ERR(ili->enable_gpio));
+ return PTR_ERR(ili->enable_gpio);
+ }
+
+ gpiod_set_value(ili->enable_gpio, 0);
+
+ drm_panel_init(&ili->base, dev, &ili9882t_funcs,
+ DRM_MODE_CONNECTOR_DSI);
+ err = of_drm_get_panel_orientation(dev->of_node, &ili->orientation);
+ if (err < 0) {
+ dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err);
+ return err;
+ }
+
+ err = drm_panel_of_backlight(&ili->base);
+ if (err)
+ return err;
+
+ ili->base.funcs = &ili9882t_funcs;
+ ili->base.dev = &ili->dsi->dev;
+
+ drm_panel_add(&ili->base);
+
+ return 0;
+}
+
+static int ili9882t_probe(struct mipi_dsi_device *dsi)
+{
+ struct ili9882t *ili;
+ int ret;
+ const struct panel_desc *desc;
+
+ ili = devm_kzalloc(&dsi->dev, sizeof(*ili), GFP_KERNEL);
+ if (!ili)
+ return -ENOMEM;
+
+ desc = of_device_get_match_data(&dsi->dev);
+ dsi->lanes = desc->lanes;
+ dsi->format = desc->format;
+ dsi->mode_flags = desc->mode_flags;
+ ili->desc = desc;
+ ili->dsi = dsi;
+ ret = ili9882t_add(ili);
+ if (ret < 0)
+ return ret;
+
+ mipi_dsi_set_drvdata(dsi, ili);
+
+ ret = mipi_dsi_attach(dsi);
+ if (ret)
+ drm_panel_remove(&ili->base);
+
+ return ret;
+}
+
+static void ili9882t_shutdown(struct mipi_dsi_device *dsi)
+{
+ struct ili9882t *ili = mipi_dsi_get_drvdata(dsi);
+
+ drm_panel_disable(&ili->base);
+ drm_panel_unprepare(&ili->base);
+}
+
+static void ili9882t_remove(struct mipi_dsi_device *dsi)
+{
+ struct ili9882t *ili = mipi_dsi_get_drvdata(dsi);
+ int ret;
+
+ ili9882t_shutdown(dsi);
+
+ ret = mipi_dsi_detach(dsi);
+ if (ret < 0)
+ dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret);
+
+ if (ili->base.dev)
+ drm_panel_remove(&ili->base);
+}
+
+static const struct of_device_id ili9882t_of_match[] = {
+ { .compatible = "starry,ili9882t",
+ .data = &starry_ili9882t_desc
+ },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, ili9882t_of_match);
+
+static struct mipi_dsi_driver ili9882t_driver = {
+ .driver = {
+ .name = "panel-ili9882t",
+ .of_match_table = ili9882t_of_match,
+ },
+ .probe = ili9882t_probe,
+ .remove = ili9882t_remove,
+ .shutdown = ili9882t_shutdown,
+};
+module_mipi_dsi_driver(ili9882t_driver);
+
+MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>");
+MODULE_DESCRIPTION("Ilitek ILI9882T-based panels driver");
+MODULE_LICENSE("GPL");
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH v3 4/4] drm/panel: ili9882t: Break out function for switching page
2023-07-03 13:21 [PATCH v3 0/4] Fix up the boe-tv101wum-nl6 panel driver Linus Walleij
` (2 preceding siblings ...)
2023-07-03 13:21 ` [PATCH v3 3/4] drm/panel: ili9882t: Break out as separate driver Linus Walleij
@ 2023-07-03 13:21 ` Linus Walleij
2023-07-06 9:13 ` cong yang
2023-07-06 21:16 ` Doug Anderson
2023-07-04 10:03 ` [PATCH v3 0/4] Fix up the boe-tv101wum-nl6 panel driver cong yang
2023-09-18 16:19 ` Doug Anderson
5 siblings, 2 replies; 19+ messages in thread
From: Linus Walleij @ 2023-07-03 13:21 UTC (permalink / raw)
To: Ruihai Zhou, Stephen Boyd, Douglas Anderson, Cong Yang,
Jitao Shi, Neil Armstrong, Sam Ravnborg, David Airlie,
Daniel Vetter
Cc: linux-kernel, dri-devel
The ILI9882t has similarities with other Ilitek panels, such
as the characteristic internal page switching code that uses
the model number (0x98, 0x82) as parameter.
We can clearly abstract out the page switching sequence from
the initialization code.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 54 ++++++++++++++++++---------
1 file changed, 37 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
index 20f3cc37fa83..c1a0f10fbaf7 100644
--- a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
@@ -55,13 +55,33 @@ struct ili9882t {
struct gpio_desc *enable_gpio;
};
+/* ILI9882-specific commands, add new commands as you decode them */
+#define ILI9882T_DCS_SWITCH_PAGE 0xFF
+
+static int ili9882t_switch_page(struct mipi_dsi_device *dsi, u8 page)
+{
+ u8 switch_cmd[] = {0x98, 0x82, 0x00};
+ int ret;
+
+ switch_cmd[2] = page;
+
+ ret = mipi_dsi_dcs_write(dsi, ILI9882T_DCS_SWITCH_PAGE, switch_cmd, 3);
+ if (ret) {
+ dev_err(&dsi->dev,
+ "error switching panel controller page (%d)\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
{
int ret;
msleep(5);
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x01);
+ ili9882t_switch_page(dsi, 0x01);
mipi_dsi_dcs_write_seq(dsi, 0x00, 0x42);
mipi_dsi_dcs_write_seq(dsi, 0x01, 0x11);
mipi_dsi_dcs_write_seq(dsi, 0x02, 0x00);
@@ -192,7 +212,7 @@ static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
mipi_dsi_dcs_write_seq(dsi, 0x8B, 0x07);
mipi_dsi_dcs_write_seq(dsi, 0x8C, 0x07);
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x02);
+ ili9882t_switch_page(dsi, 0x02);
mipi_dsi_dcs_write_seq(dsi, 0x29, 0x3A);
mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x3B);
@@ -211,12 +231,12 @@ static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
mipi_dsi_dcs_write_seq(dsi, 0x5E, 0x40);
mipi_dsi_dcs_write_seq(dsi, 0x84, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x03);
+ ili9882t_switch_page(dsi, 0x03);
mipi_dsi_dcs_write_seq(dsi, 0x20, 0x01);
mipi_dsi_dcs_write_seq(dsi, 0x21, 0x3C);
mipi_dsi_dcs_write_seq(dsi, 0x22, 0xFA);
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0A);
+ ili9882t_switch_page(dsi, 0x0a);
mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x01);
mipi_dsi_dcs_write_seq(dsi, 0xE2, 0x01);
mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x91);
@@ -224,10 +244,10 @@ static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
mipi_dsi_dcs_write_seq(dsi, 0xE7, 0x00);
mipi_dsi_dcs_write_seq(dsi, 0xE8, 0xFA);
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x12);
+ ili9882t_switch_page(dsi, 0x12);
mipi_dsi_dcs_write_seq(dsi, 0x87, 0x2C);
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x05);
+ ili9882t_switch_page(dsi, 0x05);
mipi_dsi_dcs_write_seq(dsi, 0x73, 0xE5);
mipi_dsi_dcs_write_seq(dsi, 0x7F, 0x6B);
mipi_dsi_dcs_write_seq(dsi, 0x6D, 0xA4);
@@ -242,7 +262,7 @@ static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x90);
mipi_dsi_dcs_write_seq(dsi, 0x86, 0x87);
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x06);
+ ili9882t_switch_page(dsi, 0x06);
mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x80);
mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x07);
mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x58);
@@ -256,7 +276,7 @@ static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x55);
mipi_dsi_dcs_write_seq(dsi, 0xDC, 0x38);
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x08);
+ ili9882t_switch_page(dsi, 0x08);
mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79,
0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD,
0xD5, 0xE2, 0xE8);
@@ -264,10 +284,10 @@ static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD,
0xD5, 0xE2, 0xE8);
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x04);
+ ili9882t_switch_page(dsi, 0x04);
mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x81);
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0C);
+ ili9882t_switch_page(dsi, 0x0c);
mipi_dsi_dcs_write_seq(dsi, 0x00, 0x02);
mipi_dsi_dcs_write_seq(dsi, 0x01, 0x00);
mipi_dsi_dcs_write_seq(dsi, 0x02, 0x03);
@@ -333,10 +353,10 @@ static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
mipi_dsi_dcs_write_seq(dsi, 0x3E, 0x0A);
mipi_dsi_dcs_write_seq(dsi, 0x3F, 0x1F);
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x04);
+ ili9882t_switch_page(dsi, 0x04);
mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x01);
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0E);
+ ili9882t_switch_page(dsi, 0x0e);
mipi_dsi_dcs_write_seq(dsi, 0x02, 0x0C);
mipi_dsi_dcs_write_seq(dsi, 0x20, 0x10);
mipi_dsi_dcs_write_seq(dsi, 0x25, 0x16);
@@ -373,12 +393,12 @@ static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
mipi_dsi_dcs_write_seq(dsi, 0x07, 0x21);
mipi_dsi_dcs_write_seq(dsi, 0x04, 0x10);
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x1E);
+ ili9882t_switch_page(dsi, 0x1e);
mipi_dsi_dcs_write_seq(dsi, 0x60, 0x00);
mipi_dsi_dcs_write_seq(dsi, 0x64, 0x00);
mipi_dsi_dcs_write_seq(dsi, 0x6D, 0x00);
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0B);
+ ili9882t_switch_page(dsi, 0x0b);
mipi_dsi_dcs_write_seq(dsi, 0xA6, 0x44);
mipi_dsi_dcs_write_seq(dsi, 0xA7, 0xB6);
mipi_dsi_dcs_write_seq(dsi, 0xA8, 0x03);
@@ -389,13 +409,13 @@ static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x92);
mipi_dsi_dcs_write_seq(dsi, 0xBE, 0xA1);
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x05);
+ ili9882t_switch_page(dsi, 0x05);
mipi_dsi_dcs_write_seq(dsi, 0x86, 0x87);
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x06);
+ ili9882t_switch_page(dsi, 0x06);
mipi_dsi_dcs_write_seq(dsi, 0x92, 0x22);
- mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x00);
+ ili9882t_switch_page(dsi, 0x00);
ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
if (ret)
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* Re: [PATCH v3 0/4] Fix up the boe-tv101wum-nl6 panel driver
2023-07-03 13:21 [PATCH v3 0/4] Fix up the boe-tv101wum-nl6 panel driver Linus Walleij
` (3 preceding siblings ...)
2023-07-03 13:21 ` [PATCH v3 4/4] drm/panel: ili9882t: Break out function for switching page Linus Walleij
@ 2023-07-04 10:03 ` cong yang
2023-07-04 10:16 ` Linus Walleij
2023-09-18 16:19 ` Doug Anderson
5 siblings, 1 reply; 19+ messages in thread
From: cong yang @ 2023-07-04 10:03 UTC (permalink / raw)
To: Linus Walleij
Cc: Neil Armstrong, Jitao Shi, Douglas Anderson, dri-devel,
Stephen Boyd, Ruihai Zhou, Sam Ravnborg, linux-kernel
Hi,Linus Walleij
On Mon, Jul 3, 2023 at 9:21 PM Linus Walleij <linus.walleij@linaro.org> wrote:
>
> This is two patches fixing things I would normally complain about
> in reviews, but alas I missed this one, so I go in and fix it up
> myself.
>
> Discovering that a completely unrelated driver has been merged
> into this panel driver I had to bite the bullet and break it out.
> I am pretty suspicious of the other recently added panel as well.
Do you think the starry,himax83102-j02 panel needs to break it out? Thanks.
>
> I am surprised that contributors from manufacturers do not seem
> to have datasheets for the display controllers embedded in the
> panels of their products. Can you take a second look?
Sorry, this panel datasheet is not open source, I can't share this datasheet.
>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> Changes in v3:
> - Rebase on drm-misc-next
> - Convert the two newly added Starry panels as well.
> - Break out the obvious ILI9882t-based panel into its own driver.
> - Link to v2: https://lore.kernel.org/r/20230615-fix-boe-tv101wum-nl6-v2-0-457d7ece4590@linaro.org
>
> Changes in v2:
> - Fix a missed static keyword
> - Link to v1: https://lore.kernel.org/r/20230615-fix-boe-tv101wum-nl6-v1-0-8ac378405fb7@linaro.org
>
> ---
> Linus Walleij (4):
> drm/panel: boe-tv101wum-nl6: Drop macros and open code sequences
> drm/panel: boe-tv101wum-nl6: Drop surplus prepare tracking
> drm/panel: ili9882t: Break out as separate driver
> drm/panel: ili9882t: Break out function for switching page
>
> drivers/gpu/drm/panel/Kconfig | 9 +
> drivers/gpu/drm/panel/Makefile | 1 +
> drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 3037 ++++++++++--------------
> drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 759 ++++++
> 4 files changed, 2067 insertions(+), 1739 deletions(-)
> ---
> base-commit: 14806c6415820b1c4bc317655c40784d050a2edb
> change-id: 20230615-fix-boe-tv101wum-nl6-6aa3fab22b44
>
> Best regards,
> --
> Linus Walleij <linus.walleij@linaro.org>
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v3 0/4] Fix up the boe-tv101wum-nl6 panel driver
2023-07-04 10:03 ` [PATCH v3 0/4] Fix up the boe-tv101wum-nl6 panel driver cong yang
@ 2023-07-04 10:16 ` Linus Walleij
2023-07-04 11:14 ` cong yang
0 siblings, 1 reply; 19+ messages in thread
From: Linus Walleij @ 2023-07-04 10:16 UTC (permalink / raw)
To: cong yang
Cc: Neil Armstrong, Jitao Shi, Douglas Anderson, dri-devel,
Stephen Boyd, Ruihai Zhou, Sam Ravnborg, linux-kernel
On Tue, Jul 4, 2023 at 12:04 PM cong yang
<yangcong5@huaqin.corp-partner.google.com> wrote:
> On Mon, Jul 3, 2023 at 9:21 PM Linus Walleij <linus.walleij@linaro.org> wrote:
> > I am surprised that contributors from manufacturers do not seem
> > to have datasheets for the display controllers embedded in the
> > panels of their products. Can you take a second look?
>
> Sorry, this panel datasheet is not open source, I can't share this datasheet.
Perhaps not, but you can use the knowledge in the datasheet to
name the commands and give better structure to the members of
the driver, if you know what commands mean then provide
#define statements to them so sequences become understandable.
See for example patch 4/4.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v3 0/4] Fix up the boe-tv101wum-nl6 panel driver
2023-07-04 10:16 ` Linus Walleij
@ 2023-07-04 11:14 ` cong yang
0 siblings, 0 replies; 19+ messages in thread
From: cong yang @ 2023-07-04 11:14 UTC (permalink / raw)
To: Linus Walleij
Cc: Neil Armstrong, Jitao Shi, Douglas Anderson, dri-devel,
Stephen Boyd, Ruihai Zhou, Sam Ravnborg, linux-kernel
Hi,
On Tue, Jul 4, 2023 at 6:16 PM Linus Walleij <linus.walleij@linaro.org> wrote:
>
> On Tue, Jul 4, 2023 at 12:04 PM cong yang
> <yangcong5@huaqin.corp-partner.google.com> wrote:
> > On Mon, Jul 3, 2023 at 9:21 PM Linus Walleij <linus.walleij@linaro.org> wrote:
>
> > > I am surprised that contributors from manufacturers do not seem
> > > to have datasheets for the display controllers embedded in the
> > > panels of their products. Can you take a second look?
> >
> > Sorry, this panel datasheet is not open source, I can't share this datasheet.
>
> Perhaps not, but you can use the knowledge in the datasheet to
> name the commands and give better structure to the members of
> the driver, if you know what commands mean then provide
> #define statements to them so sequences become understandable.
> See for example patch 4/4.
Patch 4/4 LGTM, from the datasheet 0XFF is EXTC Command Set Enable .
Description: Set the register, 1 Parameter = 98h, 2 Parameter = 82h, 3
Parameter = Page value to enable “page command set” available.
00h = Page 0 ,01h = Page 1... 0Eh = Page 14.
Thank you for you patch.
>
> Yours,
> Linus Walleij
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v3 4/4] drm/panel: ili9882t: Break out function for switching page
2023-07-03 13:21 ` [PATCH v3 4/4] drm/panel: ili9882t: Break out function for switching page Linus Walleij
@ 2023-07-06 9:13 ` cong yang
2023-07-06 21:16 ` Doug Anderson
1 sibling, 0 replies; 19+ messages in thread
From: cong yang @ 2023-07-06 9:13 UTC (permalink / raw)
To: Linus Walleij
Cc: Neil Armstrong, Jitao Shi, Douglas Anderson, dri-devel,
Stephen Boyd, Ruihai Zhou, Hsin-Yi Wang, Sam Ravnborg,
linux-kernel
Hi,
On Mon, Jul 3, 2023 at 9:22 PM Linus Walleij <linus.walleij@linaro.org> wrote:
>
> The ILI9882t has similarities with other Ilitek panels, such
> as the characteristic internal page switching code that uses
> the model number (0x98, 0x82) as parameter.
>
> We can clearly abstract out the page switching sequence from
> the initialization code.
>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 54 ++++++++++++++++++---------
> 1 file changed, 37 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
> index 20f3cc37fa83..c1a0f10fbaf7 100644
> --- a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
> +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
> @@ -55,13 +55,33 @@ struct ili9882t {
> struct gpio_desc *enable_gpio;
> };
>
> +/* ILI9882-specific commands, add new commands as you decode them */
> +#define ILI9882T_DCS_SWITCH_PAGE 0xFF
> +
> +static int ili9882t_switch_page(struct mipi_dsi_device *dsi, u8 page)
> +{
> + u8 switch_cmd[] = {0x98, 0x82, 0x00};
> + int ret;
> +
> + switch_cmd[2] = page;
> +
> + ret = mipi_dsi_dcs_write(dsi, ILI9882T_DCS_SWITCH_PAGE, switch_cmd, 3);
> + if (ret) {
> + dev_err(&dsi->dev,
> + "error switching panel controller page (%d)\n", ret);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
> {
> int ret;
>
> msleep(5);
>
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x01);
> + ili9882t_switch_page(dsi, 0x01);
> mipi_dsi_dcs_write_seq(dsi, 0x00, 0x42);
> mipi_dsi_dcs_write_seq(dsi, 0x01, 0x11);
> mipi_dsi_dcs_write_seq(dsi, 0x02, 0x00);
> @@ -192,7 +212,7 @@ static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
> mipi_dsi_dcs_write_seq(dsi, 0x8B, 0x07);
> mipi_dsi_dcs_write_seq(dsi, 0x8C, 0x07);
>
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x02);
> + ili9882t_switch_page(dsi, 0x02);
> mipi_dsi_dcs_write_seq(dsi, 0x29, 0x3A);
> mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x3B);
>
> @@ -211,12 +231,12 @@ static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
> mipi_dsi_dcs_write_seq(dsi, 0x5E, 0x40);
> mipi_dsi_dcs_write_seq(dsi, 0x84, 0x00);
>
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x03);
> + ili9882t_switch_page(dsi, 0x03);
> mipi_dsi_dcs_write_seq(dsi, 0x20, 0x01);
> mipi_dsi_dcs_write_seq(dsi, 0x21, 0x3C);
> mipi_dsi_dcs_write_seq(dsi, 0x22, 0xFA);
>
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0A);
> + ili9882t_switch_page(dsi, 0x0a);
> mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x01);
> mipi_dsi_dcs_write_seq(dsi, 0xE2, 0x01);
> mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x91);
> @@ -224,10 +244,10 @@ static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
> mipi_dsi_dcs_write_seq(dsi, 0xE7, 0x00);
> mipi_dsi_dcs_write_seq(dsi, 0xE8, 0xFA);
>
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x12);
> + ili9882t_switch_page(dsi, 0x12);
> mipi_dsi_dcs_write_seq(dsi, 0x87, 0x2C);
>
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x05);
> + ili9882t_switch_page(dsi, 0x05);
> mipi_dsi_dcs_write_seq(dsi, 0x73, 0xE5);
> mipi_dsi_dcs_write_seq(dsi, 0x7F, 0x6B);
> mipi_dsi_dcs_write_seq(dsi, 0x6D, 0xA4);
> @@ -242,7 +262,7 @@ static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
> mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x90);
> mipi_dsi_dcs_write_seq(dsi, 0x86, 0x87);
>
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x06);
> + ili9882t_switch_page(dsi, 0x06);
> mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x80);
> mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x07);
> mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x58);
> @@ -256,7 +276,7 @@ static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
> mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x55);
> mipi_dsi_dcs_write_seq(dsi, 0xDC, 0x38);
>
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x08);
> + ili9882t_switch_page(dsi, 0x08);
> mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79,
> 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD,
> 0xD5, 0xE2, 0xE8);
> @@ -264,10 +284,10 @@ static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
> 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD,
> 0xD5, 0xE2, 0xE8);
>
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x04);
> + ili9882t_switch_page(dsi, 0x04);
> mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x81);
>
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0C);
> + ili9882t_switch_page(dsi, 0x0c);
> mipi_dsi_dcs_write_seq(dsi, 0x00, 0x02);
> mipi_dsi_dcs_write_seq(dsi, 0x01, 0x00);
> mipi_dsi_dcs_write_seq(dsi, 0x02, 0x03);
> @@ -333,10 +353,10 @@ static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
> mipi_dsi_dcs_write_seq(dsi, 0x3E, 0x0A);
> mipi_dsi_dcs_write_seq(dsi, 0x3F, 0x1F);
>
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x04);
> + ili9882t_switch_page(dsi, 0x04);
> mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x01);
>
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0E);
> + ili9882t_switch_page(dsi, 0x0e);
> mipi_dsi_dcs_write_seq(dsi, 0x02, 0x0C);
> mipi_dsi_dcs_write_seq(dsi, 0x20, 0x10);
> mipi_dsi_dcs_write_seq(dsi, 0x25, 0x16);
> @@ -373,12 +393,12 @@ static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
> mipi_dsi_dcs_write_seq(dsi, 0x07, 0x21);
> mipi_dsi_dcs_write_seq(dsi, 0x04, 0x10);
>
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x1E);
> + ili9882t_switch_page(dsi, 0x1e);
> mipi_dsi_dcs_write_seq(dsi, 0x60, 0x00);
> mipi_dsi_dcs_write_seq(dsi, 0x64, 0x00);
> mipi_dsi_dcs_write_seq(dsi, 0x6D, 0x00);
>
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0B);
> + ili9882t_switch_page(dsi, 0x0b);
> mipi_dsi_dcs_write_seq(dsi, 0xA6, 0x44);
> mipi_dsi_dcs_write_seq(dsi, 0xA7, 0xB6);
> mipi_dsi_dcs_write_seq(dsi, 0xA8, 0x03);
> @@ -389,13 +409,13 @@ static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
> mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x92);
> mipi_dsi_dcs_write_seq(dsi, 0xBE, 0xA1);
>
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x05);
> + ili9882t_switch_page(dsi, 0x05);
> mipi_dsi_dcs_write_seq(dsi, 0x86, 0x87);
>
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x06);
> + ili9882t_switch_page(dsi, 0x06);
> mipi_dsi_dcs_write_seq(dsi, 0x92, 0x22);
>
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x00);
> + ili9882t_switch_page(dsi, 0x00);
>
> ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
> if (ret)
>
> --
> 2.34.1
>
Tested-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v3 1/4] drm/panel: boe-tv101wum-nl6: Drop macros and open code sequences
2023-07-03 13:21 ` [PATCH v3 1/4] drm/panel: boe-tv101wum-nl6: Drop macros and open code sequences Linus Walleij
@ 2023-07-06 21:11 ` Doug Anderson
0 siblings, 0 replies; 19+ messages in thread
From: Doug Anderson @ 2023-07-06 21:11 UTC (permalink / raw)
To: Linus Walleij
Cc: Neil Armstrong, Jitao Shi, Cong Yang, linux-kernel, dri-devel,
Stephen Boyd, Ruihai Zhou, Sam Ravnborg
Hi,
On Mon, Jul 3, 2023 at 6:22 AM Linus Walleij <linus.walleij@linaro.org> wrote:
>
> The boe-tv101wum-nl6 is reinventing the mechanism to send command
> sequences that we usually nix during review, but I missed this one
> so fixing it up myself.
Sorry for this. :( I know I've reviewed/applied several of the patches
that made this worse, but I believe that the whole array/sequence
scheme predated my involvement in the driver. I've never been a huge
fan of these black box sequences and try to make it a point to grumble
about them each time through the review, though again their use
predated my involvement...
> Also use the explicit function calls to mipi_dsi_dcs_exit_sleep_mode()
> and mipi_dsi_dcs_set_display_on() instead of reimplementing them
> with homegrown sequences.
Yeah, this is nice, thanks!
> Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> ChangeLog v2->v3:
> - Convert the two newly added Starry displays as well.
> ---
> drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 3351 ++++++++++++------------
> 1 file changed, 1654 insertions(+), 1697 deletions(-)
I'm at least moderately curious if you did size comparisons in the
resulting binary before and after. Given that mipi_dsi_dcs_write_seq()
is currently implemented as a macro this seems like it has the
potential of massively exploding the size of the compiled object size.
Even if it wasn't a macro, I'd wonder if the compiler is really smart
enough to generate code that's as good for these long sequences. The
call sequences for several hundred function calls could be enough
overhead to justify adding a function to the core that handles an
array of sequences. Would that be a good compromise? Add to the core
handling of a sequence of sequences but don't add the extra special
case for delays (each time you need a delay you need to start a new
sequence of sequences).
Aside from the potential binary size bloat, I guess this also has the
downside of not considering it a true error if one of these init steps
fails for some reason. The new code will just spit out a ratelimited
error and continue trying to init whereas the old code would have
stopped immediately. The new way is probably OK, but the difference in
behavior should be noted in the commit message in case this is causing
problems for anyone.
> +static int inx_hj110iz_init(struct mipi_dsi_device *dsi)
> +{
> + int ret;
>
> -static const struct panel_init_cmd auo_kd101n80_45na_init_cmd[] = {
> - _INIT_DELAY_CMD(24),
> - _INIT_DCS_CMD(0x11),
> - _INIT_DELAY_CMD(120),
> - _INIT_DCS_CMD(0x29),
> - _INIT_DELAY_CMD(120),
> - {},
> -};
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x20);
> + mipi_dsi_dcs_write_seq(dsi, 0xFB, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x05, 0xD1);
The sequence of init commands for inx_hj110iz_init() is quite
different before and after your patch. The first such difference is
right here. The old code used to have "0x06, 0xC0" right after the
"0x05, 0xD1"
Is this on purpose? If so, can you please move that change to a
separate patch and have this patch be _just_ a no-op.
> +static int boe_init(struct mipi_dsi_device *dsi)
> +{
> + msleep(24);
Where did the msleep(24) come from? It wasn't there before your patch,
right? Please make this patch a no-op and add the 24ms sleep in a
separate patch if it's needed.
> +static int starry_qfh032011_53g_init(struct mipi_dsi_device *dsi)
> {
> - struct mipi_dsi_device *dsi = boe->dsi;
> - struct drm_panel *panel = &boe->base;
> - int i, err = 0;
> -
> - if (boe->desc->init_cmds) {
> - const struct panel_init_cmd *init_cmds = boe->desc->init_cmds;
> -
> - for (i = 0; init_cmds[i].len != 0; i++) {
> - const struct panel_init_cmd *cmd = &init_cmds[i];
> -
> - switch (cmd->type) {
> - case DELAY_CMD:
> - msleep(cmd->data[0]);
> - err = 0;
> - break;
> -
> - case INIT_DCS_CMD:
> - err = mipi_dsi_dcs_write(dsi, cmd->data[0],
> - cmd->len <= 1 ? NULL :
> - &cmd->data[1],
> - cmd->len - 1);
> - break;
> -
> - default:
> - err = -EINVAL;
> - }
> -
> - if (err < 0) {
> - dev_err(panel->dev,
> - "failed to write command %u\n", i);
> - return err;
> - }
> - }
> - }
> + int ret;
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0xC3, 0x4F);
> + mipi_dsi_dcs_write_seq(dsi, 0xC4, 0x40);
> + mipi_dsi_dcs_write_seq(dsi, 0xC5, 0x40);
> + mipi_dsi_dcs_write_seq(dsi, 0xC6, 0x40);
> + mipi_dsi_dcs_write_seq(dsi, 0xC7, 0x40);
> + mipi_dsi_dcs_write_seq(dsi, 0xC8, 0x4D);
> + mipi_dsi_dcs_write_seq(dsi, 0xC9, 0x52);
> + mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x51);
> + mipi_dsi_dcs_write_seq(dsi, 0xCD, 0x5D);
> + mipi_dsi_dcs_write_seq(dsi, 0xCE, 0x5B);
> + mipi_dsi_dcs_write_seq(dsi, 0xCF, 0x4B);
> + mipi_dsi_dcs_write_seq(dsi, 0xD0, 0x49);
> + mipi_dsi_dcs_write_seq(dsi, 0xD1, 0x47);
> + mipi_dsi_dcs_write_seq(dsi, 0xD2, 0x45);
> + mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x41);
> + mipi_dsi_dcs_write_seq(dsi, 0xD7, 0x50);
> + mipi_dsi_dcs_write_seq(dsi, 0xD8, 0x40);
> + mipi_dsi_dcs_write_seq(dsi, 0xD9, 0x40);
> + mipi_dsi_dcs_write_seq(dsi, 0xDA, 0x40);
> + mipi_dsi_dcs_write_seq(dsi, 0xDB, 0x40);
> + mipi_dsi_dcs_write_seq(dsi, 0xDC, 0x4E);
> + mipi_dsi_dcs_write_seq(dsi, 0xDD, 0x52);
> + mipi_dsi_dcs_write_seq(dsi, 0xDE, 0x51);
> + mipi_dsi_dcs_write_seq(dsi, 0xE1, 0x5E);
> + mipi_dsi_dcs_write_seq(dsi, 0xE2, 0x5C);
> + mipi_dsi_dcs_write_seq(dsi, 0xE3, 0x4C);
> + mipi_dsi_dcs_write_seq(dsi, 0xE4, 0x4A);
> + mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x48);
> + mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x46);
> + mipi_dsi_dcs_write_seq(dsi, 0xE7, 0x42);
> + mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x03);
> + mipi_dsi_dcs_write_seq(dsi, 0xBE, 0x03);
> + mipi_dsi_dcs_write_seq(dsi, 0xCC, 0x44);
> + mipi_dsi_dcs_write_seq(dsi, 0xC8, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0xC9, 0x05);
> + mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x42);
> + mipi_dsi_dcs_write_seq(dsi, 0xCD, 0x3E);
> + mipi_dsi_dcs_write_seq(dsi, 0xCF, 0x60);
> + mipi_dsi_dcs_write_seq(dsi, 0xD2, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0xD4, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0xD5, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x03);
> + mipi_dsi_dcs_write_seq(dsi, 0xD7, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0xD9, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0xDB, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0xE4, 0xF0);
> + mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x0A);
> + mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0xCC, 0x08);
> + mipi_dsi_dcs_write_seq(dsi, 0xC2, 0x08);
> + mipi_dsi_dcs_write_seq(dsi, 0xC4, 0x10);
> + mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x0A);
> + mipi_dsi_dcs_write_seq(dsi, 0xC2, 0x20);
> + mipi_dsi_dcs_write_seq(dsi, 0xC3, 0x24);
> + mipi_dsi_dcs_write_seq(dsi, 0xC4, 0x23);
> + mipi_dsi_dcs_write_seq(dsi, 0xC5, 0x29);
> + mipi_dsi_dcs_write_seq(dsi, 0xC6, 0x23);
> + mipi_dsi_dcs_write_seq(dsi, 0xC7, 0x1C);
> + mipi_dsi_dcs_write_seq(dsi, 0xC8, 0x19);
> + mipi_dsi_dcs_write_seq(dsi, 0xC9, 0x17);
> + mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x17);
> + mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x18);
> + mipi_dsi_dcs_write_seq(dsi, 0xCC, 0x1A);
> + mipi_dsi_dcs_write_seq(dsi, 0xCD, 0x1E);
> + mipi_dsi_dcs_write_seq(dsi, 0xCE, 0x20);
> + mipi_dsi_dcs_write_seq(dsi, 0xCF, 0x23);
> + mipi_dsi_dcs_write_seq(dsi, 0xD0, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0xD1, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0xD2, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x0A);
> + mipi_dsi_dcs_write_seq(dsi, 0xD4, 0x13);
> + mipi_dsi_dcs_write_seq(dsi, 0xD5, 0x1C);
> + mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x1A);
> + mipi_dsi_dcs_write_seq(dsi, 0xD7, 0x13);
> + mipi_dsi_dcs_write_seq(dsi, 0xD8, 0x17);
> + mipi_dsi_dcs_write_seq(dsi, 0xD9, 0x1C);
> + mipi_dsi_dcs_write_seq(dsi, 0xDA, 0x19);
> + mipi_dsi_dcs_write_seq(dsi, 0xDB, 0x17);
> + mipi_dsi_dcs_write_seq(dsi, 0xDC, 0x17);
> + mipi_dsi_dcs_write_seq(dsi, 0xDD, 0x18);
> + mipi_dsi_dcs_write_seq(dsi, 0xDE, 0x1A);
> + mipi_dsi_dcs_write_seq(dsi, 0xDF, 0x1E);
> + mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x20);
> + mipi_dsi_dcs_write_seq(dsi, 0xE1, 0x23);
> + mipi_dsi_dcs_write_seq(dsi, 0xE2, 0x07);
> +
> + ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
> + if (ret)
> + return ret;
> + msleep(120);
> + ret = mipi_dsi_dcs_set_display_on(dsi);
> + if (ret)
> + return ret;
> + msleep(80);
> +
> return 0;
> }
>
> +
> +static int starry_himax83102_j02_init(struct mipi_dsi_device *dsi)
nit: don't need two blank lines between functions. ...and if you do,
for some reason, you should be consistent and have two blank lines
between _all_ of them, not just some.
> +{
> + int ret;
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x83, 0x10, 0x21, 0x55, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x2C, 0xB5, 0xB5, 0x31, 0xF1, 0x31, 0xD7, 0x2F, 0x36, 0x36,
> + 0x36, 0x36, 0x1A, 0x8B, 0x11, 0x65, 0x00, 0x88, 0xFA, 0xFF, 0xFF, 0x8F,
> + 0xFF, 0x08, 0x74, 0x33);
> + mipi_dsi_dcs_write_seq(dsi, 0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x12, 0x72, 0x3C, 0xA3, 0x03,
> + 0x03, 0x00, 0x00, 0x88, 0xF5);
> + mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x63, 0x5C, 0x63, 0x5C,
> + 0x01, 0x9E);
> + mipi_dsi_dcs_write_seq(dsi, 0xE9, 0xCD);
> + mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x84);
> + mipi_dsi_dcs_write_seq(dsi, 0xE9, 0x3F);
> + mipi_dsi_dcs_write_seq(dsi, 0xBC, 0x1B, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0xBE, 0x20);
> + mipi_dsi_dcs_write_seq(dsi, 0xBF, 0xFC, 0xC4);
> + mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x36, 0x36, 0x22, 0x11, 0x22, 0xA0, 0x61, 0x08, 0xF5, 0x03);
> + mipi_dsi_dcs_write_seq(dsi, 0xE9, 0xCC);
> + mipi_dsi_dcs_write_seq(dsi, 0xC7, 0x80);
> + mipi_dsi_dcs_write_seq(dsi, 0xE9, 0x3F);
> + mipi_dsi_dcs_write_seq(dsi, 0xE9, 0xC6);
> + mipi_dsi_dcs_write_seq(dsi, 0xC8, 0x97);
> + mipi_dsi_dcs_write_seq(dsi, 0xE9, 0x3F);
> + mipi_dsi_dcs_write_seq(dsi, 0xC9, 0x00, 0x1E, 0x13, 0x88, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x08, 0x13, 0x07, 0x00, 0x0F, 0x33);
> + mipi_dsi_dcs_write_seq(dsi, 0xCC, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0xE9, 0xC4);
> + mipi_dsi_dcs_write_seq(dsi, 0xD0, 0x03);
> + mipi_dsi_dcs_write_seq(dsi, 0xE9, 0x3F);
> + mipi_dsi_dcs_write_seq(dsi, 0xD1, 0x37, 0x06, 0x00, 0x02, 0x04, 0x0C, 0xFF);
> + mipi_dsi_dcs_write_seq(dsi, 0xD2, 0x1F, 0x11, 0x1F);
> + mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x08,
> + 0x37, 0x47, 0x34, 0x3B, 0x12, 0x12, 0x03, 0x03, 0x32, 0x10, 0x10,
> + 0x00, 0x10, 0x32, 0x10, 0x08, 0x00, 0x08, 0x32, 0x17, 0x94, 0x07,
> + 0x94, 0x00, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0xD5, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
> + 0x18, 0x19, 0x19, 0x40, 0x40, 0x1A, 0x1A, 0x1B, 0x1B, 0x00, 0x01,
> + 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x20, 0x21, 0x28, 0x29, 0x18,
> + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
> + 0x18, 0x18);
> + mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
> + 0x18, 0x40, 0x40, 0x19, 0x19, 0x1A, 0x1A, 0x1B, 0x1B, 0x07, 0x06,
> + 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 0x29, 0x28, 0x21, 0x20, 0x18,
> + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
> + 0x18, 0x18);
> + mipi_dsi_dcs_write_seq(dsi, 0xD8, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA,
> + 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA,
> + 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA,
> + 0xBA, 0xEA, 0xAA, 0xAA, 0xA0);
> + mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x00, 0x09, 0x14, 0x1E, 0x26, 0x48, 0x61, 0x67, 0x6C,
> + 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB, 0xAB, 0x55,
> + 0x5C, 0x68, 0x73, 0x00, 0x09, 0x14, 0x1E, 0x26, 0x48, 0x61, 0x67,
> + 0x6C, 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB, 0xAB,
> + 0x55, 0x5C, 0x68, 0x73);
> + mipi_dsi_dcs_write_seq(dsi, 0xE7, 0x0E, 0x10, 0x10, 0x21, 0x2B, 0x9A, 0x02, 0x54, 0x9A,
> + 0x14, 0x14, 0x00, 0x00, 0x00, 0x00, 0x12, 0x05, 0x02, 0x02, 0x10);
> + mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x01, 0xBF, 0x11);
> + mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x86);
> + mipi_dsi_dcs_write_seq(dsi, 0xD2, 0x3C, 0xFA);
> + mipi_dsi_dcs_write_seq(dsi, 0xE9, 0xC5);
> + mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0C, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0xE9, 0x3F);
> + mipi_dsi_dcs_write_seq(dsi, 0xE7, 0x02, 0x00, 0x28, 0x01, 0x7E, 0x0F, 0x7E, 0x10, 0xA0,
> + 0x00, 0x00, 0x20, 0x40, 0x50, 0x40);
> + mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0xD8, 0xFF, 0xFF, 0xBF, 0xFE, 0xAA, 0xA0, 0xFF, 0xFF, 0xBF,
> + 0xFE, 0xAA, 0xA0);
> + mipi_dsi_dcs_write_seq(dsi, 0xE7, 0xFE, 0x04, 0xFE, 0x04, 0xFE, 0x04, 0x03, 0x03, 0x03,
> + 0x26, 0x00, 0x26, 0x81, 0x02, 0x40, 0x00, 0x20, 0x9E, 0x04, 0x03,
> + 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x03);
> + mipi_dsi_dcs_write_seq(dsi, 0xE9, 0xC6);
> + mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x03, 0xFF, 0xF8);
> + mipi_dsi_dcs_write_seq(dsi, 0xE9, 0x3F);
> + mipi_dsi_dcs_write_seq(dsi, 0xD8, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x2A, 0xAA,
> + 0xA8, 0x00, 0x00, 0x00, 0x3F, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x3F,
> + 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00,
> + 0x2A, 0xAA, 0xA8, 0x00, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0xE9, 0xC4);
> + mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x96);
> + mipi_dsi_dcs_write_seq(dsi, 0xE9, 0x3F);
> + mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0xE9, 0xC5);
> + mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x4F);
> + mipi_dsi_dcs_write_seq(dsi, 0xE9, 0x3F);
> + mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x00);
> +
> +
> + ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
nit: why two blank lines above?
> + if (ret)
> + return ret;
> + msleep(120);
> + ret = mipi_dsi_dcs_set_display_on(dsi);
> + if (ret)
> + return ret;
> + msleep(80);
Where did the "msleep(80)" come from? I don't see this in the code
you're replacing. If the "msleep(80)" is needed, please introduce it
in a separate patch.
> +
> + return 0;
> +};
> +
> +
> +static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
nit: don't need two blank lines between functions
> +{
> + int ret;
> +
> + msleep(5);
I know it was doing a msleep(5) before, but I guess it's now more
obvious that (according to the docs) this should be a usleep_range()
or a delay, since delays < 20 ms are documented as not being super
appropriate for msleep(). I guess it doesn't _really_ matter,
though...
-Doug
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v3 2/4] drm/panel: boe-tv101wum-nl6: Drop surplus prepare tracking
2023-07-03 13:21 ` [PATCH v3 2/4] drm/panel: boe-tv101wum-nl6: Drop surplus prepare tracking Linus Walleij
@ 2023-07-06 21:11 ` Doug Anderson
0 siblings, 0 replies; 19+ messages in thread
From: Doug Anderson @ 2023-07-06 21:11 UTC (permalink / raw)
To: Linus Walleij
Cc: Neil Armstrong, Jitao Shi, Cong Yang, linux-kernel, dri-devel,
Stephen Boyd, Ruihai Zhou, Sam Ravnborg
Hi,
On Mon, Jul 3, 2023 at 6:22 AM Linus Walleij <linus.walleij@linaro.org> wrote:
>
> The DRM panel core already keeps track of if the panel is already
> prepared so do not reimplement this.
>
> Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 12 ------------
> 1 file changed, 12 deletions(-)
It does? Can you please point to where/when the DRM panel core keeps
track of this? I know I've posted a patch for this at:
https://lore.kernel.org/r/20230607144931.v2.2.I59b417d4c29151cc2eff053369ec4822b606f375@changeid
...but I haven't landed it because I'm still trying to get consensus
on the rest of the series and a later patch in the series depends on
it.
If you have some evidence that my patch isn't needed, can you please
point at it in the commit message? I would say at least that someone
else seemed to agree that the core wasn't checking this [1], though I
guess it's possible that person was running old code or was just as
confused as I was.
[1] https://lore.kernel.org/r/646e391f.810a0220.214ce.d680@mx.google.com
-Doug
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v3 3/4] drm/panel: ili9882t: Break out as separate driver
2023-07-03 13:21 ` [PATCH v3 3/4] drm/panel: ili9882t: Break out as separate driver Linus Walleij
@ 2023-07-06 21:14 ` Doug Anderson
2023-08-01 6:44 ` cong yang
2023-08-14 2:04 ` cong yang
2 siblings, 0 replies; 19+ messages in thread
From: Doug Anderson @ 2023-07-06 21:14 UTC (permalink / raw)
To: Linus Walleij
Cc: Neil Armstrong, Jitao Shi, Cong Yang, linux-kernel, dri-devel,
Stephen Boyd, Ruihai Zhou, Sam Ravnborg
Hi,
On Mon, Jul 3, 2023 at 6:22 AM Linus Walleij <linus.walleij@linaro.org> wrote:
>
> The Starry ILI9882t-based panel should never have been part of the boe
> tv101wum driver, it is clearly based on the Ilitek ILI9882t display
> controller and if you look at the custom command sequences for the
> panel these clearly contain the signature Ilitek page switch (0xff)
> commands. The hardware has nothing in common with the other panels
> supported by this driver.
>
> Break this out into a separate driver and config symbol instead.
>
> If the placement here is out of convenience for using similar code,
> we should consider creating a helper library instead.
>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> drivers/gpu/drm/panel/Kconfig | 9 +
> drivers/gpu/drm/panel/Makefile | 1 +
> drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 386 -------------
> drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 739 +++++++++++++++++++++++++
> 4 files changed, 749 insertions(+), 386 deletions(-)
I have no real objection here and am happy to let others argue about
bikeshed color. I think the "panel-boe-tv101wum-nl6.c" driver ended up
becoming a dumping ground for a bunch of panels in response to Sam's
feedback originally [1].
[1] https://lore.kernel.org/all/YSPAseE6WD8dDRuz@ravnborg.org/
...so it would be good to get Sam's feedback here.
> +/*
> + * Use this descriptor struct to describe different panels using the
> + * Ilitek ILI9882T display controller.
> + */
> +struct panel_desc {
> + const struct drm_display_mode *modes;
> + unsigned int bpc;
> +
> + /**
> + * @width_mm: width of the panel's active display area
> + * @height_mm: height of the panel's active display area
> + */
> + struct {
> + unsigned int width_mm;
> + unsigned int height_mm;
> + } size;
> +
> + unsigned long mode_flags;
> + enum mipi_dsi_pixel_format format;
> + int (*init)(struct mipi_dsi_device *dsi);
> + unsigned int lanes;
> + bool discharge_on_disable;
IMO "discharge_on_disable" should be removed since the one panel
supported by this driver doesn't use it. If later we find that some
ili9882t panels need this logic then we can add it back in, but it
seems hard to believe it would use the same code.
> + bool lp11_before_reset;
IMO "lp11_before_reset" should be removed. The one panel supported by
this driver _always_ needs lp11_before_reset. If we later find that
some ili9882t panels want different behavior then we can add it back
in. It doesn't feel like the kind of thing that would be different on
different drivers using the same chip.
> +static int ili9882t_get_modes(struct drm_panel *panel,
> + struct drm_connector *connector)
> +{
> + struct ili9882t *ili = to_ili9882t(panel);
> + const struct drm_display_mode *m = ili->desc->modes;
> + struct drm_display_mode *mode;
> +
> + mode = drm_mode_duplicate(connector->dev, m);
> + if (!mode) {
> + dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
> + m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
> + return -ENOMEM;
> + }
> +
> + mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
> + drm_mode_set_name(mode);
> + drm_mode_probed_add(connector, mode);
> +
> + connector->display_info.width_mm = ili->desc->size.width_mm;
> + connector->display_info.height_mm = ili->desc->size.height_mm;
> + connector->display_info.bpc = ili->desc->bpc;
> + /*
> + * TODO: Remove once all drm drivers call
> + * drm_connector_set_orientation_from_panel()
> + */
> + drm_connector_set_panel_orientation(connector, ili->orientation);
I'd be inclined to take the above call out and assume anyone using
this new panel has a DRM driver that's working properly...
-Doug
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v3 4/4] drm/panel: ili9882t: Break out function for switching page
2023-07-03 13:21 ` [PATCH v3 4/4] drm/panel: ili9882t: Break out function for switching page Linus Walleij
2023-07-06 9:13 ` cong yang
@ 2023-07-06 21:16 ` Doug Anderson
1 sibling, 0 replies; 19+ messages in thread
From: Doug Anderson @ 2023-07-06 21:16 UTC (permalink / raw)
To: Linus Walleij
Cc: Neil Armstrong, Jitao Shi, Cong Yang, linux-kernel, dri-devel,
Stephen Boyd, Ruihai Zhou, Sam Ravnborg
Hi,
On Mon, Jul 3, 2023 at 6:22 AM Linus Walleij <linus.walleij@linaro.org> wrote:
>
> The ILI9882t has similarities with other Ilitek panels, such
> as the characteristic internal page switching code that uses
> the model number (0x98, 0x82) as parameter.
>
> We can clearly abstract out the page switching sequence from
> the initialization code.
>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 54 ++++++++++++++++++---------
> 1 file changed, 37 insertions(+), 17 deletions(-)
This is nice, thanks!
> diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
> index 20f3cc37fa83..c1a0f10fbaf7 100644
> --- a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
> +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
> @@ -55,13 +55,33 @@ struct ili9882t {
> struct gpio_desc *enable_gpio;
> };
>
> +/* ILI9882-specific commands, add new commands as you decode them */
> +#define ILI9882T_DCS_SWITCH_PAGE 0xFF
> +
> +static int ili9882t_switch_page(struct mipi_dsi_device *dsi, u8 page)
> +{
> + u8 switch_cmd[] = {0x98, 0x82, 0x00};
> + int ret;
> +
> + switch_cmd[2] = page;
> +
> + ret = mipi_dsi_dcs_write(dsi, ILI9882T_DCS_SWITCH_PAGE, switch_cmd, 3);
nit: Instead of "3", "ARRAY_SIZE(switch_cmd)" would be more documenting.
> + if (ret) {
> + dev_err(&dsi->dev,
> + "error switching panel controller page (%d)\n", ret);
> + return ret;
> + }
> +
> + return 0;
This is a static function and you don't check the error code anywhere.
Why bother returning it?
...although in patch #1 I'm suggesting adding to the core the ability
to have a "sequence of sequences". If that makes sense then perhaps
the code below that uses this will be short enough that it won't look
bad to error check each call?
> static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
> {
> int ret;
>
> msleep(5);
>
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x01);
> + ili9882t_switch_page(dsi, 0x01);
> mipi_dsi_dcs_write_seq(dsi, 0x00, 0x42);
> mipi_dsi_dcs_write_seq(dsi, 0x01, 0x11);
> mipi_dsi_dcs_write_seq(dsi, 0x02, 0x00);
> @@ -192,7 +212,7 @@ static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
> mipi_dsi_dcs_write_seq(dsi, 0x8B, 0x07);
> mipi_dsi_dcs_write_seq(dsi, 0x8C, 0x07);
>
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x02);
> + ili9882t_switch_page(dsi, 0x02);
> mipi_dsi_dcs_write_seq(dsi, 0x29, 0x3A);
> mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x3B);
>
> @@ -211,12 +231,12 @@ static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
> mipi_dsi_dcs_write_seq(dsi, 0x5E, 0x40);
> mipi_dsi_dcs_write_seq(dsi, 0x84, 0x00);
>
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x03);
> + ili9882t_switch_page(dsi, 0x03);
> mipi_dsi_dcs_write_seq(dsi, 0x20, 0x01);
> mipi_dsi_dcs_write_seq(dsi, 0x21, 0x3C);
> mipi_dsi_dcs_write_seq(dsi, 0x22, 0xFA);
>
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0A);
> + ili9882t_switch_page(dsi, 0x0a);
Super nitty: Even though Linux in general has hex constants in
lowercase, this driver seems to consistently use uppercase. You've
introduced a few inconsistencies here (and a few more below). Can you
make this consistent? Maybe do the upper-to-lower conversion as part
of your efforts to break the driver out?
-Doug
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v3 3/4] drm/panel: ili9882t: Break out as separate driver
2023-07-03 13:21 ` [PATCH v3 3/4] drm/panel: ili9882t: Break out as separate driver Linus Walleij
2023-07-06 21:14 ` Doug Anderson
@ 2023-08-01 6:44 ` cong yang
2023-08-14 2:04 ` cong yang
2 siblings, 0 replies; 19+ messages in thread
From: cong yang @ 2023-08-01 6:44 UTC (permalink / raw)
To: Linus Walleij
Cc: Neil Armstrong, Jitao Shi, Douglas Anderson, dri-devel,
Stephen Boyd, Ruihai Zhou, Hsin-Yi Wang, Sam Ravnborg,
linux-kernel
Hi,
On Mon, Jul 3, 2023 at 9:21 PM Linus Walleij <linus.walleij@linaro.org> wrote:
>
> The Starry ILI9882t-based panel should never have been part of the boe
> tv101wum driver, it is clearly based on the Ilitek ILI9882t display
> controller and if you look at the custom command sequences for the
> panel these clearly contain the signature Ilitek page switch (0xff)
> commands. The hardware has nothing in common with the other panels
> supported by this driver.
>
> Break this out into a separate driver and config symbol instead.
>
> If the placement here is out of convenience for using similar code,
> we should consider creating a helper library instead.
>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> drivers/gpu/drm/panel/Kconfig | 9 +
> drivers/gpu/drm/panel/Makefile | 1 +
> drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 386 -------------
> drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 739 +++++++++++++++++++++++++
> 4 files changed, 749 insertions(+), 386 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
> index 1a0fd0754692..c39e949a26eb 100644
> --- a/drivers/gpu/drm/panel/Kconfig
> +++ b/drivers/gpu/drm/panel/Kconfig
> @@ -203,6 +203,15 @@ config DRM_PANEL_ILITEK_ILI9881C
> Say Y if you want to enable support for panels based on the
> Ilitek ILI9881c controller.
>
> +config DRM_PANEL_ILITEK_ILI9882T
> + tristate "Ilitek ILI9882t-based panels"
> + depends on OF
> + depends on DRM_MIPI_DSI
> + depends on BACKLIGHT_CLASS_DEVICE
> + help
> + Say Y if you want to enable support for panels based on the
> + Ilitek ILI9882t controller.
> +
> config DRM_PANEL_INNOLUX_EJ030NA
> tristate "Innolux EJ030NA 320x480 LCD panel"
> depends on OF && SPI
> diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
> index 499e38244253..75c2533d337e 100644
> --- a/drivers/gpu/drm/panel/Makefile
> +++ b/drivers/gpu/drm/panel/Makefile
> @@ -18,6 +18,7 @@ obj-$(CONFIG_DRM_PANEL_HIMAX_HX8394) += panel-himax-hx8394.o
> obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
> obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
> obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
> +obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9882T) += panel-ilitek-ili9882t.o
> obj-$(CONFIG_DRM_PANEL_INNOLUX_EJ030NA) += panel-innolux-ej030na.o
> obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
> obj-$(CONFIG_DRM_PANEL_JADARD_JD9365DA_H3) += panel-jadard-jd9365da-h3.o
> diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> index 358918e0f03f..14a0ee95a803 100644
> --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> @@ -1348,361 +1348,6 @@ static int starry_himax83102_j02_init(struct mipi_dsi_device *dsi)
> return 0;
> };
>
> -
> -static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
> -{
> - int ret;
> -
> - msleep(5);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x00, 0x42);
> - mipi_dsi_dcs_write_seq(dsi, 0x01, 0x11);
> - mipi_dsi_dcs_write_seq(dsi, 0x02, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x03, 0x00);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x04, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x05, 0x11);
> - mipi_dsi_dcs_write_seq(dsi, 0x06, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x07, 0x00);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x08, 0x80);
> - mipi_dsi_dcs_write_seq(dsi, 0x09, 0x81);
> - mipi_dsi_dcs_write_seq(dsi, 0x0A, 0x71);
> - mipi_dsi_dcs_write_seq(dsi, 0x0B, 0x00);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x0C, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x0E, 0x1A);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x24, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x25, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x26, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x2C, 0xD4);
> - mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x40);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x11);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x32);
> - mipi_dsi_dcs_write_seq(dsi, 0xD1, 0x30);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x55);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xD0, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0xE3, 0x93);
> - mipi_dsi_dcs_write_seq(dsi, 0xE4, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x80);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x31, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x32, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x33, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x34, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x35, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x36, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x37, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x38, 0x28);
> - mipi_dsi_dcs_write_seq(dsi, 0x39, 0x29);
> - mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x11);
> - mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x13);
> - mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x15);
> - mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x17);
> - mipi_dsi_dcs_write_seq(dsi, 0x3E, 0x09);
> - mipi_dsi_dcs_write_seq(dsi, 0x3F, 0x0D);
> - mipi_dsi_dcs_write_seq(dsi, 0x40, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x41, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x42, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x43, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x44, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x45, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x46, 0x02);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x47, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x48, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x49, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x4A, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x4B, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x4C, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x4D, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x4E, 0x28);
> - mipi_dsi_dcs_write_seq(dsi, 0x4F, 0x29);
> - mipi_dsi_dcs_write_seq(dsi, 0x50, 0x10);
> - mipi_dsi_dcs_write_seq(dsi, 0x51, 0x12);
> - mipi_dsi_dcs_write_seq(dsi, 0x52, 0x14);
> - mipi_dsi_dcs_write_seq(dsi, 0x53, 0x16);
> - mipi_dsi_dcs_write_seq(dsi, 0x54, 0x08);
> - mipi_dsi_dcs_write_seq(dsi, 0x55, 0x0C);
> - mipi_dsi_dcs_write_seq(dsi, 0x56, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x57, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x58, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x59, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x5A, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x5B, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x5C, 0x02);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x61, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x62, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x63, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x64, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x65, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x66, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x67, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x68, 0x28);
> - mipi_dsi_dcs_write_seq(dsi, 0x69, 0x29);
> - mipi_dsi_dcs_write_seq(dsi, 0x6A, 0x16);
> - mipi_dsi_dcs_write_seq(dsi, 0x6B, 0x14);
> - mipi_dsi_dcs_write_seq(dsi, 0x6C, 0x12);
> - mipi_dsi_dcs_write_seq(dsi, 0x6D, 0x10);
> - mipi_dsi_dcs_write_seq(dsi, 0x6E, 0x0C);
> - mipi_dsi_dcs_write_seq(dsi, 0x6F, 0x08);
> - mipi_dsi_dcs_write_seq(dsi, 0x70, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x71, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x72, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x73, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x74, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x75, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x76, 0x02);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x77, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x78, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x79, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x7A, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x7B, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x7C, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x7D, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x7E, 0x28);
> - mipi_dsi_dcs_write_seq(dsi, 0x7F, 0x29);
> - mipi_dsi_dcs_write_seq(dsi, 0x80, 0x17);
> - mipi_dsi_dcs_write_seq(dsi, 0x81, 0x15);
> - mipi_dsi_dcs_write_seq(dsi, 0x82, 0x13);
> - mipi_dsi_dcs_write_seq(dsi, 0x83, 0x11);
> - mipi_dsi_dcs_write_seq(dsi, 0x84, 0x0D);
> - mipi_dsi_dcs_write_seq(dsi, 0x85, 0x09);
> - mipi_dsi_dcs_write_seq(dsi, 0x86, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x87, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x88, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x89, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x8A, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x8B, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x8C, 0x07);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x29, 0x3A);
> - mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x3B);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x06, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x07, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x08, 0x0C);
> - mipi_dsi_dcs_write_seq(dsi, 0x09, 0x44);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x0A);
> - mipi_dsi_dcs_write_seq(dsi, 0x39, 0x11);
> - mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x0C);
> - mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x44);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x53, 0x1F);
> - mipi_dsi_dcs_write_seq(dsi, 0x5E, 0x40);
> - mipi_dsi_dcs_write_seq(dsi, 0x84, 0x00);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x03);
> - mipi_dsi_dcs_write_seq(dsi, 0x20, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x21, 0x3C);
> - mipi_dsi_dcs_write_seq(dsi, 0x22, 0xFA);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0A);
> - mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0xE2, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x91);
> - mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x3C);
> - mipi_dsi_dcs_write_seq(dsi, 0xE7, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0xE8, 0xFA);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x12);
> - mipi_dsi_dcs_write_seq(dsi, 0x87, 0x2C);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x05);
> - mipi_dsi_dcs_write_seq(dsi, 0x73, 0xE5);
> - mipi_dsi_dcs_write_seq(dsi, 0x7F, 0x6B);
> - mipi_dsi_dcs_write_seq(dsi, 0x6D, 0xA4);
> - mipi_dsi_dcs_write_seq(dsi, 0x79, 0x54);
> - mipi_dsi_dcs_write_seq(dsi, 0x69, 0x97);
> - mipi_dsi_dcs_write_seq(dsi, 0x6A, 0x97);
> - mipi_dsi_dcs_write_seq(dsi, 0xA5, 0x3F);
> - mipi_dsi_dcs_write_seq(dsi, 0x61, 0xDA);
> - mipi_dsi_dcs_write_seq(dsi, 0xA7, 0xF1);
> - mipi_dsi_dcs_write_seq(dsi, 0x5F, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x62, 0x3F);
> - mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x90);
> - mipi_dsi_dcs_write_seq(dsi, 0x86, 0x87);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x06);
> - mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x80);
> - mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x58);
> - mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0xCE, 0x58);
> - mipi_dsi_dcs_write_seq(dsi, 0xCF, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x67, 0x60);
> - mipi_dsi_dcs_write_seq(dsi, 0x10, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x92, 0x22);
> - mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x08);
> - mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x55);
> - mipi_dsi_dcs_write_seq(dsi, 0xDC, 0x38);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x08);
> - mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79,
> - 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD,
> - 0xD5, 0xE2, 0xE8);
> - mipi_dsi_dcs_write_seq(dsi, 0xE1, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79,
> - 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD,
> - 0xD5, 0xE2, 0xE8);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x04);
> - mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x81);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0C);
> - mipi_dsi_dcs_write_seq(dsi, 0x00, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x01, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x02, 0x03);
> - mipi_dsi_dcs_write_seq(dsi, 0x03, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x04, 0x03);
> - mipi_dsi_dcs_write_seq(dsi, 0x05, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x06, 0x04);
> - mipi_dsi_dcs_write_seq(dsi, 0x07, 0x03);
> - mipi_dsi_dcs_write_seq(dsi, 0x08, 0x03);
> - mipi_dsi_dcs_write_seq(dsi, 0x09, 0x04);
> - mipi_dsi_dcs_write_seq(dsi, 0x0A, 0x04);
> - mipi_dsi_dcs_write_seq(dsi, 0x0B, 0x05);
> - mipi_dsi_dcs_write_seq(dsi, 0x0C, 0x04);
> - mipi_dsi_dcs_write_seq(dsi, 0x0D, 0x06);
> - mipi_dsi_dcs_write_seq(dsi, 0x0E, 0x05);
> - mipi_dsi_dcs_write_seq(dsi, 0x0F, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x10, 0x04);
> - mipi_dsi_dcs_write_seq(dsi, 0x11, 0x08);
> - mipi_dsi_dcs_write_seq(dsi, 0x12, 0x05);
> - mipi_dsi_dcs_write_seq(dsi, 0x13, 0x09);
> - mipi_dsi_dcs_write_seq(dsi, 0x14, 0x05);
> - mipi_dsi_dcs_write_seq(dsi, 0x15, 0x0A);
> - mipi_dsi_dcs_write_seq(dsi, 0x16, 0x06);
> - mipi_dsi_dcs_write_seq(dsi, 0x17, 0x0B);
> - mipi_dsi_dcs_write_seq(dsi, 0x18, 0x05);
> - mipi_dsi_dcs_write_seq(dsi, 0x19, 0x0C);
> - mipi_dsi_dcs_write_seq(dsi, 0x1A, 0x06);
> - mipi_dsi_dcs_write_seq(dsi, 0x1B, 0x0D);
> - mipi_dsi_dcs_write_seq(dsi, 0x1C, 0x06);
> - mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x0E);
> - mipi_dsi_dcs_write_seq(dsi, 0x1E, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x1F, 0x0F);
> - mipi_dsi_dcs_write_seq(dsi, 0x20, 0x06);
> - mipi_dsi_dcs_write_seq(dsi, 0x21, 0x10);
> - mipi_dsi_dcs_write_seq(dsi, 0x22, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x23, 0x11);
> - mipi_dsi_dcs_write_seq(dsi, 0x24, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x25, 0x12);
> - mipi_dsi_dcs_write_seq(dsi, 0x26, 0x08);
> - mipi_dsi_dcs_write_seq(dsi, 0x27, 0x13);
> - mipi_dsi_dcs_write_seq(dsi, 0x28, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x29, 0x14);
> - mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x08);
> - mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x15);
> - mipi_dsi_dcs_write_seq(dsi, 0x2C, 0x08);
> - mipi_dsi_dcs_write_seq(dsi, 0x2D, 0x16);
> - mipi_dsi_dcs_write_seq(dsi, 0x2E, 0x09);
> - mipi_dsi_dcs_write_seq(dsi, 0x2F, 0x17);
> - mipi_dsi_dcs_write_seq(dsi, 0x30, 0x08);
> - mipi_dsi_dcs_write_seq(dsi, 0x31, 0x18);
> - mipi_dsi_dcs_write_seq(dsi, 0x32, 0x09);
> - mipi_dsi_dcs_write_seq(dsi, 0x33, 0x19);
> - mipi_dsi_dcs_write_seq(dsi, 0x34, 0x09);
> - mipi_dsi_dcs_write_seq(dsi, 0x35, 0x1A);
> - mipi_dsi_dcs_write_seq(dsi, 0x36, 0x0A);
> - mipi_dsi_dcs_write_seq(dsi, 0x37, 0x1B);
> - mipi_dsi_dcs_write_seq(dsi, 0x38, 0x0A);
> - mipi_dsi_dcs_write_seq(dsi, 0x39, 0x1C);
> - mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x0A);
> - mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x1D);
> - mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x0A);
> - mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x1E);
> - mipi_dsi_dcs_write_seq(dsi, 0x3E, 0x0A);
> - mipi_dsi_dcs_write_seq(dsi, 0x3F, 0x1F);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x04);
> - mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x01);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0E);
> - mipi_dsi_dcs_write_seq(dsi, 0x02, 0x0C);
> - mipi_dsi_dcs_write_seq(dsi, 0x20, 0x10);
> - mipi_dsi_dcs_write_seq(dsi, 0x25, 0x16);
> - mipi_dsi_dcs_write_seq(dsi, 0x26, 0xE0);
> - mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x29, 0x71);
> - mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x46);
> - mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x1F);
> - mipi_dsi_dcs_write_seq(dsi, 0x2D, 0xC7);
> - mipi_dsi_dcs_write_seq(dsi, 0x31, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x32, 0xDF);
> - mipi_dsi_dcs_write_seq(dsi, 0x33, 0x5A);
> - mipi_dsi_dcs_write_seq(dsi, 0x34, 0xC0);
> - mipi_dsi_dcs_write_seq(dsi, 0x35, 0x5A);
> - mipi_dsi_dcs_write_seq(dsi, 0x36, 0xC0);
> - mipi_dsi_dcs_write_seq(dsi, 0x38, 0x65);
> - mipi_dsi_dcs_write_seq(dsi, 0x80, 0x3E);
> - mipi_dsi_dcs_write_seq(dsi, 0x81, 0xA0);
> - mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0xB1, 0xCC);
> - mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x12);
> - mipi_dsi_dcs_write_seq(dsi, 0xC2, 0xCC);
> - mipi_dsi_dcs_write_seq(dsi, 0xC3, 0xCC);
> - mipi_dsi_dcs_write_seq(dsi, 0xC4, 0xCC);
> - mipi_dsi_dcs_write_seq(dsi, 0xC5, 0xCC);
> - mipi_dsi_dcs_write_seq(dsi, 0xC6, 0xCC);
> - mipi_dsi_dcs_write_seq(dsi, 0xC7, 0xCC);
> - mipi_dsi_dcs_write_seq(dsi, 0xC8, 0xCC);
> - mipi_dsi_dcs_write_seq(dsi, 0xC9, 0xCC);
> - mipi_dsi_dcs_write_seq(dsi, 0x30, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x00, 0x81);
> - mipi_dsi_dcs_write_seq(dsi, 0x08, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x09, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x07, 0x21);
> - mipi_dsi_dcs_write_seq(dsi, 0x04, 0x10);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x1E);
> - mipi_dsi_dcs_write_seq(dsi, 0x60, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x64, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x6D, 0x00);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0B);
> - mipi_dsi_dcs_write_seq(dsi, 0xA6, 0x44);
> - mipi_dsi_dcs_write_seq(dsi, 0xA7, 0xB6);
> - mipi_dsi_dcs_write_seq(dsi, 0xA8, 0x03);
> - mipi_dsi_dcs_write_seq(dsi, 0xA9, 0x03);
> - mipi_dsi_dcs_write_seq(dsi, 0xAA, 0x51);
> - mipi_dsi_dcs_write_seq(dsi, 0xAB, 0x51);
> - mipi_dsi_dcs_write_seq(dsi, 0xAC, 0x04);
> - mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x92);
> - mipi_dsi_dcs_write_seq(dsi, 0xBE, 0xA1);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x05);
> - mipi_dsi_dcs_write_seq(dsi, 0x86, 0x87);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x06);
> - mipi_dsi_dcs_write_seq(dsi, 0x92, 0x22);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x00);
> -
> - ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
> - if (ret)
> - return ret;
> - msleep(120);
> - ret = mipi_dsi_dcs_set_display_on(dsi);
> - if (ret)
> - return ret;
> - msleep(20);
> -
> - return 0;
> -};
> -
> static inline struct boe_panel *to_boe_panel(struct drm_panel *panel)
> {
> return container_of(panel, struct boe_panel, base);
> @@ -2081,34 +1726,6 @@ static const struct panel_desc starry_himax83102_j02_desc = {
> .lp11_before_reset = true,
> };
>
> -static const struct drm_display_mode starry_ili9882t_default_mode = {
> - .clock = 165280,
> - .hdisplay = 1200,
> - .hsync_start = 1200 + 32,
> - .hsync_end = 1200 + 32 + 30,
> - .htotal = 1200 + 32 + 30 + 32,
> - .vdisplay = 1920,
> - .vsync_start = 1920 + 68,
> - .vsync_end = 1920 + 68 + 2,
> - .vtotal = 1920 + 68 + 2 + 10,
> - .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
> -};
> -
> -static const struct panel_desc starry_ili9882t_desc = {
> - .modes = &starry_ili9882t_default_mode,
> - .bpc = 8,
> - .size = {
> - .width_mm = 141,
> - .height_mm = 226,
> - },
> - .lanes = 4,
> - .format = MIPI_DSI_FMT_RGB888,
> - .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
> - MIPI_DSI_MODE_LPM,
> - .init = starry_ili9882t_init,
> - .lp11_before_reset = true,
> -};
> -
> static int boe_panel_get_modes(struct drm_panel *panel,
> struct drm_connector *connector)
> {
> @@ -2285,9 +1902,6 @@ static const struct of_device_id boe_of_match[] = {
> { .compatible = "starry,himax83102-j02",
> .data = &starry_himax83102_j02_desc
> },
> - { .compatible = "starry,ili9882t",
> - .data = &starry_ili9882t_desc
> - },
> { /* sentinel */ }
> };
> MODULE_DEVICE_TABLE(of, boe_of_match);
> diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
> new file mode 100644
> index 000000000000..20f3cc37fa83
> --- /dev/null
> +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
> @@ -0,0 +1,739 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Panels based on the Ilitek ILI9882T display controller.
> + */
> +#include <linux/delay.h>
> +#include <linux/gpio/consumer.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/regulator/consumer.h>
> +
> +#include <drm/drm_connector.h>
> +#include <drm/drm_crtc.h>
> +#include <drm/drm_mipi_dsi.h>
> +#include <drm/drm_panel.h>
> +
> +#include <video/mipi_display.h>
> +
> +/*
> + * Use this descriptor struct to describe different panels using the
> + * Ilitek ILI9882T display controller.
> + */
> +struct panel_desc {
> + const struct drm_display_mode *modes;
> + unsigned int bpc;
> +
> + /**
> + * @width_mm: width of the panel's active display area
> + * @height_mm: height of the panel's active display area
> + */
> + struct {
> + unsigned int width_mm;
> + unsigned int height_mm;
> + } size;
> +
> + unsigned long mode_flags;
> + enum mipi_dsi_pixel_format format;
> + int (*init)(struct mipi_dsi_device *dsi);
> + unsigned int lanes;
> + bool discharge_on_disable;
> + bool lp11_before_reset;
> +};
> +
> +struct ili9882t {
> + struct drm_panel base;
> + struct mipi_dsi_device *dsi;
> +
> + const struct panel_desc *desc;
> +
> + enum drm_panel_orientation orientation;
> + struct regulator *pp3300;
> + struct regulator *pp1800;
> + struct regulator *avee;
> + struct regulator *avdd;
> + struct gpio_desc *enable_gpio;
> +};
> +
> +static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
> +{
> + int ret;
> +
> + msleep(5);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x00, 0x42);
> + mipi_dsi_dcs_write_seq(dsi, 0x01, 0x11);
> + mipi_dsi_dcs_write_seq(dsi, 0x02, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x03, 0x00);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x04, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x05, 0x11);
> + mipi_dsi_dcs_write_seq(dsi, 0x06, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x07, 0x00);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x08, 0x80);
> + mipi_dsi_dcs_write_seq(dsi, 0x09, 0x81);
> + mipi_dsi_dcs_write_seq(dsi, 0x0A, 0x71);
> + mipi_dsi_dcs_write_seq(dsi, 0x0B, 0x00);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x0C, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x0E, 0x1A);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x24, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x25, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x26, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x2C, 0xD4);
> + mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x40);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x11);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x32);
> + mipi_dsi_dcs_write_seq(dsi, 0xD1, 0x30);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x55);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xD0, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0xE3, 0x93);
> + mipi_dsi_dcs_write_seq(dsi, 0xE4, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x80);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x31, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x32, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x33, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x34, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x35, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x36, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x37, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x38, 0x28);
> + mipi_dsi_dcs_write_seq(dsi, 0x39, 0x29);
> + mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x11);
> + mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x13);
> + mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x15);
> + mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x17);
> + mipi_dsi_dcs_write_seq(dsi, 0x3E, 0x09);
> + mipi_dsi_dcs_write_seq(dsi, 0x3F, 0x0D);
> + mipi_dsi_dcs_write_seq(dsi, 0x40, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x41, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x42, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x43, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x44, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x45, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x46, 0x02);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x47, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x48, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x49, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x4A, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x4B, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x4C, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x4D, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x4E, 0x28);
> + mipi_dsi_dcs_write_seq(dsi, 0x4F, 0x29);
> + mipi_dsi_dcs_write_seq(dsi, 0x50, 0x10);
> + mipi_dsi_dcs_write_seq(dsi, 0x51, 0x12);
> + mipi_dsi_dcs_write_seq(dsi, 0x52, 0x14);
> + mipi_dsi_dcs_write_seq(dsi, 0x53, 0x16);
> + mipi_dsi_dcs_write_seq(dsi, 0x54, 0x08);
> + mipi_dsi_dcs_write_seq(dsi, 0x55, 0x0C);
> + mipi_dsi_dcs_write_seq(dsi, 0x56, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x57, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x58, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x59, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x5A, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x5B, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x5C, 0x02);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x61, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x62, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x63, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x64, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x65, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x66, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x67, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x68, 0x28);
> + mipi_dsi_dcs_write_seq(dsi, 0x69, 0x29);
> + mipi_dsi_dcs_write_seq(dsi, 0x6A, 0x16);
> + mipi_dsi_dcs_write_seq(dsi, 0x6B, 0x14);
> + mipi_dsi_dcs_write_seq(dsi, 0x6C, 0x12);
> + mipi_dsi_dcs_write_seq(dsi, 0x6D, 0x10);
> + mipi_dsi_dcs_write_seq(dsi, 0x6E, 0x0C);
> + mipi_dsi_dcs_write_seq(dsi, 0x6F, 0x08);
> + mipi_dsi_dcs_write_seq(dsi, 0x70, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x71, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x72, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x73, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x74, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x75, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x76, 0x02);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x77, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x78, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x79, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x7A, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x7B, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x7C, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x7D, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x7E, 0x28);
> + mipi_dsi_dcs_write_seq(dsi, 0x7F, 0x29);
> + mipi_dsi_dcs_write_seq(dsi, 0x80, 0x17);
> + mipi_dsi_dcs_write_seq(dsi, 0x81, 0x15);
> + mipi_dsi_dcs_write_seq(dsi, 0x82, 0x13);
> + mipi_dsi_dcs_write_seq(dsi, 0x83, 0x11);
> + mipi_dsi_dcs_write_seq(dsi, 0x84, 0x0D);
> + mipi_dsi_dcs_write_seq(dsi, 0x85, 0x09);
> + mipi_dsi_dcs_write_seq(dsi, 0x86, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x87, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x88, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x89, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x8A, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x8B, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x8C, 0x07);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x29, 0x3A);
> + mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x3B);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x06, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x07, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x08, 0x0C);
> + mipi_dsi_dcs_write_seq(dsi, 0x09, 0x44);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x0A);
> + mipi_dsi_dcs_write_seq(dsi, 0x39, 0x11);
> + mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x0C);
> + mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x44);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x53, 0x1F);
> + mipi_dsi_dcs_write_seq(dsi, 0x5E, 0x40);
> + mipi_dsi_dcs_write_seq(dsi, 0x84, 0x00);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x03);
> + mipi_dsi_dcs_write_seq(dsi, 0x20, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x21, 0x3C);
> + mipi_dsi_dcs_write_seq(dsi, 0x22, 0xFA);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0A);
> + mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0xE2, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x91);
> + mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x3C);
> + mipi_dsi_dcs_write_seq(dsi, 0xE7, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0xE8, 0xFA);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x12);
> + mipi_dsi_dcs_write_seq(dsi, 0x87, 0x2C);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x05);
> + mipi_dsi_dcs_write_seq(dsi, 0x73, 0xE5);
> + mipi_dsi_dcs_write_seq(dsi, 0x7F, 0x6B);
> + mipi_dsi_dcs_write_seq(dsi, 0x6D, 0xA4);
> + mipi_dsi_dcs_write_seq(dsi, 0x79, 0x54);
> + mipi_dsi_dcs_write_seq(dsi, 0x69, 0x97);
> + mipi_dsi_dcs_write_seq(dsi, 0x6A, 0x97);
> + mipi_dsi_dcs_write_seq(dsi, 0xA5, 0x3F);
> + mipi_dsi_dcs_write_seq(dsi, 0x61, 0xDA);
> + mipi_dsi_dcs_write_seq(dsi, 0xA7, 0xF1);
> + mipi_dsi_dcs_write_seq(dsi, 0x5F, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x62, 0x3F);
> + mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x90);
> + mipi_dsi_dcs_write_seq(dsi, 0x86, 0x87);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x06);
> + mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x80);
> + mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x58);
> + mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0xCE, 0x58);
> + mipi_dsi_dcs_write_seq(dsi, 0xCF, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x67, 0x60);
> + mipi_dsi_dcs_write_seq(dsi, 0x10, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x92, 0x22);
> + mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x08);
> + mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x55);
> + mipi_dsi_dcs_write_seq(dsi, 0xDC, 0x38);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x08);
> + mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79,
> + 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD,
> + 0xD5, 0xE2, 0xE8);
> + mipi_dsi_dcs_write_seq(dsi, 0xE1, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79,
> + 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD,
> + 0xD5, 0xE2, 0xE8);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x81);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0C);
> + mipi_dsi_dcs_write_seq(dsi, 0x00, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x01, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x02, 0x03);
> + mipi_dsi_dcs_write_seq(dsi, 0x03, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x04, 0x03);
> + mipi_dsi_dcs_write_seq(dsi, 0x05, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x06, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0x07, 0x03);
> + mipi_dsi_dcs_write_seq(dsi, 0x08, 0x03);
> + mipi_dsi_dcs_write_seq(dsi, 0x09, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0x0A, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0x0B, 0x05);
> + mipi_dsi_dcs_write_seq(dsi, 0x0C, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0x0D, 0x06);
> + mipi_dsi_dcs_write_seq(dsi, 0x0E, 0x05);
> + mipi_dsi_dcs_write_seq(dsi, 0x0F, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x10, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0x11, 0x08);
> + mipi_dsi_dcs_write_seq(dsi, 0x12, 0x05);
> + mipi_dsi_dcs_write_seq(dsi, 0x13, 0x09);
> + mipi_dsi_dcs_write_seq(dsi, 0x14, 0x05);
> + mipi_dsi_dcs_write_seq(dsi, 0x15, 0x0A);
> + mipi_dsi_dcs_write_seq(dsi, 0x16, 0x06);
> + mipi_dsi_dcs_write_seq(dsi, 0x17, 0x0B);
> + mipi_dsi_dcs_write_seq(dsi, 0x18, 0x05);
> + mipi_dsi_dcs_write_seq(dsi, 0x19, 0x0C);
> + mipi_dsi_dcs_write_seq(dsi, 0x1A, 0x06);
> + mipi_dsi_dcs_write_seq(dsi, 0x1B, 0x0D);
> + mipi_dsi_dcs_write_seq(dsi, 0x1C, 0x06);
> + mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x0E);
> + mipi_dsi_dcs_write_seq(dsi, 0x1E, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x1F, 0x0F);
> + mipi_dsi_dcs_write_seq(dsi, 0x20, 0x06);
> + mipi_dsi_dcs_write_seq(dsi, 0x21, 0x10);
> + mipi_dsi_dcs_write_seq(dsi, 0x22, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x23, 0x11);
> + mipi_dsi_dcs_write_seq(dsi, 0x24, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x25, 0x12);
> + mipi_dsi_dcs_write_seq(dsi, 0x26, 0x08);
> + mipi_dsi_dcs_write_seq(dsi, 0x27, 0x13);
> + mipi_dsi_dcs_write_seq(dsi, 0x28, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x29, 0x14);
> + mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x08);
> + mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x15);
> + mipi_dsi_dcs_write_seq(dsi, 0x2C, 0x08);
> + mipi_dsi_dcs_write_seq(dsi, 0x2D, 0x16);
> + mipi_dsi_dcs_write_seq(dsi, 0x2E, 0x09);
> + mipi_dsi_dcs_write_seq(dsi, 0x2F, 0x17);
> + mipi_dsi_dcs_write_seq(dsi, 0x30, 0x08);
> + mipi_dsi_dcs_write_seq(dsi, 0x31, 0x18);
> + mipi_dsi_dcs_write_seq(dsi, 0x32, 0x09);
> + mipi_dsi_dcs_write_seq(dsi, 0x33, 0x19);
> + mipi_dsi_dcs_write_seq(dsi, 0x34, 0x09);
> + mipi_dsi_dcs_write_seq(dsi, 0x35, 0x1A);
> + mipi_dsi_dcs_write_seq(dsi, 0x36, 0x0A);
> + mipi_dsi_dcs_write_seq(dsi, 0x37, 0x1B);
> + mipi_dsi_dcs_write_seq(dsi, 0x38, 0x0A);
> + mipi_dsi_dcs_write_seq(dsi, 0x39, 0x1C);
> + mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x0A);
> + mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x1D);
> + mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x0A);
> + mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x1E);
> + mipi_dsi_dcs_write_seq(dsi, 0x3E, 0x0A);
> + mipi_dsi_dcs_write_seq(dsi, 0x3F, 0x1F);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x01);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0E);
> + mipi_dsi_dcs_write_seq(dsi, 0x02, 0x0C);
> + mipi_dsi_dcs_write_seq(dsi, 0x20, 0x10);
> + mipi_dsi_dcs_write_seq(dsi, 0x25, 0x16);
> + mipi_dsi_dcs_write_seq(dsi, 0x26, 0xE0);
> + mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x29, 0x71);
> + mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x46);
> + mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x1F);
> + mipi_dsi_dcs_write_seq(dsi, 0x2D, 0xC7);
> + mipi_dsi_dcs_write_seq(dsi, 0x31, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x32, 0xDF);
> + mipi_dsi_dcs_write_seq(dsi, 0x33, 0x5A);
> + mipi_dsi_dcs_write_seq(dsi, 0x34, 0xC0);
> + mipi_dsi_dcs_write_seq(dsi, 0x35, 0x5A);
> + mipi_dsi_dcs_write_seq(dsi, 0x36, 0xC0);
> + mipi_dsi_dcs_write_seq(dsi, 0x38, 0x65);
> + mipi_dsi_dcs_write_seq(dsi, 0x80, 0x3E);
> + mipi_dsi_dcs_write_seq(dsi, 0x81, 0xA0);
> + mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0xB1, 0xCC);
> + mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x12);
> + mipi_dsi_dcs_write_seq(dsi, 0xC2, 0xCC);
> + mipi_dsi_dcs_write_seq(dsi, 0xC3, 0xCC);
> + mipi_dsi_dcs_write_seq(dsi, 0xC4, 0xCC);
> + mipi_dsi_dcs_write_seq(dsi, 0xC5, 0xCC);
> + mipi_dsi_dcs_write_seq(dsi, 0xC6, 0xCC);
> + mipi_dsi_dcs_write_seq(dsi, 0xC7, 0xCC);
> + mipi_dsi_dcs_write_seq(dsi, 0xC8, 0xCC);
> + mipi_dsi_dcs_write_seq(dsi, 0xC9, 0xCC);
> + mipi_dsi_dcs_write_seq(dsi, 0x30, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x00, 0x81);
> + mipi_dsi_dcs_write_seq(dsi, 0x08, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x09, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x07, 0x21);
> + mipi_dsi_dcs_write_seq(dsi, 0x04, 0x10);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x1E);
> + mipi_dsi_dcs_write_seq(dsi, 0x60, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x64, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x6D, 0x00);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0B);
> + mipi_dsi_dcs_write_seq(dsi, 0xA6, 0x44);
> + mipi_dsi_dcs_write_seq(dsi, 0xA7, 0xB6);
> + mipi_dsi_dcs_write_seq(dsi, 0xA8, 0x03);
> + mipi_dsi_dcs_write_seq(dsi, 0xA9, 0x03);
> + mipi_dsi_dcs_write_seq(dsi, 0xAA, 0x51);
> + mipi_dsi_dcs_write_seq(dsi, 0xAB, 0x51);
> + mipi_dsi_dcs_write_seq(dsi, 0xAC, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x92);
> + mipi_dsi_dcs_write_seq(dsi, 0xBE, 0xA1);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x05);
> + mipi_dsi_dcs_write_seq(dsi, 0x86, 0x87);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x06);
> + mipi_dsi_dcs_write_seq(dsi, 0x92, 0x22);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x00);
> +
> + ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
> + if (ret)
> + return ret;
> + msleep(120);
> + ret = mipi_dsi_dcs_set_display_on(dsi);
> + if (ret)
> + return ret;
> + msleep(20);
> +
> + return 0;
> +};
> +
> +static inline struct ili9882t *to_ili9882t(struct drm_panel *panel)
> +{
> + return container_of(panel, struct ili9882t, base);
> +}
> +
> +static int ili9882t_enter_sleep_mode(struct ili9882t *ili)
> +{
> + struct mipi_dsi_device *dsi = ili->dsi;
> + int ret;
> +
> + dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
> +
> + ret = mipi_dsi_dcs_set_display_off(dsi);
> + if (ret < 0)
> + return ret;
> +
> + ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
> + if (ret < 0)
> + return ret;
> +
> + return 0;
> +}
> +
> +static int ili9882t_disable(struct drm_panel *panel)
> +{
> + struct ili9882t *ili = to_ili9882t(panel);
> + int ret;
> +
Hi,Linus：
Ilitek vendor suggestion switching to page0
before sending sleep command.
Can you help me add this before enter sleep?
struct mipi_dsi_device *dsi = ili->dsi;
ili9882t_switch_page(dsi, 0x00);
Can you share your merge plan about this series? Thank you.
> + ret = ili9882t_enter_sleep_mode(ili);
> + if (ret < 0) {
> + dev_err(panel->dev, "failed to set panel off: %d\n", ret);
> + return ret;
> + }
> +
> + msleep(150);
> +
> + return 0;
> +}
> +
> +static int ili9882t_unprepare(struct drm_panel *panel)
> +{
> + struct ili9882t *ili = to_ili9882t(panel);
> +
> + if (ili->desc->discharge_on_disable) {
> + regulator_disable(ili->avee);
> + regulator_disable(ili->avdd);
> + usleep_range(5000, 7000);
> + gpiod_set_value(ili->enable_gpio, 0);
> + usleep_range(5000, 7000);
> + regulator_disable(ili->pp1800);
> + regulator_disable(ili->pp3300);
> + } else {
> + gpiod_set_value(ili->enable_gpio, 0);
> + usleep_range(1000, 2000);
> + regulator_disable(ili->avee);
> + regulator_disable(ili->avdd);
> + usleep_range(5000, 7000);
> + regulator_disable(ili->pp1800);
> + regulator_disable(ili->pp3300);
> + }
> +
> + return 0;
> +}
> +
> +static int ili9882t_prepare(struct drm_panel *panel)
> +{
> + struct ili9882t *ili = to_ili9882t(panel);
> + int ret;
> +
> + gpiod_set_value(ili->enable_gpio, 0);
> + usleep_range(1000, 1500);
> +
> + ret = regulator_enable(ili->pp3300);
> + if (ret < 0)
> + return ret;
> +
> + ret = regulator_enable(ili->pp1800);
> + if (ret < 0)
> + return ret;
> +
> + usleep_range(3000, 5000);
> +
> + ret = regulator_enable(ili->avdd);
> + if (ret < 0)
> + goto poweroff1v8;
> + ret = regulator_enable(ili->avee);
> + if (ret < 0)
> + goto poweroffavdd;
> +
> + usleep_range(10000, 11000);
> +
> + if (ili->desc->lp11_before_reset) {
> + mipi_dsi_dcs_nop(ili->dsi);
> + usleep_range(1000, 2000);
> + }
> + gpiod_set_value(ili->enable_gpio, 1);
> + usleep_range(1000, 2000);
> + gpiod_set_value(ili->enable_gpio, 0);
> + usleep_range(1000, 2000);
> + gpiod_set_value(ili->enable_gpio, 1);
> + usleep_range(6000, 10000);
> +
> + if (ili->desc->init) {
> + ret = ili->desc->init(ili->dsi);
> + if (ret < 0) {
> + dev_err(panel->dev, "failed to init panel: %d\n", ret);
> + goto poweroff;
> + }
> + }
> +
> + return 0;
> +
> +poweroff:
> + regulator_disable(ili->avee);
> +poweroffavdd:
> + regulator_disable(ili->avdd);
> +poweroff1v8:
> + usleep_range(5000, 7000);
> + regulator_disable(ili->pp1800);
> + gpiod_set_value(ili->enable_gpio, 0);
> +
> + return ret;
> +}
> +
> +static int ili9882t_enable(struct drm_panel *panel)
> +{
> + msleep(130);
> + return 0;
> +}
> +
> +static const struct drm_display_mode starry_ili9882t_default_mode = {
> + .clock = 165280,
> + .hdisplay = 1200,
> + .hsync_start = 1200 + 32,
> + .hsync_end = 1200 + 32 + 30,
> + .htotal = 1200 + 32 + 30 + 32,
> + .vdisplay = 1920,
> + .vsync_start = 1920 + 68,
> + .vsync_end = 1920 + 68 + 2,
> + .vtotal = 1920 + 68 + 2 + 10,
> + .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
> +};
> +
> +static const struct panel_desc starry_ili9882t_desc = {
> + .modes = &starry_ili9882t_default_mode,
> + .bpc = 8,
> + .size = {
> + .width_mm = 141,
> + .height_mm = 226,
> + },
> + .lanes = 4,
> + .format = MIPI_DSI_FMT_RGB888,
> + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
> + MIPI_DSI_MODE_LPM,
> + .init = starry_ili9882t_init,
> + .lp11_before_reset = true,
> +};
> +
> +static int ili9882t_get_modes(struct drm_panel *panel,
> + struct drm_connector *connector)
> +{
> + struct ili9882t *ili = to_ili9882t(panel);
> + const struct drm_display_mode *m = ili->desc->modes;
> + struct drm_display_mode *mode;
> +
> + mode = drm_mode_duplicate(connector->dev, m);
> + if (!mode) {
> + dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
> + m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
> + return -ENOMEM;
> + }
> +
> + mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
> + drm_mode_set_name(mode);
> + drm_mode_probed_add(connector, mode);
> +
> + connector->display_info.width_mm = ili->desc->size.width_mm;
> + connector->display_info.height_mm = ili->desc->size.height_mm;
> + connector->display_info.bpc = ili->desc->bpc;
> + /*
> + * TODO: Remove once all drm drivers call
> + * drm_connector_set_orientation_from_panel()
> + */
> + drm_connector_set_panel_orientation(connector, ili->orientation);
> +
> + return 1;
> +}
> +
> +static enum drm_panel_orientation ili9882t_get_orientation(struct drm_panel *panel)
> +{
> + struct ili9882t *ili = to_ili9882t(panel);
> +
> + return ili->orientation;
> +}
> +
> +static const struct drm_panel_funcs ili9882t_funcs = {
> + .disable = ili9882t_disable,
> + .unprepare = ili9882t_unprepare,
> + .prepare = ili9882t_prepare,
> + .enable = ili9882t_enable,
> + .get_modes = ili9882t_get_modes,
> + .get_orientation = ili9882t_get_orientation,
> +};
> +
> +static int ili9882t_add(struct ili9882t *ili)
> +{
> + struct device *dev = &ili->dsi->dev;
> + int err;
> +
> + ili->avdd = devm_regulator_get(dev, "avdd");
> + if (IS_ERR(ili->avdd))
> + return PTR_ERR(ili->avdd);
> +
> + ili->avee = devm_regulator_get(dev, "avee");
> + if (IS_ERR(ili->avee))
> + return PTR_ERR(ili->avee);
> +
> + ili->pp3300 = devm_regulator_get(dev, "pp3300");
> + if (IS_ERR(ili->pp3300))
> + return PTR_ERR(ili->pp3300);
> +
> + ili->pp1800 = devm_regulator_get(dev, "pp1800");
> + if (IS_ERR(ili->pp1800))
> + return PTR_ERR(ili->pp1800);
> +
> + ili->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW);
> + if (IS_ERR(ili->enable_gpio)) {
> + dev_err(dev, "cannot get reset-gpios %ld\n",
> + PTR_ERR(ili->enable_gpio));
> + return PTR_ERR(ili->enable_gpio);
> + }
> +
> + gpiod_set_value(ili->enable_gpio, 0);
> +
> + drm_panel_init(&ili->base, dev, &ili9882t_funcs,
> + DRM_MODE_CONNECTOR_DSI);
> + err = of_drm_get_panel_orientation(dev->of_node, &ili->orientation);
> + if (err < 0) {
> + dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err);
> + return err;
> + }
> +
> + err = drm_panel_of_backlight(&ili->base);
> + if (err)
> + return err;
> +
> + ili->base.funcs = &ili9882t_funcs;
> + ili->base.dev = &ili->dsi->dev;
> +
> + drm_panel_add(&ili->base);
> +
> + return 0;
> +}
> +
> +static int ili9882t_probe(struct mipi_dsi_device *dsi)
> +{
> + struct ili9882t *ili;
> + int ret;
> + const struct panel_desc *desc;
> +
> + ili = devm_kzalloc(&dsi->dev, sizeof(*ili), GFP_KERNEL);
> + if (!ili)
> + return -ENOMEM;
> +
> + desc = of_device_get_match_data(&dsi->dev);
> + dsi->lanes = desc->lanes;
> + dsi->format = desc->format;
> + dsi->mode_flags = desc->mode_flags;
> + ili->desc = desc;
> + ili->dsi = dsi;
> + ret = ili9882t_add(ili);
> + if (ret < 0)
> + return ret;
> +
> + mipi_dsi_set_drvdata(dsi, ili);
> +
> + ret = mipi_dsi_attach(dsi);
> + if (ret)
> + drm_panel_remove(&ili->base);
> +
> + return ret;
> +}
> +
> +static void ili9882t_shutdown(struct mipi_dsi_device *dsi)
> +{
> + struct ili9882t *ili = mipi_dsi_get_drvdata(dsi);
> +
> + drm_panel_disable(&ili->base);
> + drm_panel_unprepare(&ili->base);
> +}
> +
> +static void ili9882t_remove(struct mipi_dsi_device *dsi)
> +{
> + struct ili9882t *ili = mipi_dsi_get_drvdata(dsi);
> + int ret;
> +
> + ili9882t_shutdown(dsi);
> +
> + ret = mipi_dsi_detach(dsi);
> + if (ret < 0)
> + dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret);
> +
> + if (ili->base.dev)
> + drm_panel_remove(&ili->base);
> +}
> +
> +static const struct of_device_id ili9882t_of_match[] = {
> + { .compatible = "starry,ili9882t",
> + .data = &starry_ili9882t_desc
> + },
> + { /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, ili9882t_of_match);
> +
> +static struct mipi_dsi_driver ili9882t_driver = {
> + .driver = {
> + .name = "panel-ili9882t",
> + .of_match_table = ili9882t_of_match,
> + },
> + .probe = ili9882t_probe,
> + .remove = ili9882t_remove,
> + .shutdown = ili9882t_shutdown,
> +};
> +module_mipi_dsi_driver(ili9882t_driver);
> +
> +MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>");
> +MODULE_DESCRIPTION("Ilitek ILI9882T-based panels driver");
> +MODULE_LICENSE("GPL");
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v3 3/4] drm/panel: ili9882t: Break out as separate driver
2023-07-03 13:21 ` [PATCH v3 3/4] drm/panel: ili9882t: Break out as separate driver Linus Walleij
2023-07-06 21:14 ` Doug Anderson
2023-08-01 6:44 ` cong yang
@ 2023-08-14 2:04 ` cong yang
2 siblings, 0 replies; 19+ messages in thread
From: cong yang @ 2023-08-14 2:04 UTC (permalink / raw)
To: Linus Walleij
Cc: Neil Armstrong, Jitao Shi, Douglas Anderson, dri-devel,
Stephen Boyd, Ruihai Zhou, Sam Ravnborg, linux-kernel
Hi,Linus
On Mon, Jul 3, 2023 at 9:21 PM Linus Walleij <linus.walleij@linaro.org> wrote:
>
> The Starry ILI9882t-based panel should never have been part of the boe
> tv101wum driver, it is clearly based on the Ilitek ILI9882t display
> controller and if you look at the custom command sequences for the
> panel these clearly contain the signature Ilitek page switch (0xff)
> commands. The hardware has nothing in common with the other panels
> supported by this driver.
>
> Break this out into a separate driver and config symbol instead.
>
> If the placement here is out of convenience for using similar code,
> we should consider creating a helper library instead.
>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> drivers/gpu/drm/panel/Kconfig | 9 +
> drivers/gpu/drm/panel/Makefile | 1 +
> drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 386 -------------
> drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 739 +++++++++++++++++++++++++
> 4 files changed, 749 insertions(+), 386 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
> index 1a0fd0754692..c39e949a26eb 100644
> --- a/drivers/gpu/drm/panel/Kconfig
> +++ b/drivers/gpu/drm/panel/Kconfig
> @@ -203,6 +203,15 @@ config DRM_PANEL_ILITEK_ILI9881C
> Say Y if you want to enable support for panels based on the
> Ilitek ILI9881c controller.
>
> +config DRM_PANEL_ILITEK_ILI9882T
> + tristate "Ilitek ILI9882t-based panels"
> + depends on OF
> + depends on DRM_MIPI_DSI
> + depends on BACKLIGHT_CLASS_DEVICE
> + help
> + Say Y if you want to enable support for panels based on the
> + Ilitek ILI9882t controller.
> +
> config DRM_PANEL_INNOLUX_EJ030NA
> tristate "Innolux EJ030NA 320x480 LCD panel"
> depends on OF && SPI
> diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
> index 499e38244253..75c2533d337e 100644
> --- a/drivers/gpu/drm/panel/Makefile
> +++ b/drivers/gpu/drm/panel/Makefile
> @@ -18,6 +18,7 @@ obj-$(CONFIG_DRM_PANEL_HIMAX_HX8394) += panel-himax-hx8394.o
> obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
> obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
> obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
> +obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9882T) += panel-ilitek-ili9882t.o
> obj-$(CONFIG_DRM_PANEL_INNOLUX_EJ030NA) += panel-innolux-ej030na.o
> obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
> obj-$(CONFIG_DRM_PANEL_JADARD_JD9365DA_H3) += panel-jadard-jd9365da-h3.o
> diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> index 358918e0f03f..14a0ee95a803 100644
> --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> @@ -1348,361 +1348,6 @@ static int starry_himax83102_j02_init(struct mipi_dsi_device *dsi)
> return 0;
> };
>
> -
> -static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
> -{
> - int ret;
> -
> - msleep(5);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x00, 0x42);
> - mipi_dsi_dcs_write_seq(dsi, 0x01, 0x11);
> - mipi_dsi_dcs_write_seq(dsi, 0x02, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x03, 0x00);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x04, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x05, 0x11);
> - mipi_dsi_dcs_write_seq(dsi, 0x06, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x07, 0x00);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x08, 0x80);
> - mipi_dsi_dcs_write_seq(dsi, 0x09, 0x81);
> - mipi_dsi_dcs_write_seq(dsi, 0x0A, 0x71);
> - mipi_dsi_dcs_write_seq(dsi, 0x0B, 0x00);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x0C, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x0E, 0x1A);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x24, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x25, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x26, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x2C, 0xD4);
> - mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x40);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x11);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x32);
> - mipi_dsi_dcs_write_seq(dsi, 0xD1, 0x30);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x55);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xD0, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0xE3, 0x93);
> - mipi_dsi_dcs_write_seq(dsi, 0xE4, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x80);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x31, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x32, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x33, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x34, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x35, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x36, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x37, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x38, 0x28);
> - mipi_dsi_dcs_write_seq(dsi, 0x39, 0x29);
> - mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x11);
> - mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x13);
> - mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x15);
> - mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x17);
> - mipi_dsi_dcs_write_seq(dsi, 0x3E, 0x09);
> - mipi_dsi_dcs_write_seq(dsi, 0x3F, 0x0D);
> - mipi_dsi_dcs_write_seq(dsi, 0x40, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x41, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x42, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x43, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x44, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x45, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x46, 0x02);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x47, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x48, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x49, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x4A, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x4B, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x4C, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x4D, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x4E, 0x28);
> - mipi_dsi_dcs_write_seq(dsi, 0x4F, 0x29);
> - mipi_dsi_dcs_write_seq(dsi, 0x50, 0x10);
> - mipi_dsi_dcs_write_seq(dsi, 0x51, 0x12);
> - mipi_dsi_dcs_write_seq(dsi, 0x52, 0x14);
> - mipi_dsi_dcs_write_seq(dsi, 0x53, 0x16);
> - mipi_dsi_dcs_write_seq(dsi, 0x54, 0x08);
> - mipi_dsi_dcs_write_seq(dsi, 0x55, 0x0C);
> - mipi_dsi_dcs_write_seq(dsi, 0x56, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x57, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x58, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x59, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x5A, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x5B, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x5C, 0x02);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x61, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x62, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x63, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x64, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x65, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x66, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x67, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x68, 0x28);
> - mipi_dsi_dcs_write_seq(dsi, 0x69, 0x29);
> - mipi_dsi_dcs_write_seq(dsi, 0x6A, 0x16);
> - mipi_dsi_dcs_write_seq(dsi, 0x6B, 0x14);
> - mipi_dsi_dcs_write_seq(dsi, 0x6C, 0x12);
> - mipi_dsi_dcs_write_seq(dsi, 0x6D, 0x10);
> - mipi_dsi_dcs_write_seq(dsi, 0x6E, 0x0C);
> - mipi_dsi_dcs_write_seq(dsi, 0x6F, 0x08);
> - mipi_dsi_dcs_write_seq(dsi, 0x70, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x71, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x72, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x73, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x74, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x75, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x76, 0x02);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x77, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x78, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x79, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x7A, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x7B, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x7C, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x7D, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x7E, 0x28);
> - mipi_dsi_dcs_write_seq(dsi, 0x7F, 0x29);
> - mipi_dsi_dcs_write_seq(dsi, 0x80, 0x17);
> - mipi_dsi_dcs_write_seq(dsi, 0x81, 0x15);
> - mipi_dsi_dcs_write_seq(dsi, 0x82, 0x13);
> - mipi_dsi_dcs_write_seq(dsi, 0x83, 0x11);
> - mipi_dsi_dcs_write_seq(dsi, 0x84, 0x0D);
> - mipi_dsi_dcs_write_seq(dsi, 0x85, 0x09);
> - mipi_dsi_dcs_write_seq(dsi, 0x86, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x87, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x88, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x89, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x8A, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x8B, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x8C, 0x07);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x29, 0x3A);
> - mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x3B);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x06, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x07, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x08, 0x0C);
> - mipi_dsi_dcs_write_seq(dsi, 0x09, 0x44);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x0A);
> - mipi_dsi_dcs_write_seq(dsi, 0x39, 0x11);
> - mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x0C);
> - mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x44);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0x53, 0x1F);
> - mipi_dsi_dcs_write_seq(dsi, 0x5E, 0x40);
> - mipi_dsi_dcs_write_seq(dsi, 0x84, 0x00);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x03);
> - mipi_dsi_dcs_write_seq(dsi, 0x20, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x21, 0x3C);
> - mipi_dsi_dcs_write_seq(dsi, 0x22, 0xFA);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0A);
> - mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0xE2, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x91);
> - mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x3C);
> - mipi_dsi_dcs_write_seq(dsi, 0xE7, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0xE8, 0xFA);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x12);
> - mipi_dsi_dcs_write_seq(dsi, 0x87, 0x2C);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x05);
> - mipi_dsi_dcs_write_seq(dsi, 0x73, 0xE5);
> - mipi_dsi_dcs_write_seq(dsi, 0x7F, 0x6B);
> - mipi_dsi_dcs_write_seq(dsi, 0x6D, 0xA4);
> - mipi_dsi_dcs_write_seq(dsi, 0x79, 0x54);
> - mipi_dsi_dcs_write_seq(dsi, 0x69, 0x97);
> - mipi_dsi_dcs_write_seq(dsi, 0x6A, 0x97);
> - mipi_dsi_dcs_write_seq(dsi, 0xA5, 0x3F);
> - mipi_dsi_dcs_write_seq(dsi, 0x61, 0xDA);
> - mipi_dsi_dcs_write_seq(dsi, 0xA7, 0xF1);
> - mipi_dsi_dcs_write_seq(dsi, 0x5F, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x62, 0x3F);
> - mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x90);
> - mipi_dsi_dcs_write_seq(dsi, 0x86, 0x87);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x06);
> - mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x80);
> - mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x58);
> - mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0xCE, 0x58);
> - mipi_dsi_dcs_write_seq(dsi, 0xCF, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x67, 0x60);
> - mipi_dsi_dcs_write_seq(dsi, 0x10, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x92, 0x22);
> - mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x08);
> - mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x55);
> - mipi_dsi_dcs_write_seq(dsi, 0xDC, 0x38);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x08);
> - mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79,
> - 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD,
> - 0xD5, 0xE2, 0xE8);
> - mipi_dsi_dcs_write_seq(dsi, 0xE1, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79,
> - 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD,
> - 0xD5, 0xE2, 0xE8);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x04);
> - mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x81);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0C);
> - mipi_dsi_dcs_write_seq(dsi, 0x00, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x01, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x02, 0x03);
> - mipi_dsi_dcs_write_seq(dsi, 0x03, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0x04, 0x03);
> - mipi_dsi_dcs_write_seq(dsi, 0x05, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x06, 0x04);
> - mipi_dsi_dcs_write_seq(dsi, 0x07, 0x03);
> - mipi_dsi_dcs_write_seq(dsi, 0x08, 0x03);
> - mipi_dsi_dcs_write_seq(dsi, 0x09, 0x04);
> - mipi_dsi_dcs_write_seq(dsi, 0x0A, 0x04);
> - mipi_dsi_dcs_write_seq(dsi, 0x0B, 0x05);
> - mipi_dsi_dcs_write_seq(dsi, 0x0C, 0x04);
> - mipi_dsi_dcs_write_seq(dsi, 0x0D, 0x06);
> - mipi_dsi_dcs_write_seq(dsi, 0x0E, 0x05);
> - mipi_dsi_dcs_write_seq(dsi, 0x0F, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x10, 0x04);
> - mipi_dsi_dcs_write_seq(dsi, 0x11, 0x08);
> - mipi_dsi_dcs_write_seq(dsi, 0x12, 0x05);
> - mipi_dsi_dcs_write_seq(dsi, 0x13, 0x09);
> - mipi_dsi_dcs_write_seq(dsi, 0x14, 0x05);
> - mipi_dsi_dcs_write_seq(dsi, 0x15, 0x0A);
> - mipi_dsi_dcs_write_seq(dsi, 0x16, 0x06);
> - mipi_dsi_dcs_write_seq(dsi, 0x17, 0x0B);
> - mipi_dsi_dcs_write_seq(dsi, 0x18, 0x05);
> - mipi_dsi_dcs_write_seq(dsi, 0x19, 0x0C);
> - mipi_dsi_dcs_write_seq(dsi, 0x1A, 0x06);
> - mipi_dsi_dcs_write_seq(dsi, 0x1B, 0x0D);
> - mipi_dsi_dcs_write_seq(dsi, 0x1C, 0x06);
> - mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x0E);
> - mipi_dsi_dcs_write_seq(dsi, 0x1E, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x1F, 0x0F);
> - mipi_dsi_dcs_write_seq(dsi, 0x20, 0x06);
> - mipi_dsi_dcs_write_seq(dsi, 0x21, 0x10);
> - mipi_dsi_dcs_write_seq(dsi, 0x22, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x23, 0x11);
> - mipi_dsi_dcs_write_seq(dsi, 0x24, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x25, 0x12);
> - mipi_dsi_dcs_write_seq(dsi, 0x26, 0x08);
> - mipi_dsi_dcs_write_seq(dsi, 0x27, 0x13);
> - mipi_dsi_dcs_write_seq(dsi, 0x28, 0x07);
> - mipi_dsi_dcs_write_seq(dsi, 0x29, 0x14);
> - mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x08);
> - mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x15);
> - mipi_dsi_dcs_write_seq(dsi, 0x2C, 0x08);
> - mipi_dsi_dcs_write_seq(dsi, 0x2D, 0x16);
> - mipi_dsi_dcs_write_seq(dsi, 0x2E, 0x09);
> - mipi_dsi_dcs_write_seq(dsi, 0x2F, 0x17);
> - mipi_dsi_dcs_write_seq(dsi, 0x30, 0x08);
> - mipi_dsi_dcs_write_seq(dsi, 0x31, 0x18);
> - mipi_dsi_dcs_write_seq(dsi, 0x32, 0x09);
> - mipi_dsi_dcs_write_seq(dsi, 0x33, 0x19);
> - mipi_dsi_dcs_write_seq(dsi, 0x34, 0x09);
> - mipi_dsi_dcs_write_seq(dsi, 0x35, 0x1A);
> - mipi_dsi_dcs_write_seq(dsi, 0x36, 0x0A);
> - mipi_dsi_dcs_write_seq(dsi, 0x37, 0x1B);
> - mipi_dsi_dcs_write_seq(dsi, 0x38, 0x0A);
> - mipi_dsi_dcs_write_seq(dsi, 0x39, 0x1C);
> - mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x0A);
> - mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x1D);
> - mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x0A);
> - mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x1E);
> - mipi_dsi_dcs_write_seq(dsi, 0x3E, 0x0A);
> - mipi_dsi_dcs_write_seq(dsi, 0x3F, 0x1F);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x04);
> - mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x01);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0E);
> - mipi_dsi_dcs_write_seq(dsi, 0x02, 0x0C);
> - mipi_dsi_dcs_write_seq(dsi, 0x20, 0x10);
> - mipi_dsi_dcs_write_seq(dsi, 0x25, 0x16);
> - mipi_dsi_dcs_write_seq(dsi, 0x26, 0xE0);
> - mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x29, 0x71);
> - mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x46);
> - mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x1F);
> - mipi_dsi_dcs_write_seq(dsi, 0x2D, 0xC7);
> - mipi_dsi_dcs_write_seq(dsi, 0x31, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x32, 0xDF);
> - mipi_dsi_dcs_write_seq(dsi, 0x33, 0x5A);
> - mipi_dsi_dcs_write_seq(dsi, 0x34, 0xC0);
> - mipi_dsi_dcs_write_seq(dsi, 0x35, 0x5A);
> - mipi_dsi_dcs_write_seq(dsi, 0x36, 0xC0);
> - mipi_dsi_dcs_write_seq(dsi, 0x38, 0x65);
> - mipi_dsi_dcs_write_seq(dsi, 0x80, 0x3E);
> - mipi_dsi_dcs_write_seq(dsi, 0x81, 0xA0);
> - mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x01);
> - mipi_dsi_dcs_write_seq(dsi, 0xB1, 0xCC);
> - mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x12);
> - mipi_dsi_dcs_write_seq(dsi, 0xC2, 0xCC);
> - mipi_dsi_dcs_write_seq(dsi, 0xC3, 0xCC);
> - mipi_dsi_dcs_write_seq(dsi, 0xC4, 0xCC);
> - mipi_dsi_dcs_write_seq(dsi, 0xC5, 0xCC);
> - mipi_dsi_dcs_write_seq(dsi, 0xC6, 0xCC);
> - mipi_dsi_dcs_write_seq(dsi, 0xC7, 0xCC);
> - mipi_dsi_dcs_write_seq(dsi, 0xC8, 0xCC);
> - mipi_dsi_dcs_write_seq(dsi, 0xC9, 0xCC);
> - mipi_dsi_dcs_write_seq(dsi, 0x30, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x00, 0x81);
> - mipi_dsi_dcs_write_seq(dsi, 0x08, 0x02);
> - mipi_dsi_dcs_write_seq(dsi, 0x09, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x07, 0x21);
> - mipi_dsi_dcs_write_seq(dsi, 0x04, 0x10);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x1E);
> - mipi_dsi_dcs_write_seq(dsi, 0x60, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x64, 0x00);
> - mipi_dsi_dcs_write_seq(dsi, 0x6D, 0x00);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0B);
> - mipi_dsi_dcs_write_seq(dsi, 0xA6, 0x44);
> - mipi_dsi_dcs_write_seq(dsi, 0xA7, 0xB6);
> - mipi_dsi_dcs_write_seq(dsi, 0xA8, 0x03);
> - mipi_dsi_dcs_write_seq(dsi, 0xA9, 0x03);
> - mipi_dsi_dcs_write_seq(dsi, 0xAA, 0x51);
> - mipi_dsi_dcs_write_seq(dsi, 0xAB, 0x51);
> - mipi_dsi_dcs_write_seq(dsi, 0xAC, 0x04);
> - mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x92);
> - mipi_dsi_dcs_write_seq(dsi, 0xBE, 0xA1);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x05);
> - mipi_dsi_dcs_write_seq(dsi, 0x86, 0x87);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x06);
> - mipi_dsi_dcs_write_seq(dsi, 0x92, 0x22);
> -
> - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x00);
> -
> - ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
> - if (ret)
> - return ret;
> - msleep(120);
> - ret = mipi_dsi_dcs_set_display_on(dsi);
> - if (ret)
> - return ret;
> - msleep(20);
> -
> - return 0;
> -};
> -
> static inline struct boe_panel *to_boe_panel(struct drm_panel *panel)
> {
> return container_of(panel, struct boe_panel, base);
> @@ -2081,34 +1726,6 @@ static const struct panel_desc starry_himax83102_j02_desc = {
> .lp11_before_reset = true,
> };
>
> -static const struct drm_display_mode starry_ili9882t_default_mode = {
> - .clock = 165280,
> - .hdisplay = 1200,
> - .hsync_start = 1200 + 32,
> - .hsync_end = 1200 + 32 + 30,
> - .htotal = 1200 + 32 + 30 + 32,
> - .vdisplay = 1920,
> - .vsync_start = 1920 + 68,
> - .vsync_end = 1920 + 68 + 2,
> - .vtotal = 1920 + 68 + 2 + 10,
> - .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
> -};
> -
> -static const struct panel_desc starry_ili9882t_desc = {
> - .modes = &starry_ili9882t_default_mode,
> - .bpc = 8,
> - .size = {
> - .width_mm = 141,
> - .height_mm = 226,
> - },
> - .lanes = 4,
> - .format = MIPI_DSI_FMT_RGB888,
> - .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
> - MIPI_DSI_MODE_LPM,
> - .init = starry_ili9882t_init,
> - .lp11_before_reset = true,
> -};
> -
> static int boe_panel_get_modes(struct drm_panel *panel,
> struct drm_connector *connector)
> {
> @@ -2285,9 +1902,6 @@ static const struct of_device_id boe_of_match[] = {
> { .compatible = "starry,himax83102-j02",
> .data = &starry_himax83102_j02_desc
> },
> - { .compatible = "starry,ili9882t",
> - .data = &starry_ili9882t_desc
> - },
> { /* sentinel */ }
> };
> MODULE_DEVICE_TABLE(of, boe_of_match);
> diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
> new file mode 100644
> index 000000000000..20f3cc37fa83
> --- /dev/null
> +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
> @@ -0,0 +1,739 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Panels based on the Ilitek ILI9882T display controller.
> + */
> +#include <linux/delay.h>
> +#include <linux/gpio/consumer.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/regulator/consumer.h>
> +
> +#include <drm/drm_connector.h>
> +#include <drm/drm_crtc.h>
> +#include <drm/drm_mipi_dsi.h>
> +#include <drm/drm_panel.h>
> +
> +#include <video/mipi_display.h>
> +
> +/*
> + * Use this descriptor struct to describe different panels using the
> + * Ilitek ILI9882T display controller.
> + */
> +struct panel_desc {
> + const struct drm_display_mode *modes;
> + unsigned int bpc;
> +
> + /**
> + * @width_mm: width of the panel's active display area
> + * @height_mm: height of the panel's active display area
> + */
> + struct {
> + unsigned int width_mm;
> + unsigned int height_mm;
> + } size;
> +
> + unsigned long mode_flags;
> + enum mipi_dsi_pixel_format format;
> + int (*init)(struct mipi_dsi_device *dsi);
> + unsigned int lanes;
> + bool discharge_on_disable;
> + bool lp11_before_reset;
> +};
> +
> +struct ili9882t {
> + struct drm_panel base;
> + struct mipi_dsi_device *dsi;
> +
> + const struct panel_desc *desc;
> +
> + enum drm_panel_orientation orientation;
> + struct regulator *pp3300;
> + struct regulator *pp1800;
> + struct regulator *avee;
> + struct regulator *avdd;
> + struct gpio_desc *enable_gpio;
> +};
> +
> +static int starry_ili9882t_init(struct mipi_dsi_device *dsi)
> +{
> + int ret;
> +
> + msleep(5);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x00, 0x42);
> + mipi_dsi_dcs_write_seq(dsi, 0x01, 0x11);
> + mipi_dsi_dcs_write_seq(dsi, 0x02, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x03, 0x00);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x04, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x05, 0x11);
> + mipi_dsi_dcs_write_seq(dsi, 0x06, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x07, 0x00);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x08, 0x80);
> + mipi_dsi_dcs_write_seq(dsi, 0x09, 0x81);
> + mipi_dsi_dcs_write_seq(dsi, 0x0A, 0x71);
> + mipi_dsi_dcs_write_seq(dsi, 0x0B, 0x00);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x0C, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x0E, 0x1A);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x24, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x25, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x26, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x2C, 0xD4);
> + mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x40);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x11);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x32);
> + mipi_dsi_dcs_write_seq(dsi, 0xD1, 0x30);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x55);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xD0, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0xE3, 0x93);
> + mipi_dsi_dcs_write_seq(dsi, 0xE4, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x80);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x31, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x32, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x33, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x34, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x35, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x36, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x37, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x38, 0x28);
> + mipi_dsi_dcs_write_seq(dsi, 0x39, 0x29);
> + mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x11);
> + mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x13);
> + mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x15);
> + mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x17);
> + mipi_dsi_dcs_write_seq(dsi, 0x3E, 0x09);
> + mipi_dsi_dcs_write_seq(dsi, 0x3F, 0x0D);
> + mipi_dsi_dcs_write_seq(dsi, 0x40, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x41, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x42, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x43, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x44, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x45, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x46, 0x02);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x47, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x48, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x49, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x4A, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x4B, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x4C, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x4D, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x4E, 0x28);
> + mipi_dsi_dcs_write_seq(dsi, 0x4F, 0x29);
> + mipi_dsi_dcs_write_seq(dsi, 0x50, 0x10);
> + mipi_dsi_dcs_write_seq(dsi, 0x51, 0x12);
> + mipi_dsi_dcs_write_seq(dsi, 0x52, 0x14);
> + mipi_dsi_dcs_write_seq(dsi, 0x53, 0x16);
> + mipi_dsi_dcs_write_seq(dsi, 0x54, 0x08);
> + mipi_dsi_dcs_write_seq(dsi, 0x55, 0x0C);
> + mipi_dsi_dcs_write_seq(dsi, 0x56, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x57, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x58, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x59, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x5A, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x5B, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x5C, 0x02);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x61, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x62, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x63, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x64, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x65, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x66, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x67, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x68, 0x28);
> + mipi_dsi_dcs_write_seq(dsi, 0x69, 0x29);
> + mipi_dsi_dcs_write_seq(dsi, 0x6A, 0x16);
> + mipi_dsi_dcs_write_seq(dsi, 0x6B, 0x14);
> + mipi_dsi_dcs_write_seq(dsi, 0x6C, 0x12);
> + mipi_dsi_dcs_write_seq(dsi, 0x6D, 0x10);
> + mipi_dsi_dcs_write_seq(dsi, 0x6E, 0x0C);
> + mipi_dsi_dcs_write_seq(dsi, 0x6F, 0x08);
> + mipi_dsi_dcs_write_seq(dsi, 0x70, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x71, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x72, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x73, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x74, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x75, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x76, 0x02);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x77, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x78, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x79, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x7A, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x7B, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x7C, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x7D, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x7E, 0x28);
> + mipi_dsi_dcs_write_seq(dsi, 0x7F, 0x29);
> + mipi_dsi_dcs_write_seq(dsi, 0x80, 0x17);
> + mipi_dsi_dcs_write_seq(dsi, 0x81, 0x15);
> + mipi_dsi_dcs_write_seq(dsi, 0x82, 0x13);
> + mipi_dsi_dcs_write_seq(dsi, 0x83, 0x11);
> + mipi_dsi_dcs_write_seq(dsi, 0x84, 0x0D);
> + mipi_dsi_dcs_write_seq(dsi, 0x85, 0x09);
> + mipi_dsi_dcs_write_seq(dsi, 0x86, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x87, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x88, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x89, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x8A, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x8B, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x8C, 0x07);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x29, 0x3A);
> + mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x3B);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x06, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x07, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x08, 0x0C);
> + mipi_dsi_dcs_write_seq(dsi, 0x09, 0x44);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x0A);
> + mipi_dsi_dcs_write_seq(dsi, 0x39, 0x11);
> + mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x0C);
> + mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x44);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0x53, 0x1F);
> + mipi_dsi_dcs_write_seq(dsi, 0x5E, 0x40);
> + mipi_dsi_dcs_write_seq(dsi, 0x84, 0x00);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x03);
> + mipi_dsi_dcs_write_seq(dsi, 0x20, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x21, 0x3C);
> + mipi_dsi_dcs_write_seq(dsi, 0x22, 0xFA);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0A);
> + mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0xE2, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x91);
> + mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x3C);
> + mipi_dsi_dcs_write_seq(dsi, 0xE7, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0xE8, 0xFA);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x12);
> + mipi_dsi_dcs_write_seq(dsi, 0x87, 0x2C);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x05);
> + mipi_dsi_dcs_write_seq(dsi, 0x73, 0xE5);
> + mipi_dsi_dcs_write_seq(dsi, 0x7F, 0x6B);
> + mipi_dsi_dcs_write_seq(dsi, 0x6D, 0xA4);
> + mipi_dsi_dcs_write_seq(dsi, 0x79, 0x54);
> + mipi_dsi_dcs_write_seq(dsi, 0x69, 0x97);
> + mipi_dsi_dcs_write_seq(dsi, 0x6A, 0x97);
> + mipi_dsi_dcs_write_seq(dsi, 0xA5, 0x3F);
> + mipi_dsi_dcs_write_seq(dsi, 0x61, 0xDA);
> + mipi_dsi_dcs_write_seq(dsi, 0xA7, 0xF1);
> + mipi_dsi_dcs_write_seq(dsi, 0x5F, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x62, 0x3F);
> + mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x90);
> + mipi_dsi_dcs_write_seq(dsi, 0x86, 0x87);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x06);
> + mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x80);
> + mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x58);
> + mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0xCE, 0x58);
> + mipi_dsi_dcs_write_seq(dsi, 0xCF, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x67, 0x60);
> + mipi_dsi_dcs_write_seq(dsi, 0x10, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x92, 0x22);
> + mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x08);
> + mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x55);
> + mipi_dsi_dcs_write_seq(dsi, 0xDC, 0x38);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x08);
> + mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79,
> + 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD,
> + 0xD5, 0xE2, 0xE8);
> + mipi_dsi_dcs_write_seq(dsi, 0xE1, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79,
> + 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD,
> + 0xD5, 0xE2, 0xE8);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x81);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0C);
> + mipi_dsi_dcs_write_seq(dsi, 0x00, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x01, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x02, 0x03);
> + mipi_dsi_dcs_write_seq(dsi, 0x03, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0x04, 0x03);
> + mipi_dsi_dcs_write_seq(dsi, 0x05, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x06, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0x07, 0x03);
> + mipi_dsi_dcs_write_seq(dsi, 0x08, 0x03);
> + mipi_dsi_dcs_write_seq(dsi, 0x09, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0x0A, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0x0B, 0x05);
> + mipi_dsi_dcs_write_seq(dsi, 0x0C, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0x0D, 0x06);
> + mipi_dsi_dcs_write_seq(dsi, 0x0E, 0x05);
> + mipi_dsi_dcs_write_seq(dsi, 0x0F, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x10, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0x11, 0x08);
> + mipi_dsi_dcs_write_seq(dsi, 0x12, 0x05);
> + mipi_dsi_dcs_write_seq(dsi, 0x13, 0x09);
> + mipi_dsi_dcs_write_seq(dsi, 0x14, 0x05);
> + mipi_dsi_dcs_write_seq(dsi, 0x15, 0x0A);
> + mipi_dsi_dcs_write_seq(dsi, 0x16, 0x06);
> + mipi_dsi_dcs_write_seq(dsi, 0x17, 0x0B);
> + mipi_dsi_dcs_write_seq(dsi, 0x18, 0x05);
> + mipi_dsi_dcs_write_seq(dsi, 0x19, 0x0C);
> + mipi_dsi_dcs_write_seq(dsi, 0x1A, 0x06);
> + mipi_dsi_dcs_write_seq(dsi, 0x1B, 0x0D);
> + mipi_dsi_dcs_write_seq(dsi, 0x1C, 0x06);
> + mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x0E);
> + mipi_dsi_dcs_write_seq(dsi, 0x1E, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x1F, 0x0F);
> + mipi_dsi_dcs_write_seq(dsi, 0x20, 0x06);
> + mipi_dsi_dcs_write_seq(dsi, 0x21, 0x10);
> + mipi_dsi_dcs_write_seq(dsi, 0x22, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x23, 0x11);
> + mipi_dsi_dcs_write_seq(dsi, 0x24, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x25, 0x12);
> + mipi_dsi_dcs_write_seq(dsi, 0x26, 0x08);
> + mipi_dsi_dcs_write_seq(dsi, 0x27, 0x13);
> + mipi_dsi_dcs_write_seq(dsi, 0x28, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0x29, 0x14);
> + mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x08);
> + mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x15);
> + mipi_dsi_dcs_write_seq(dsi, 0x2C, 0x08);
> + mipi_dsi_dcs_write_seq(dsi, 0x2D, 0x16);
> + mipi_dsi_dcs_write_seq(dsi, 0x2E, 0x09);
> + mipi_dsi_dcs_write_seq(dsi, 0x2F, 0x17);
> + mipi_dsi_dcs_write_seq(dsi, 0x30, 0x08);
> + mipi_dsi_dcs_write_seq(dsi, 0x31, 0x18);
> + mipi_dsi_dcs_write_seq(dsi, 0x32, 0x09);
> + mipi_dsi_dcs_write_seq(dsi, 0x33, 0x19);
> + mipi_dsi_dcs_write_seq(dsi, 0x34, 0x09);
> + mipi_dsi_dcs_write_seq(dsi, 0x35, 0x1A);
> + mipi_dsi_dcs_write_seq(dsi, 0x36, 0x0A);
> + mipi_dsi_dcs_write_seq(dsi, 0x37, 0x1B);
> + mipi_dsi_dcs_write_seq(dsi, 0x38, 0x0A);
> + mipi_dsi_dcs_write_seq(dsi, 0x39, 0x1C);
> + mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x0A);
> + mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x1D);
> + mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x0A);
> + mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x1E);
> + mipi_dsi_dcs_write_seq(dsi, 0x3E, 0x0A);
> + mipi_dsi_dcs_write_seq(dsi, 0x3F, 0x1F);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x01);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0E);
> + mipi_dsi_dcs_write_seq(dsi, 0x02, 0x0C);
> + mipi_dsi_dcs_write_seq(dsi, 0x20, 0x10);
> + mipi_dsi_dcs_write_seq(dsi, 0x25, 0x16);
> + mipi_dsi_dcs_write_seq(dsi, 0x26, 0xE0);
> + mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x29, 0x71);
> + mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x46);
> + mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x1F);
> + mipi_dsi_dcs_write_seq(dsi, 0x2D, 0xC7);
> + mipi_dsi_dcs_write_seq(dsi, 0x31, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x32, 0xDF);
> + mipi_dsi_dcs_write_seq(dsi, 0x33, 0x5A);
> + mipi_dsi_dcs_write_seq(dsi, 0x34, 0xC0);
> + mipi_dsi_dcs_write_seq(dsi, 0x35, 0x5A);
> + mipi_dsi_dcs_write_seq(dsi, 0x36, 0xC0);
> + mipi_dsi_dcs_write_seq(dsi, 0x38, 0x65);
> + mipi_dsi_dcs_write_seq(dsi, 0x80, 0x3E);
> + mipi_dsi_dcs_write_seq(dsi, 0x81, 0xA0);
> + mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, 0xB1, 0xCC);
> + mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x12);
> + mipi_dsi_dcs_write_seq(dsi, 0xC2, 0xCC);
> + mipi_dsi_dcs_write_seq(dsi, 0xC3, 0xCC);
> + mipi_dsi_dcs_write_seq(dsi, 0xC4, 0xCC);
> + mipi_dsi_dcs_write_seq(dsi, 0xC5, 0xCC);
> + mipi_dsi_dcs_write_seq(dsi, 0xC6, 0xCC);
> + mipi_dsi_dcs_write_seq(dsi, 0xC7, 0xCC);
> + mipi_dsi_dcs_write_seq(dsi, 0xC8, 0xCC);
> + mipi_dsi_dcs_write_seq(dsi, 0xC9, 0xCC);
> + mipi_dsi_dcs_write_seq(dsi, 0x30, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x00, 0x81);
> + mipi_dsi_dcs_write_seq(dsi, 0x08, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0x09, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x07, 0x21);
> + mipi_dsi_dcs_write_seq(dsi, 0x04, 0x10);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x1E);
> + mipi_dsi_dcs_write_seq(dsi, 0x60, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x64, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x6D, 0x00);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0B);
> + mipi_dsi_dcs_write_seq(dsi, 0xA6, 0x44);
> + mipi_dsi_dcs_write_seq(dsi, 0xA7, 0xB6);
> + mipi_dsi_dcs_write_seq(dsi, 0xA8, 0x03);
> + mipi_dsi_dcs_write_seq(dsi, 0xA9, 0x03);
> + mipi_dsi_dcs_write_seq(dsi, 0xAA, 0x51);
> + mipi_dsi_dcs_write_seq(dsi, 0xAB, 0x51);
> + mipi_dsi_dcs_write_seq(dsi, 0xAC, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x92);
> + mipi_dsi_dcs_write_seq(dsi, 0xBE, 0xA1);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x05);
> + mipi_dsi_dcs_write_seq(dsi, 0x86, 0x87);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x06);
> + mipi_dsi_dcs_write_seq(dsi, 0x92, 0x22);
> +
> + mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x00);
> +
> + ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
> + if (ret)
> + return ret;
> + msleep(120);
> + ret = mipi_dsi_dcs_set_display_on(dsi);
> + if (ret)
> + return ret;
> + msleep(20);
> +
> + return 0;
> +};
> +
> +static inline struct ili9882t *to_ili9882t(struct drm_panel *panel)
> +{
> + return container_of(panel, struct ili9882t, base);
> +}
> +
> +static int ili9882t_enter_sleep_mode(struct ili9882t *ili)
> +{
> + struct mipi_dsi_device *dsi = ili->dsi;
> + int ret;
> +
> + dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
> +
> + ret = mipi_dsi_dcs_set_display_off(dsi);
> + if (ret < 0)
> + return ret;
> +
> + ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
> + if (ret < 0)
> + return ret;
> +
> + return 0;
> +}
> +
> +static int ili9882t_disable(struct drm_panel *panel)
> +{
> + struct ili9882t *ili = to_ili9882t(panel);
> + int ret;
> +
> + ret = ili9882t_enter_sleep_mode(ili);
> + if (ret < 0) {
> + dev_err(panel->dev, "failed to set panel off: %d\n", ret);
> + return ret;
> + }
> +
> + msleep(150);
> +
> + return 0;
> +}
> +
> +static int ili9882t_unprepare(struct drm_panel *panel)
> +{
> + struct ili9882t *ili = to_ili9882t(panel);
> +
> + if (ili->desc->discharge_on_disable) {
> + regulator_disable(ili->avee);
> + regulator_disable(ili->avdd);
> + usleep_range(5000, 7000);
> + gpiod_set_value(ili->enable_gpio, 0);
> + usleep_range(5000, 7000);
> + regulator_disable(ili->pp1800);
> + regulator_disable(ili->pp3300);
> + } else {
> + gpiod_set_value(ili->enable_gpio, 0);
> + usleep_range(1000, 2000);
> + regulator_disable(ili->avee);
> + regulator_disable(ili->avdd);
> + usleep_range(5000, 7000);
> + regulator_disable(ili->pp1800);
> + regulator_disable(ili->pp3300);
> + }
> +
> + return 0;
> +}
> +
> +static int ili9882t_prepare(struct drm_panel *panel)
> +{
> + struct ili9882t *ili = to_ili9882t(panel);
> + int ret;
> +
> + gpiod_set_value(ili->enable_gpio, 0);
> + usleep_range(1000, 1500);
> +
> + ret = regulator_enable(ili->pp3300);
> + if (ret < 0)
> + return ret;
> +
> + ret = regulator_enable(ili->pp1800);
> + if (ret < 0)
> + return ret;
> +
> + usleep_range(3000, 5000);
> +
> + ret = regulator_enable(ili->avdd);
> + if (ret < 0)
> + goto poweroff1v8;
> + ret = regulator_enable(ili->avee);
> + if (ret < 0)
> + goto poweroffavdd;
> +
> + usleep_range(10000, 11000);
> +
> + if (ili->desc->lp11_before_reset) {
> + mipi_dsi_dcs_nop(ili->dsi);
> + usleep_range(1000, 2000);
> + }
> + gpiod_set_value(ili->enable_gpio, 1);
> + usleep_range(1000, 2000);
> + gpiod_set_value(ili->enable_gpio, 0);
> + usleep_range(1000, 2000);
Can the RST delay be increased to 40ms-50ms?
At present, we have found that there may be a problem of blurred
screen during fast sleep. The direct cause of the blurred screen
is that the IC does not receive 0x28/0x10. Because of the
particularity of the IC, before the panel enters sleep hid must
stop scanning, i2c_hid_core_suspend before ili9882t_disable.
This doesn't look very spec-compliant. So in order to solve this
problem, the IC can handle it through the exception mechanism when
it cannot receive 0X28/0X10. Handling exceptions requires a reset
50ms delay. Refer to vendor detailed analysis [1].
[1]: https://github.com/ILITEK-LoganLin/Document/tree/main/ILITEK_Power_Sequence
Looking forward for your reply, thank you.
> + gpiod_set_value(ili->enable_gpio, 1);
> + usleep_range(6000, 10000);
> +
> + if (ili->desc->init) {
> + ret = ili->desc->init(ili->dsi);
> + if (ret < 0) {
> + dev_err(panel->dev, "failed to init panel: %d\n", ret);
> + goto poweroff;
> + }
> + }
> +
> + return 0;
> +
> +poweroff:
> + regulator_disable(ili->avee);
> +poweroffavdd:
> + regulator_disable(ili->avdd);
> +poweroff1v8:
> + usleep_range(5000, 7000);
> + regulator_disable(ili->pp1800);
> + gpiod_set_value(ili->enable_gpio, 0);
> +
> + return ret;
> +}
> +
> +static int ili9882t_enable(struct drm_panel *panel)
> +{
> + msleep(130);
> + return 0;
> +}
> +
> +static const struct drm_display_mode starry_ili9882t_default_mode = {
> + .clock = 165280,
> + .hdisplay = 1200,
> + .hsync_start = 1200 + 32,
> + .hsync_end = 1200 + 32 + 30,
> + .htotal = 1200 + 32 + 30 + 32,
> + .vdisplay = 1920,
> + .vsync_start = 1920 + 68,
> + .vsync_end = 1920 + 68 + 2,
> + .vtotal = 1920 + 68 + 2 + 10,
> + .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
> +};
> +
> +static const struct panel_desc starry_ili9882t_desc = {
> + .modes = &starry_ili9882t_default_mode,
> + .bpc = 8,
> + .size = {
> + .width_mm = 141,
> + .height_mm = 226,
> + },
> + .lanes = 4,
> + .format = MIPI_DSI_FMT_RGB888,
> + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
> + MIPI_DSI_MODE_LPM,
> + .init = starry_ili9882t_init,
> + .lp11_before_reset = true,
> +};
> +
> +static int ili9882t_get_modes(struct drm_panel *panel,
> + struct drm_connector *connector)
> +{
> + struct ili9882t *ili = to_ili9882t(panel);
> + const struct drm_display_mode *m = ili->desc->modes;
> + struct drm_display_mode *mode;
> +
> + mode = drm_mode_duplicate(connector->dev, m);
> + if (!mode) {
> + dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
> + m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
> + return -ENOMEM;
> + }
> +
> + mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
> + drm_mode_set_name(mode);
> + drm_mode_probed_add(connector, mode);
> +
> + connector->display_info.width_mm = ili->desc->size.width_mm;
> + connector->display_info.height_mm = ili->desc->size.height_mm;
> + connector->display_info.bpc = ili->desc->bpc;
> + /*
> + * TODO: Remove once all drm drivers call
> + * drm_connector_set_orientation_from_panel()
> + */
> + drm_connector_set_panel_orientation(connector, ili->orientation);
> +
> + return 1;
> +}
> +
> +static enum drm_panel_orientation ili9882t_get_orientation(struct drm_panel *panel)
> +{
> + struct ili9882t *ili = to_ili9882t(panel);
> +
> + return ili->orientation;
> +}
> +
> +static const struct drm_panel_funcs ili9882t_funcs = {
> + .disable = ili9882t_disable,
> + .unprepare = ili9882t_unprepare,
> + .prepare = ili9882t_prepare,
> + .enable = ili9882t_enable,
> + .get_modes = ili9882t_get_modes,
> + .get_orientation = ili9882t_get_orientation,
> +};
> +
> +static int ili9882t_add(struct ili9882t *ili)
> +{
> + struct device *dev = &ili->dsi->dev;
> + int err;
> +
> + ili->avdd = devm_regulator_get(dev, "avdd");
> + if (IS_ERR(ili->avdd))
> + return PTR_ERR(ili->avdd);
> +
> + ili->avee = devm_regulator_get(dev, "avee");
> + if (IS_ERR(ili->avee))
> + return PTR_ERR(ili->avee);
> +
> + ili->pp3300 = devm_regulator_get(dev, "pp3300");
> + if (IS_ERR(ili->pp3300))
> + return PTR_ERR(ili->pp3300);
> +
> + ili->pp1800 = devm_regulator_get(dev, "pp1800");
> + if (IS_ERR(ili->pp1800))
> + return PTR_ERR(ili->pp1800);
> +
> + ili->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW);
> + if (IS_ERR(ili->enable_gpio)) {
> + dev_err(dev, "cannot get reset-gpios %ld\n",
> + PTR_ERR(ili->enable_gpio));
> + return PTR_ERR(ili->enable_gpio);
> + }
> +
> + gpiod_set_value(ili->enable_gpio, 0);
> +
> + drm_panel_init(&ili->base, dev, &ili9882t_funcs,
> + DRM_MODE_CONNECTOR_DSI);
> + err = of_drm_get_panel_orientation(dev->of_node, &ili->orientation);
> + if (err < 0) {
> + dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err);
> + return err;
> + }
> +
> + err = drm_panel_of_backlight(&ili->base);
> + if (err)
> + return err;
> +
> + ili->base.funcs = &ili9882t_funcs;
> + ili->base.dev = &ili->dsi->dev;
> +
> + drm_panel_add(&ili->base);
> +
> + return 0;
> +}
> +
> +static int ili9882t_probe(struct mipi_dsi_device *dsi)
> +{
> + struct ili9882t *ili;
> + int ret;
> + const struct panel_desc *desc;
> +
> + ili = devm_kzalloc(&dsi->dev, sizeof(*ili), GFP_KERNEL);
> + if (!ili)
> + return -ENOMEM;
> +
> + desc = of_device_get_match_data(&dsi->dev);
> + dsi->lanes = desc->lanes;
> + dsi->format = desc->format;
> + dsi->mode_flags = desc->mode_flags;
> + ili->desc = desc;
> + ili->dsi = dsi;
> + ret = ili9882t_add(ili);
> + if (ret < 0)
> + return ret;
> +
> + mipi_dsi_set_drvdata(dsi, ili);
> +
> + ret = mipi_dsi_attach(dsi);
> + if (ret)
> + drm_panel_remove(&ili->base);
> +
> + return ret;
> +}
> +
> +static void ili9882t_shutdown(struct mipi_dsi_device *dsi)
> +{
> + struct ili9882t *ili = mipi_dsi_get_drvdata(dsi);
> +
> + drm_panel_disable(&ili->base);
> + drm_panel_unprepare(&ili->base);
> +}
> +
> +static void ili9882t_remove(struct mipi_dsi_device *dsi)
> +{
> + struct ili9882t *ili = mipi_dsi_get_drvdata(dsi);
> + int ret;
> +
> + ili9882t_shutdown(dsi);
> +
> + ret = mipi_dsi_detach(dsi);
> + if (ret < 0)
> + dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret);
> +
> + if (ili->base.dev)
> + drm_panel_remove(&ili->base);
> +}
> +
> +static const struct of_device_id ili9882t_of_match[] = {
> + { .compatible = "starry,ili9882t",
> + .data = &starry_ili9882t_desc
> + },
> + { /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, ili9882t_of_match);
> +
> +static struct mipi_dsi_driver ili9882t_driver = {
> + .driver = {
> + .name = "panel-ili9882t",
> + .of_match_table = ili9882t_of_match,
> + },
> + .probe = ili9882t_probe,
> + .remove = ili9882t_remove,
> + .shutdown = ili9882t_shutdown,
> +};
> +module_mipi_dsi_driver(ili9882t_driver);
> +
> +MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>");
> +MODULE_DESCRIPTION("Ilitek ILI9882T-based panels driver");
> +MODULE_LICENSE("GPL");
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v3 0/4] Fix up the boe-tv101wum-nl6 panel driver
2023-07-03 13:21 [PATCH v3 0/4] Fix up the boe-tv101wum-nl6 panel driver Linus Walleij
` (4 preceding siblings ...)
2023-07-04 10:03 ` [PATCH v3 0/4] Fix up the boe-tv101wum-nl6 panel driver cong yang
@ 2023-09-18 16:19 ` Doug Anderson
2023-09-26 21:49 ` Doug Anderson
5 siblings, 1 reply; 19+ messages in thread
From: Doug Anderson @ 2023-09-18 16:19 UTC (permalink / raw)
To: Linus Walleij
Cc: Neil Armstrong, Jitao Shi, Cong Yang, linux-kernel, dri-devel,
Stephen Boyd, Ruihai Zhou, Sam Ravnborg
Hi,
On Mon, Jul 3, 2023 at 6:21 AM Linus Walleij <linus.walleij@linaro.org> wrote:
>
> This is two patches fixing things I would normally complain about
> in reviews, but alas I missed this one, so I go in and fix it up
> myself.
>
> Discovering that a completely unrelated driver has been merged
> into this panel driver I had to bite the bullet and break it out.
> I am pretty suspicious of the other recently added panel as well.
>
> I am surprised that contributors from manufacturers do not seem
> to have datasheets for the display controllers embedded in the
> panels of their products. Can you take a second look?
>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> Changes in v3:
> - Rebase on drm-misc-next
> - Convert the two newly added Starry panels as well.
> - Break out the obvious ILI9882t-based panel into its own driver.
> - Link to v2: https://lore.kernel.org/r/20230615-fix-boe-tv101wum-nl6-v2-0-457d7ece4590@linaro.org
>
> Changes in v2:
> - Fix a missed static keyword
> - Link to v1: https://lore.kernel.org/r/20230615-fix-boe-tv101wum-nl6-v1-0-8ac378405fb7@linaro.org
>
> ---
> Linus Walleij (4):
> drm/panel: boe-tv101wum-nl6: Drop macros and open code sequences
> drm/panel: boe-tv101wum-nl6: Drop surplus prepare tracking
> drm/panel: ili9882t: Break out as separate driver
> drm/panel: ili9882t: Break out function for switching page
>
> drivers/gpu/drm/panel/Kconfig | 9 +
> drivers/gpu/drm/panel/Makefile | 1 +
> drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 3037 ++++++++++--------------
> drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 759 ++++++
> 4 files changed, 2067 insertions(+), 1739 deletions(-)
I'm curious what the latest on this patch series is. Is it abandoned,
or is it still on your list to move forward with it? If it's
abandoned, does that mean we've abandoned the idea of breaking
ili9882t into a separate driver?
From looking at things that have landed downstream in the ChromeOS
kernel trees it looks as if additional fixes are getting blocked from
being posted/landed because of the limbo state that this is in.
-Doug
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v3 0/4] Fix up the boe-tv101wum-nl6 panel driver
2023-09-18 16:19 ` Doug Anderson
@ 2023-09-26 21:49 ` Doug Anderson
2023-09-28 21:42 ` Linus Walleij
0 siblings, 1 reply; 19+ messages in thread
From: Doug Anderson @ 2023-09-26 21:49 UTC (permalink / raw)
To: Linus Walleij
Cc: Neil Armstrong, Jitao Shi, Cong Yang, linux-kernel, dri-devel,
Stephen Boyd, Ruihai Zhou, Sam Ravnborg
Hi,
On Mon, Sep 18, 2023 at 9:19 AM Doug Anderson <dianders@chromium.org> wrote:
>
> Hi,
>
> On Mon, Jul 3, 2023 at 6:21 AM Linus Walleij <linus.walleij@linaro.org> wrote:
> >
> > This is two patches fixing things I would normally complain about
> > in reviews, but alas I missed this one, so I go in and fix it up
> > myself.
> >
> > Discovering that a completely unrelated driver has been merged
> > into this panel driver I had to bite the bullet and break it out.
> > I am pretty suspicious of the other recently added panel as well.
> >
> > I am surprised that contributors from manufacturers do not seem
> > to have datasheets for the display controllers embedded in the
> > panels of their products. Can you take a second look?
> >
> > Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> > ---
> > Changes in v3:
> > - Rebase on drm-misc-next
> > - Convert the two newly added Starry panels as well.
> > - Break out the obvious ILI9882t-based panel into its own driver.
> > - Link to v2: https://lore.kernel.org/r/20230615-fix-boe-tv101wum-nl6-v2-0-457d7ece4590@linaro.org
> >
> > Changes in v2:
> > - Fix a missed static keyword
> > - Link to v1: https://lore.kernel.org/r/20230615-fix-boe-tv101wum-nl6-v1-0-8ac378405fb7@linaro.org
> >
> > ---
> > Linus Walleij (4):
> > drm/panel: boe-tv101wum-nl6: Drop macros and open code sequences
> > drm/panel: boe-tv101wum-nl6: Drop surplus prepare tracking
> > drm/panel: ili9882t: Break out as separate driver
> > drm/panel: ili9882t: Break out function for switching page
> >
> > drivers/gpu/drm/panel/Kconfig | 9 +
> > drivers/gpu/drm/panel/Makefile | 1 +
> > drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 3037 ++++++++++--------------
> > drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 759 ++++++
> > 4 files changed, 2067 insertions(+), 1739 deletions(-)
>
> I'm curious what the latest on this patch series is. Is it abandoned,
> or is it still on your list to move forward with it? If it's
> abandoned, does that mean we've abandoned the idea of breaking
> ili9882t into a separate driver?
>
> From looking at things that have landed downstream in the ChromeOS
> kernel trees it looks as if additional fixes are getting blocked from
> being posted/landed because of the limbo state that this is in.
I presume Linus is busy or otherwise indisposed.
So I guess we have two options here:
a) Cong Yang can post any relevant fixes to the existing "monolithic"
panel driver so that we can get them landed and at least get things
fixed.
- or -
b) Cong Yang could take over all or some of Linus's series and post
new versions of it, addressing feedback.
I would tend to say we should go with "a)" because I think Linus needs
to be involved in some of the cleanup discussions.
-Doug
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v3 0/4] Fix up the boe-tv101wum-nl6 panel driver
2023-09-26 21:49 ` Doug Anderson
@ 2023-09-28 21:42 ` Linus Walleij
2023-09-29 14:17 ` Doug Anderson
0 siblings, 1 reply; 19+ messages in thread
From: Linus Walleij @ 2023-09-28 21:42 UTC (permalink / raw)
To: Doug Anderson
Cc: Neil Armstrong, Jitao Shi, Cong Yang, linux-kernel, dri-devel,
Stephen Boyd, Ruihai Zhou, Sam Ravnborg
On Tue, Sep 26, 2023 at 11:49 PM Doug Anderson <dianders@chromium.org> wrote:
> > I'm curious what the latest on this patch series is. Is it abandoned,
> > or is it still on your list to move forward with it? If it's
> > abandoned, does that mean we've abandoned the idea of breaking
> > ili9882t into a separate driver?
> >
> > From looking at things that have landed downstream in the ChromeOS
> > kernel trees it looks as if additional fixes are getting blocked from
> > being posted/landed because of the limbo state that this is in.
>
> I presume Linus is busy or otherwise indisposed.
Sorry I was looking for the branch with my patches and I have it
somewhere not ordinary :/
Originally I shelved it because I got requests to do additional
patches to the driver:
https://lore.kernel.org/dri-devel/CAD=FV=Xkr3Qpd8m_6Xta_2jL_ezbxsmMyarbKXTXL+UJLG9xNw@mail.gmail.com/
To do measurements about binary code size in object files, and if it does,
then I need to invent new sequence macros (IIUC):
https://lore.kernel.org/dri-devel/CAD=FV=Wju3WS45=EpXMUg7FjYDh3-=mvm_jS7TF1tsaAzbb4Uw@mail.gmail.com/
So I just didn't have time for that extensive rework of the driver.
It's good feedback, but I just wanted to make the situation a little
bit better, and perfect is the enemy of good (TM).
> So I guess we have two options here:
>
> a) Cong Yang can post any relevant fixes to the existing "monolithic"
> panel driver so that we can get them landed and at least get things
> fixed.
>
> - or -
>
> b) Cong Yang could take over all or some of Linus's series and post
> new versions of it, addressing feedback.
Either works for me, I would prefer b), Cong is welcome to adopt
the patches if he/his employer want to. Go ahead!
We can't really let this one-size-fits-all driver go on like this.
My main concern with the "boe-tv101wum-nl6" driver is that it can
be renamed "cromeos-hackfest" at this point because it becomes
hard for any other system to reuse the panel drivers, the typical
example would be a system using say ili9882t but with
a different init sequence or something, why would they want
support for 9 unrelated panels compiled in? The condition that
these drivers should be related to the original panel that gave
name to the file has seemingly been dropped long ago.
It looks like the drivers only share the power lines (avdd, avee, pp3300,
pp1800) then this can be broken out to a helper library. But I am
sceptical about that too. I doubt that the vastly different panels
actually have exactly these these supply line names, I think it is
actually names of the rails on the chrome machine board. And that is
not how these regulators should be named, they should be named after
the input name on the component. This is really hard to catch in reviews when
we don't have datasheets so I'm not blaming anyone, but is this something
that even needs fixing in the device tree bindings? (By deprecation
and addition...) can we look into this?
I would say can we at least agree that before we merge one more
driver into this file, break out to subdrivers those that clearly have
an identifiable display controller and is thus reusable? From my
point of view I can just see the ili9882t so that's a good start.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v3 0/4] Fix up the boe-tv101wum-nl6 panel driver
2023-09-28 21:42 ` Linus Walleij
@ 2023-09-29 14:17 ` Doug Anderson
0 siblings, 0 replies; 19+ messages in thread
From: Doug Anderson @ 2023-09-29 14:17 UTC (permalink / raw)
To: Linus Walleij
Cc: Neil Armstrong, Jitao Shi, Cong Yang, linux-kernel, dri-devel,
Stephen Boyd, Ruihai Zhou, Sam Ravnborg
Hi,
On Thu, Sep 28, 2023 at 2:42 PM Linus Walleij <linus.walleij@linaro.org> wrote:
>
> On Tue, Sep 26, 2023 at 11:49 PM Doug Anderson <dianders@chromium.org> wrote:
>
> > > I'm curious what the latest on this patch series is. Is it abandoned,
> > > or is it still on your list to move forward with it? If it's
> > > abandoned, does that mean we've abandoned the idea of breaking
> > > ili9882t into a separate driver?
> > >
> > > From looking at things that have landed downstream in the ChromeOS
> > > kernel trees it looks as if additional fixes are getting blocked from
> > > being posted/landed because of the limbo state that this is in.
> >
> > I presume Linus is busy or otherwise indisposed.
>
> Sorry I was looking for the branch with my patches and I have it
> somewhere not ordinary :/
>
> Originally I shelved it because I got requests to do additional
> patches to the driver:
> https://lore.kernel.org/dri-devel/CAD=FV=Xkr3Qpd8m_6Xta_2jL_ezbxsmMyarbKXTXL+UJLG9xNw@mail.gmail.com/
>
> To do measurements about binary code size in object files, and if it does,
> then I need to invent new sequence macros (IIUC):
> https://lore.kernel.org/dri-devel/CAD=FV=Wju3WS45=EpXMUg7FjYDh3-=mvm_jS7TF1tsaAzbb4Uw@mail.gmail.com/
>
> So I just didn't have time for that extensive rework of the driver.
>
> It's good feedback, but I just wanted to make the situation a little
> bit better, and perfect is the enemy of good (TM).
>
> > So I guess we have two options here:
> >
> > a) Cong Yang can post any relevant fixes to the existing "monolithic"
> > panel driver so that we can get them landed and at least get things
> > fixed.
> >
> > - or -
> >
> > b) Cong Yang could take over all or some of Linus's series and post
> > new versions of it, addressing feedback.
>
> Either works for me, I would prefer b), Cong is welcome to adopt
> the patches if he/his employer want to. Go ahead!
>
> We can't really let this one-size-fits-all driver go on like this.
>
> My main concern with the "boe-tv101wum-nl6" driver is that it can
> be renamed "cromeos-hackfest" at this point because it becomes
> hard for any other system to reuse the panel drivers, the typical
> example would be a system using say ili9882t but with
> a different init sequence or something, why would they want
> support for 9 unrelated panels compiled in? The condition that
> these drivers should be related to the original panel that gave
> name to the file has seemingly been dropped long ago.
>
> It looks like the drivers only share the power lines (avdd, avee, pp3300,
> pp1800) then this can be broken out to a helper library. But I am
> sceptical about that too. I doubt that the vastly different panels
> actually have exactly these these supply line names, I think it is
> actually names of the rails on the chrome machine board. And that is
> not how these regulators should be named, they should be named after
> the input name on the component. This is really hard to catch in reviews when
> we don't have datasheets so I'm not blaming anyone, but is this something
> that even needs fixing in the device tree bindings? (By deprecation
> and addition...) can we look into this?
>
> I would say can we at least agree that before we merge one more
> driver into this file, break out to subdrivers those that clearly have
> an identifiable display controller and is thus reusable? From my
> point of view I can just see the ili9882t so that's a good start.
This sounds like a reasonable plan to me. What if Cong posted patches
that broke this up into a separate driver for the distinct controller
but otherwise didn't substantially reorganize it? In other words both
the old driver and the new one would keep the "struct panel_init_cmd"
until we get some resolution about the binary size issue. That would
at least let us move forward...
-Doug
^ permalink raw reply [flat|nested] 19+ messages in thread
end of thread, other threads:[~2023-09-29 14:17 UTC | newest]
Thread overview: 19+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-07-03 13:21 [PATCH v3 0/4] Fix up the boe-tv101wum-nl6 panel driver Linus Walleij
2023-07-03 13:21 ` [PATCH v3 1/4] drm/panel: boe-tv101wum-nl6: Drop macros and open code sequences Linus Walleij
2023-07-06 21:11 ` Doug Anderson
2023-07-03 13:21 ` [PATCH v3 2/4] drm/panel: boe-tv101wum-nl6: Drop surplus prepare tracking Linus Walleij
2023-07-06 21:11 ` Doug Anderson
2023-07-03 13:21 ` [PATCH v3 3/4] drm/panel: ili9882t: Break out as separate driver Linus Walleij
2023-07-06 21:14 ` Doug Anderson
2023-08-01 6:44 ` cong yang
2023-08-14 2:04 ` cong yang
2023-07-03 13:21 ` [PATCH v3 4/4] drm/panel: ili9882t: Break out function for switching page Linus Walleij
2023-07-06 9:13 ` cong yang
2023-07-06 21:16 ` Doug Anderson
2023-07-04 10:03 ` [PATCH v3 0/4] Fix up the boe-tv101wum-nl6 panel driver cong yang
2023-07-04 10:16 ` Linus Walleij
2023-07-04 11:14 ` cong yang
2023-09-18 16:19 ` Doug Anderson
2023-09-26 21:49 ` Doug Anderson
2023-09-28 21:42 ` Linus Walleij
2023-09-29 14:17 ` Doug Anderson
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