* [PATCH] drm/radeon: Unbreak HPD handling for r600+
@ 2017-05-11 23:31 Lyude
2017-05-12 6:56 ` Christian König
0 siblings, 1 reply; 4+ messages in thread
From: Lyude @ 2017-05-11 23:31 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: Lyude, David Airlie, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
stable-u79uwXL29TY76Z2rM5mHXA, Alex Deucher,
Christian König
We end up reading the interrupt register for HPD5, and then writing it
to HPD6 which on systems without anything using HPD5 results in
permanently disabling hotplug on one of the display outputs after the
first time we acknowledge a hotplug interrupt from the GPU.
This code is really bad. But for now, let's just fix this. I will
hopefully have a large patch series to refactor all of this soon.
Signed-off-by: Lyude <lyude@redhat.com>
Cc: stable@vger.kernel.org
---
drivers/gpu/drm/radeon/cik.c | 4 ++--
drivers/gpu/drm/radeon/evergreen.c | 4 ++--
drivers/gpu/drm/radeon/r600.c | 2 +-
drivers/gpu/drm/radeon/si.c | 4 ++--
4 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 53710dd..cfc917c 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -7401,7 +7401,7 @@ static inline void cik_irq_ack(struct radeon_device *rdev)
WREG32(DC_HPD5_INT_CONTROL, tmp);
}
if (rdev->irq.stat_regs.cik.disp_int_cont5 & DC_HPD6_INTERRUPT) {
- tmp = RREG32(DC_HPD5_INT_CONTROL);
+ tmp = RREG32(DC_HPD6_INT_CONTROL);
tmp |= DC_HPDx_INT_ACK;
WREG32(DC_HPD6_INT_CONTROL, tmp);
}
@@ -7431,7 +7431,7 @@ static inline void cik_irq_ack(struct radeon_device *rdev)
WREG32(DC_HPD5_INT_CONTROL, tmp);
}
if (rdev->irq.stat_regs.cik.disp_int_cont5 & DC_HPD6_RX_INTERRUPT) {
- tmp = RREG32(DC_HPD5_INT_CONTROL);
+ tmp = RREG32(DC_HPD6_INT_CONTROL);
tmp |= DC_HPDx_RX_INT_ACK;
WREG32(DC_HPD6_INT_CONTROL, tmp);
}
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index d1b1e0c..c48d19e 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -4933,7 +4933,7 @@ static void evergreen_irq_ack(struct radeon_device *rdev)
WREG32(DC_HPD5_INT_CONTROL, tmp);
}
if (rdev->irq.stat_regs.evergreen.disp_int_cont5 & DC_HPD6_INTERRUPT) {
- tmp = RREG32(DC_HPD5_INT_CONTROL);
+ tmp = RREG32(DC_HPD6_INT_CONTROL);
tmp |= DC_HPDx_INT_ACK;
WREG32(DC_HPD6_INT_CONTROL, tmp);
}
@@ -4964,7 +4964,7 @@ static void evergreen_irq_ack(struct radeon_device *rdev)
WREG32(DC_HPD5_INT_CONTROL, tmp);
}
if (rdev->irq.stat_regs.evergreen.disp_int_cont5 & DC_HPD6_RX_INTERRUPT) {
- tmp = RREG32(DC_HPD5_INT_CONTROL);
+ tmp = RREG32(DC_HPD6_INT_CONTROL);
tmp |= DC_HPDx_RX_INT_ACK;
WREG32(DC_HPD6_INT_CONTROL, tmp);
}
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 0a08517..e06e2d8 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -3988,7 +3988,7 @@ static void r600_irq_ack(struct radeon_device *rdev)
WREG32(DC_HPD5_INT_CONTROL, tmp);
}
if (rdev->irq.stat_regs.r600.disp_int_cont2 & DC_HPD6_INTERRUPT) {
- tmp = RREG32(DC_HPD5_INT_CONTROL);
+ tmp = RREG32(DC_HPD6_INT_CONTROL);
tmp |= DC_HPDx_INT_ACK;
WREG32(DC_HPD6_INT_CONTROL, tmp);
}
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 528e5a4..bfeb774 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -6330,7 +6330,7 @@ static inline void si_irq_ack(struct radeon_device *rdev)
WREG32(DC_HPD5_INT_CONTROL, tmp);
}
if (rdev->irq.stat_regs.evergreen.disp_int_cont5 & DC_HPD6_INTERRUPT) {
- tmp = RREG32(DC_HPD5_INT_CONTROL);
+ tmp = RREG32(DC_HPD6_INT_CONTROL);
tmp |= DC_HPDx_INT_ACK;
WREG32(DC_HPD6_INT_CONTROL, tmp);
}
@@ -6361,7 +6361,7 @@ static inline void si_irq_ack(struct radeon_device *rdev)
WREG32(DC_HPD5_INT_CONTROL, tmp);
}
if (rdev->irq.stat_regs.evergreen.disp_int_cont5 & DC_HPD6_RX_INTERRUPT) {
- tmp = RREG32(DC_HPD5_INT_CONTROL);
+ tmp = RREG32(DC_HPD6_INT_CONTROL);
tmp |= DC_HPDx_RX_INT_ACK;
WREG32(DC_HPD6_INT_CONTROL, tmp);
}
--
2.9.3
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/radeon: Unbreak HPD handling for r600+
2017-05-11 23:31 [PATCH] drm/radeon: Unbreak HPD handling for r600+ Lyude
@ 2017-05-12 6:56 ` Christian König
2017-05-15 14:19 ` Lyude Paul
[not found] ` <70de5a62-1afa-b13b-d0d1-c3415ddbc788-5C7GfCeVMHo@public.gmane.org>
0 siblings, 2 replies; 4+ messages in thread
From: Christian König @ 2017-05-12 6:56 UTC (permalink / raw)
To: Lyude, amd-gfx
Cc: stable, Alex Deucher, David Airlie, dri-devel, linux-kernel
Am 12.05.2017 um 01:31 schrieb Lyude:
> We end up reading the interrupt register for HPD5, and then writing it
> to HPD6 which on systems without anything using HPD5 results in
> permanently disabling hotplug on one of the display outputs after the
> first time we acknowledge a hotplug interrupt from the GPU.
>
> This code is really bad. But for now, let's just fix this. I will
> hopefully have a large patch series to refactor all of this soon.
>
> Signed-off-by: Lyude <lyude@redhat.com>
> Cc: stable@vger.kernel.org
Really nice catch! And yes I agree the copy&pasted code in HPD handling
always scared me as well.
Patch is Reviewed-by: Christian König <christian.koenig@amd.com>.
Christian.
> ---
> drivers/gpu/drm/radeon/cik.c | 4 ++--
> drivers/gpu/drm/radeon/evergreen.c | 4 ++--
> drivers/gpu/drm/radeon/r600.c | 2 +-
> drivers/gpu/drm/radeon/si.c | 4 ++--
> 4 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
> index 53710dd..cfc917c 100644
> --- a/drivers/gpu/drm/radeon/cik.c
> +++ b/drivers/gpu/drm/radeon/cik.c
> @@ -7401,7 +7401,7 @@ static inline void cik_irq_ack(struct radeon_device *rdev)
> WREG32(DC_HPD5_INT_CONTROL, tmp);
> }
> if (rdev->irq.stat_regs.cik.disp_int_cont5 & DC_HPD6_INTERRUPT) {
> - tmp = RREG32(DC_HPD5_INT_CONTROL);
> + tmp = RREG32(DC_HPD6_INT_CONTROL);
> tmp |= DC_HPDx_INT_ACK;
> WREG32(DC_HPD6_INT_CONTROL, tmp);
> }
> @@ -7431,7 +7431,7 @@ static inline void cik_irq_ack(struct radeon_device *rdev)
> WREG32(DC_HPD5_INT_CONTROL, tmp);
> }
> if (rdev->irq.stat_regs.cik.disp_int_cont5 & DC_HPD6_RX_INTERRUPT) {
> - tmp = RREG32(DC_HPD5_INT_CONTROL);
> + tmp = RREG32(DC_HPD6_INT_CONTROL);
> tmp |= DC_HPDx_RX_INT_ACK;
> WREG32(DC_HPD6_INT_CONTROL, tmp);
> }
> diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
> index d1b1e0c..c48d19e 100644
> --- a/drivers/gpu/drm/radeon/evergreen.c
> +++ b/drivers/gpu/drm/radeon/evergreen.c
> @@ -4933,7 +4933,7 @@ static void evergreen_irq_ack(struct radeon_device *rdev)
> WREG32(DC_HPD5_INT_CONTROL, tmp);
> }
> if (rdev->irq.stat_regs.evergreen.disp_int_cont5 & DC_HPD6_INTERRUPT) {
> - tmp = RREG32(DC_HPD5_INT_CONTROL);
> + tmp = RREG32(DC_HPD6_INT_CONTROL);
> tmp |= DC_HPDx_INT_ACK;
> WREG32(DC_HPD6_INT_CONTROL, tmp);
> }
> @@ -4964,7 +4964,7 @@ static void evergreen_irq_ack(struct radeon_device *rdev)
> WREG32(DC_HPD5_INT_CONTROL, tmp);
> }
> if (rdev->irq.stat_regs.evergreen.disp_int_cont5 & DC_HPD6_RX_INTERRUPT) {
> - tmp = RREG32(DC_HPD5_INT_CONTROL);
> + tmp = RREG32(DC_HPD6_INT_CONTROL);
> tmp |= DC_HPDx_RX_INT_ACK;
> WREG32(DC_HPD6_INT_CONTROL, tmp);
> }
> diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
> index 0a08517..e06e2d8 100644
> --- a/drivers/gpu/drm/radeon/r600.c
> +++ b/drivers/gpu/drm/radeon/r600.c
> @@ -3988,7 +3988,7 @@ static void r600_irq_ack(struct radeon_device *rdev)
> WREG32(DC_HPD5_INT_CONTROL, tmp);
> }
> if (rdev->irq.stat_regs.r600.disp_int_cont2 & DC_HPD6_INTERRUPT) {
> - tmp = RREG32(DC_HPD5_INT_CONTROL);
> + tmp = RREG32(DC_HPD6_INT_CONTROL);
> tmp |= DC_HPDx_INT_ACK;
> WREG32(DC_HPD6_INT_CONTROL, tmp);
> }
> diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
> index 528e5a4..bfeb774 100644
> --- a/drivers/gpu/drm/radeon/si.c
> +++ b/drivers/gpu/drm/radeon/si.c
> @@ -6330,7 +6330,7 @@ static inline void si_irq_ack(struct radeon_device *rdev)
> WREG32(DC_HPD5_INT_CONTROL, tmp);
> }
> if (rdev->irq.stat_regs.evergreen.disp_int_cont5 & DC_HPD6_INTERRUPT) {
> - tmp = RREG32(DC_HPD5_INT_CONTROL);
> + tmp = RREG32(DC_HPD6_INT_CONTROL);
> tmp |= DC_HPDx_INT_ACK;
> WREG32(DC_HPD6_INT_CONTROL, tmp);
> }
> @@ -6361,7 +6361,7 @@ static inline void si_irq_ack(struct radeon_device *rdev)
> WREG32(DC_HPD5_INT_CONTROL, tmp);
> }
> if (rdev->irq.stat_regs.evergreen.disp_int_cont5 & DC_HPD6_RX_INTERRUPT) {
> - tmp = RREG32(DC_HPD5_INT_CONTROL);
> + tmp = RREG32(DC_HPD6_INT_CONTROL);
> tmp |= DC_HPDx_RX_INT_ACK;
> WREG32(DC_HPD6_INT_CONTROL, tmp);
> }
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/radeon: Unbreak HPD handling for r600+
2017-05-12 6:56 ` Christian König
@ 2017-05-15 14:19 ` Lyude Paul
[not found] ` <70de5a62-1afa-b13b-d0d1-c3415ddbc788-5C7GfCeVMHo@public.gmane.org>
1 sibling, 0 replies; 4+ messages in thread
From: Lyude Paul @ 2017-05-15 14:19 UTC (permalink / raw)
To: Christian König, amd-gfx
Cc: stable, Alex Deucher, David Airlie, dri-devel, linux-kernel
Mind giving me this a poke when this gets pushed upstream btw?
On Fri, 2017-05-12 at 08:56 +0200, Christian König wrote:
> Am 12.05.2017 um 01:31 schrieb Lyude:
> > We end up reading the interrupt register for HPD5, and then writing
> > it
> > to HPD6 which on systems without anything using HPD5 results in
> > permanently disabling hotplug on one of the display outputs after
> > the
> > first time we acknowledge a hotplug interrupt from the GPU.
> >
> > This code is really bad. But for now, let's just fix this. I will
> > hopefully have a large patch series to refactor all of this soon.
> >
> > Signed-off-by: Lyude <lyude@redhat.com>
> > Cc: stable@vger.kernel.org
>
> Really nice catch! And yes I agree the copy&pasted code in HPD
> handling
> always scared me as well.
>
> Patch is Reviewed-by: Christian König <christian.koenig@amd.com>.
>
> Christian.
>
> > ---
> > drivers/gpu/drm/radeon/cik.c | 4 ++--
> > drivers/gpu/drm/radeon/evergreen.c | 4 ++--
> > drivers/gpu/drm/radeon/r600.c | 2 +-
> > drivers/gpu/drm/radeon/si.c | 4 ++--
> > 4 files changed, 7 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/radeon/cik.c
> > b/drivers/gpu/drm/radeon/cik.c
> > index 53710dd..cfc917c 100644
> > --- a/drivers/gpu/drm/radeon/cik.c
> > +++ b/drivers/gpu/drm/radeon/cik.c
> > @@ -7401,7 +7401,7 @@ static inline void cik_irq_ack(struct
> > radeon_device *rdev)
> > WREG32(DC_HPD5_INT_CONTROL, tmp);
> > }
> > if (rdev->irq.stat_regs.cik.disp_int_cont5 &
> > DC_HPD6_INTERRUPT) {
> > - tmp = RREG32(DC_HPD5_INT_CONTROL);
> > + tmp = RREG32(DC_HPD6_INT_CONTROL);
> > tmp |= DC_HPDx_INT_ACK;
> > WREG32(DC_HPD6_INT_CONTROL, tmp);
> > }
> > @@ -7431,7 +7431,7 @@ static inline void cik_irq_ack(struct
> > radeon_device *rdev)
> > WREG32(DC_HPD5_INT_CONTROL, tmp);
> > }
> > if (rdev->irq.stat_regs.cik.disp_int_cont5 &
> > DC_HPD6_RX_INTERRUPT) {
> > - tmp = RREG32(DC_HPD5_INT_CONTROL);
> > + tmp = RREG32(DC_HPD6_INT_CONTROL);
> > tmp |= DC_HPDx_RX_INT_ACK;
> > WREG32(DC_HPD6_INT_CONTROL, tmp);
> > }
> > diff --git a/drivers/gpu/drm/radeon/evergreen.c
> > b/drivers/gpu/drm/radeon/evergreen.c
> > index d1b1e0c..c48d19e 100644
> > --- a/drivers/gpu/drm/radeon/evergreen.c
> > +++ b/drivers/gpu/drm/radeon/evergreen.c
> > @@ -4933,7 +4933,7 @@ static void evergreen_irq_ack(struct
> > radeon_device *rdev)
> > WREG32(DC_HPD5_INT_CONTROL, tmp);
> > }
> > if (rdev->irq.stat_regs.evergreen.disp_int_cont5 &
> > DC_HPD6_INTERRUPT) {
> > - tmp = RREG32(DC_HPD5_INT_CONTROL);
> > + tmp = RREG32(DC_HPD6_INT_CONTROL);
> > tmp |= DC_HPDx_INT_ACK;
> > WREG32(DC_HPD6_INT_CONTROL, tmp);
> > }
> > @@ -4964,7 +4964,7 @@ static void evergreen_irq_ack(struct
> > radeon_device *rdev)
> > WREG32(DC_HPD5_INT_CONTROL, tmp);
> > }
> > if (rdev->irq.stat_regs.evergreen.disp_int_cont5 &
> > DC_HPD6_RX_INTERRUPT) {
> > - tmp = RREG32(DC_HPD5_INT_CONTROL);
> > + tmp = RREG32(DC_HPD6_INT_CONTROL);
> > tmp |= DC_HPDx_RX_INT_ACK;
> > WREG32(DC_HPD6_INT_CONTROL, tmp);
> > }
> > diff --git a/drivers/gpu/drm/radeon/r600.c
> > b/drivers/gpu/drm/radeon/r600.c
> > index 0a08517..e06e2d8 100644
> > --- a/drivers/gpu/drm/radeon/r600.c
> > +++ b/drivers/gpu/drm/radeon/r600.c
> > @@ -3988,7 +3988,7 @@ static void r600_irq_ack(struct radeon_device
> > *rdev)
> > WREG32(DC_HPD5_INT_CONTROL, tmp);
> > }
> > if (rdev->irq.stat_regs.r600.disp_int_cont2 &
> > DC_HPD6_INTERRUPT) {
> > - tmp = RREG32(DC_HPD5_INT_CONTROL);
> > + tmp = RREG32(DC_HPD6_INT_CONTROL);
> > tmp |= DC_HPDx_INT_ACK;
> > WREG32(DC_HPD6_INT_CONTROL, tmp);
> > }
> > diff --git a/drivers/gpu/drm/radeon/si.c
> > b/drivers/gpu/drm/radeon/si.c
> > index 528e5a4..bfeb774 100644
> > --- a/drivers/gpu/drm/radeon/si.c
> > +++ b/drivers/gpu/drm/radeon/si.c
> > @@ -6330,7 +6330,7 @@ static inline void si_irq_ack(struct
> > radeon_device *rdev)
> > WREG32(DC_HPD5_INT_CONTROL, tmp);
> > }
> > if (rdev->irq.stat_regs.evergreen.disp_int_cont5 &
> > DC_HPD6_INTERRUPT) {
> > - tmp = RREG32(DC_HPD5_INT_CONTROL);
> > + tmp = RREG32(DC_HPD6_INT_CONTROL);
> > tmp |= DC_HPDx_INT_ACK;
> > WREG32(DC_HPD6_INT_CONTROL, tmp);
> > }
> > @@ -6361,7 +6361,7 @@ static inline void si_irq_ack(struct
> > radeon_device *rdev)
> > WREG32(DC_HPD5_INT_CONTROL, tmp);
> > }
> > if (rdev->irq.stat_regs.evergreen.disp_int_cont5 &
> > DC_HPD6_RX_INTERRUPT) {
> > - tmp = RREG32(DC_HPD5_INT_CONTROL);
> > + tmp = RREG32(DC_HPD6_INT_CONTROL);
> > tmp |= DC_HPDx_RX_INT_ACK;
> > WREG32(DC_HPD6_INT_CONTROL, tmp);
> > }
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/radeon: Unbreak HPD handling for r600+
[not found] ` <70de5a62-1afa-b13b-d0d1-c3415ddbc788-5C7GfCeVMHo@public.gmane.org>
@ 2017-05-24 18:31 ` Alex Deucher
0 siblings, 0 replies; 4+ messages in thread
From: Alex Deucher @ 2017-05-24 18:31 UTC (permalink / raw)
To: Christian König
Cc: amd-gfx list, Lyude, David Airlie, LKML, for 3.8,
Maling list - DRI developers, Alex Deucher
On Fri, May 12, 2017 at 2:56 AM, Christian König
<christian.koenig@amd.com> wrote:
> Am 12.05.2017 um 01:31 schrieb Lyude:
>>
>> We end up reading the interrupt register for HPD5, and then writing it
>> to HPD6 which on systems without anything using HPD5 results in
>> permanently disabling hotplug on one of the display outputs after the
>> first time we acknowledge a hotplug interrupt from the GPU.
>>
>> This code is really bad. But for now, let's just fix this. I will
>> hopefully have a large patch series to refactor all of this soon.
>>
>> Signed-off-by: Lyude <lyude@redhat.com>
>> Cc: stable@vger.kernel.org
>
>
> Really nice catch! And yes I agree the copy&pasted code in HPD handling
> always scared me as well.
>
> Patch is Reviewed-by: Christian König <christian.koenig@amd.com>.
Applied. thanks!
Alex
>
> Christian.
>
>
>> ---
>> drivers/gpu/drm/radeon/cik.c | 4 ++--
>> drivers/gpu/drm/radeon/evergreen.c | 4 ++--
>> drivers/gpu/drm/radeon/r600.c | 2 +-
>> drivers/gpu/drm/radeon/si.c | 4 ++--
>> 4 files changed, 7 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
>> index 53710dd..cfc917c 100644
>> --- a/drivers/gpu/drm/radeon/cik.c
>> +++ b/drivers/gpu/drm/radeon/cik.c
>> @@ -7401,7 +7401,7 @@ static inline void cik_irq_ack(struct radeon_device
>> *rdev)
>> WREG32(DC_HPD5_INT_CONTROL, tmp);
>> }
>> if (rdev->irq.stat_regs.cik.disp_int_cont5 & DC_HPD6_INTERRUPT) {
>> - tmp = RREG32(DC_HPD5_INT_CONTROL);
>> + tmp = RREG32(DC_HPD6_INT_CONTROL);
>> tmp |= DC_HPDx_INT_ACK;
>> WREG32(DC_HPD6_INT_CONTROL, tmp);
>> }
>> @@ -7431,7 +7431,7 @@ static inline void cik_irq_ack(struct radeon_device
>> *rdev)
>> WREG32(DC_HPD5_INT_CONTROL, tmp);
>> }
>> if (rdev->irq.stat_regs.cik.disp_int_cont5 & DC_HPD6_RX_INTERRUPT)
>> {
>> - tmp = RREG32(DC_HPD5_INT_CONTROL);
>> + tmp = RREG32(DC_HPD6_INT_CONTROL);
>> tmp |= DC_HPDx_RX_INT_ACK;
>> WREG32(DC_HPD6_INT_CONTROL, tmp);
>> }
>> diff --git a/drivers/gpu/drm/radeon/evergreen.c
>> b/drivers/gpu/drm/radeon/evergreen.c
>> index d1b1e0c..c48d19e 100644
>> --- a/drivers/gpu/drm/radeon/evergreen.c
>> +++ b/drivers/gpu/drm/radeon/evergreen.c
>> @@ -4933,7 +4933,7 @@ static void evergreen_irq_ack(struct radeon_device
>> *rdev)
>> WREG32(DC_HPD5_INT_CONTROL, tmp);
>> }
>> if (rdev->irq.stat_regs.evergreen.disp_int_cont5 &
>> DC_HPD6_INTERRUPT) {
>> - tmp = RREG32(DC_HPD5_INT_CONTROL);
>> + tmp = RREG32(DC_HPD6_INT_CONTROL);
>> tmp |= DC_HPDx_INT_ACK;
>> WREG32(DC_HPD6_INT_CONTROL, tmp);
>> }
>> @@ -4964,7 +4964,7 @@ static void evergreen_irq_ack(struct radeon_device
>> *rdev)
>> WREG32(DC_HPD5_INT_CONTROL, tmp);
>> }
>> if (rdev->irq.stat_regs.evergreen.disp_int_cont5 &
>> DC_HPD6_RX_INTERRUPT) {
>> - tmp = RREG32(DC_HPD5_INT_CONTROL);
>> + tmp = RREG32(DC_HPD6_INT_CONTROL);
>> tmp |= DC_HPDx_RX_INT_ACK;
>> WREG32(DC_HPD6_INT_CONTROL, tmp);
>> }
>> diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
>> index 0a08517..e06e2d8 100644
>> --- a/drivers/gpu/drm/radeon/r600.c
>> +++ b/drivers/gpu/drm/radeon/r600.c
>> @@ -3988,7 +3988,7 @@ static void r600_irq_ack(struct radeon_device *rdev)
>> WREG32(DC_HPD5_INT_CONTROL, tmp);
>> }
>> if (rdev->irq.stat_regs.r600.disp_int_cont2 &
>> DC_HPD6_INTERRUPT) {
>> - tmp = RREG32(DC_HPD5_INT_CONTROL);
>> + tmp = RREG32(DC_HPD6_INT_CONTROL);
>> tmp |= DC_HPDx_INT_ACK;
>> WREG32(DC_HPD6_INT_CONTROL, tmp);
>> }
>> diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
>> index 528e5a4..bfeb774 100644
>> --- a/drivers/gpu/drm/radeon/si.c
>> +++ b/drivers/gpu/drm/radeon/si.c
>> @@ -6330,7 +6330,7 @@ static inline void si_irq_ack(struct radeon_device
>> *rdev)
>> WREG32(DC_HPD5_INT_CONTROL, tmp);
>> }
>> if (rdev->irq.stat_regs.evergreen.disp_int_cont5 &
>> DC_HPD6_INTERRUPT) {
>> - tmp = RREG32(DC_HPD5_INT_CONTROL);
>> + tmp = RREG32(DC_HPD6_INT_CONTROL);
>> tmp |= DC_HPDx_INT_ACK;
>> WREG32(DC_HPD6_INT_CONTROL, tmp);
>> }
>> @@ -6361,7 +6361,7 @@ static inline void si_irq_ack(struct radeon_device
>> *rdev)
>> WREG32(DC_HPD5_INT_CONTROL, tmp);
>> }
>> if (rdev->irq.stat_regs.evergreen.disp_int_cont5 &
>> DC_HPD6_RX_INTERRUPT) {
>> - tmp = RREG32(DC_HPD5_INT_CONTROL);
>> + tmp = RREG32(DC_HPD6_INT_CONTROL);
>> tmp |= DC_HPDx_RX_INT_ACK;
>> WREG32(DC_HPD6_INT_CONTROL, tmp);
>> }
>
>
>
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> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2017-05-24 18:31 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-05-11 23:31 [PATCH] drm/radeon: Unbreak HPD handling for r600+ Lyude
2017-05-12 6:56 ` Christian König
2017-05-15 14:19 ` Lyude Paul
[not found] ` <70de5a62-1afa-b13b-d0d1-c3415ddbc788-5C7GfCeVMHo@public.gmane.org>
2017-05-24 18:31 ` Alex Deucher
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