From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 13/13] drm/i915: Use the LLC mode on gen6 for everything but display.
Date: Thu, 14 Apr 2011 10:03:47 +0100 [thread overview]
Message-ID: <1302771827-26112-14-git-send-email-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <1302771827-26112-1-git-send-email-chris@chris-wilson.co.uk>
From: Eric Anholt <eric@anholt.net>
Improves full-screen openarena on my laptop 20.3% +/- 4.0% (n=3)
Improves 800x600 nexuiz on my laptop 12.3% +/- 0.1% (n=3)
We have more room to improve with doing LLC caching for display using
GFDT, and in doing LLC+MLC caching, but this was an easy performance
win and incremental improvement toward those two.
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
drivers/gpu/drm/i915/i915_gem.c | 18 +++++++++++++++++-
1 files changed, 17 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 46b63c3..7992308 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3704,7 +3704,23 @@ struct drm_i915_gem_object *i915_gem_alloc_object(struct drm_device *dev,
obj->base.write_domain = I915_GEM_DOMAIN_CPU;
obj->base.read_domains = I915_GEM_DOMAIN_CPU;
- obj->cache_level = I915_CACHE_NONE;
+ if (IS_GEN6(dev)) {
+ /* On Gen6, we can have the GPU use the LLC (the CPU
+ * cache) for about a 10% performance improvement
+ * compared to uncached. Graphics requests other than
+ * display scanout are coherent with the CPU in
+ * accessing this cache. This means in this mode we
+ * don't need to clflush on the CPU side, and on the
+ * GPU side we only need to flush internal caches to
+ * get data visible to the CPU.
+ *
+ * However, we maintain the display planes as UC, and so
+ * need to rebind when first used as such.
+ */
+ obj->cache_level = I915_CACHE_LLC;
+ } else
+ obj->cache_level = I915_CACHE_NONE;
+
obj->base.driver_private = NULL;
obj->fence_reg = I915_FENCE_REG_NONE;
INIT_LIST_HEAD(&obj->mm_list);
--
1.7.4.1
next prev parent reply other threads:[~2011-04-14 9:04 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-04-14 9:03 i915 llc for -next Chris Wilson
2011-04-14 9:03 ` [PATCH 01/13] drm/i915: Rename agp_type to cache_level Chris Wilson
2011-04-14 12:39 ` Keith Packard
2011-04-14 20:57 ` [PATCH] " Chris Wilson
2011-04-14 9:03 ` [PATCH 02/13] drm/i915: Do not clflush snooped objects Chris Wilson
2011-04-14 9:03 ` [PATCH 03/13] drm/i915: Introduce i915_gem_object_finish_gpu() Chris Wilson
2011-04-14 16:01 ` Daniel Vetter
2011-04-14 9:03 ` [PATCH 04/13] drm/i915: Introduce i915_gem_object_finish_gtt() Chris Wilson
2011-04-14 16:12 ` Daniel Vetter
2011-04-14 20:20 ` Chris Wilson
2011-05-04 16:47 ` Keith Packard
2011-04-14 9:03 ` [PATCH 05/13] drm/i915/gtt: Split out i915_gem_gtt_rebind_object() Chris Wilson
2011-04-14 16:52 ` Daniel Vetter
2011-04-14 9:03 ` [PATCH 06/13] drm/i915: Add an interface to dynamically change the cache level Chris Wilson
2011-04-14 16:54 ` Daniel Vetter
2011-04-14 9:03 ` [PATCH 07/13] drm/i915: Mark the cursor and the overlay as being part of the display planes Chris Wilson
2011-05-04 17:09 ` Keith Packard
2011-05-04 18:28 ` Chris Wilson
2011-05-04 18:46 ` Keith Packard
2011-05-04 19:47 ` Chris Wilson
2011-04-14 9:03 ` [PATCH 08/13] drm/i915: Pin after setting to the display plane Chris Wilson
2011-04-14 17:34 ` Daniel Vetter
2011-04-14 21:31 ` Chris Wilson
2011-04-15 6:04 ` [PATCH 1/2] drm/i915: Combine pinning " Chris Wilson
2011-04-15 6:04 ` [PATCH 2/2] drm/i915: Use the uncached domain for the display planes Chris Wilson
2011-04-16 10:54 ` Daniel Vetter
2011-04-15 12:11 ` [PATCH 1/2] drm/i915: Combine pinning after setting to the display plane Daniel Vetter
2011-04-16 6:26 ` Chris Wilson
2011-04-16 6:27 ` [PATCH] drm/i915: Combine pinning with " Chris Wilson
2011-04-16 10:52 ` Daniel Vetter
2011-04-16 11:00 ` Chris Wilson
2011-04-14 9:03 ` [PATCH 09/13] drm/i915: Use the uncached domain for the display planes Chris Wilson
2011-04-14 9:03 ` [PATCH 10/13] drm/i915: Use the CPU domain for snooped pwrites Chris Wilson
2011-04-14 17:40 ` Daniel Vetter
2011-04-14 9:03 ` [PATCH 11/13] drm/i915: Prevent mmap access through the GTT of snooped pages Chris Wilson
2011-05-04 17:30 ` Keith Packard
2011-04-14 9:03 ` [PATCH 12/13] drm/i915: Prevent mixing of snooped and tiling modes for old chipsets Chris Wilson
2011-04-14 17:43 ` Daniel Vetter
2011-04-14 20:26 ` Chris Wilson
2011-05-04 17:32 ` Keith Packard
2011-04-14 9:03 ` Chris Wilson [this message]
2011-04-15 6:12 ` i915 llc for -next Chris Wilson
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