[PATCH] drm/i915/mtl: Update workaround 14018778641

* [PATCH] drm/i915/mtl: Update workaround 14018778641
@ 2024-02-22 13:57 Tejas Upadhyay
  2024-02-22 21:45 ` Matt Roper
                   ` (2 more replies)
  0 siblings, 3 replies; 8+ messages in thread
From: Tejas Upadhyay @ 2024-02-22 13:57 UTC (permalink / raw)
  To: intel-gfx; +Cc: Matt Roper, Andi Shyti, Tejas Upadhyay

Applying WA 14018778641 only on Compute engine has impact on
some apps like chrome. Updating this WA to apply on Render
engine as well as it is helping with performance on Chrome.

Note: There is no concern from media team thus not applying
WA on media engines. We will revisit if any issues reported
from media team.

Fixes: 668f37e1ee11 ("drm/i915/mtl: Update workaround 14018778641")
Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index d67d44611c28..46607aefc026 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1652,7 +1652,8 @@ pvc_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 static void
 xelpg_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	/* Wa_14018575942 / Wa_18018781329 */
+	/* Wa_14018575942 / Wa_14018778641 / Wa_18018781329 */
+	wa_mcr_write_or(wal, RENDER_MOD_CTRL, FORCE_MISS_FTLB);
 	wa_mcr_write_or(wal, COMP_MOD_CTRL, FORCE_MISS_FTLB);
 
 	/* Wa_22016670082 */
-- 
2.25.1


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