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From: Alexander Graf <graf@amazon.com>
To: Anup Patel <Anup.Patel@wdc.com>,
	Palmer Dabbelt <palmer@sifive.com>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	Paolo Bonzini <pbonzini@redhat.com>, Radim K <rkrcmar@redhat.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Atish Patra <Atish.Patra@wdc.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Damien Le Moal <Damien.LeMoal@wdc.com>,
	"Christoph Hellwig" <hch@infradead.org>,
	Anup Patel <anup@brainfault.org>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v5 11/20] RISC-V: KVM: Handle WFI exits for VCPU
Date: Thu, 22 Aug 2019 14:19:12 +0200	[thread overview]
Message-ID: <29b8f7c6-4b9d-91fc-61e7-82ecfd26ff88@amazon.com> (raw)
In-Reply-To: <20190822084131.114764-12-anup.patel@wdc.com>

On 22.08.19 10:45, Anup Patel wrote:
> We get illegal instruction trap whenever Guest/VM executes WFI
> instruction.
> 
> This patch handles WFI trap by blocking the trapped VCPU using
> kvm_vcpu_block() API. The blocked VCPU will be automatically
> resumed whenever a VCPU interrupt is injected from user-space
> or from in-kernel IRQCHIP emulation.
> 
> Signed-off-by: Anup Patel <anup.patel@wdc.com>
> Acked-by: Paolo Bonzini <pbonzini@redhat.com>
> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
>   arch/riscv/kvm/vcpu_exit.c | 88 ++++++++++++++++++++++++++++++++++++++
>   1 file changed, 88 insertions(+)
> 
> diff --git a/arch/riscv/kvm/vcpu_exit.c b/arch/riscv/kvm/vcpu_exit.c
> index efc06198c259..fbc04fe335ad 100644
> --- a/arch/riscv/kvm/vcpu_exit.c
> +++ b/arch/riscv/kvm/vcpu_exit.c
> @@ -12,6 +12,9 @@
>   #include <linux/kvm_host.h>
>   #include <asm/csr.h>
>   
> +#define INSN_MASK_WFI		0xffffff00
> +#define INSN_MATCH_WFI		0x10500000
> +
>   #define INSN_MATCH_LB		0x3
>   #define INSN_MASK_LB		0x707f
>   #define INSN_MATCH_LH		0x1003
> @@ -179,6 +182,87 @@ static ulong get_insn(struct kvm_vcpu *vcpu)
>   	return val;
>   }
>   
> +typedef int (*illegal_insn_func)(struct kvm_vcpu *vcpu,
> +				 struct kvm_run *run,
> +				 ulong insn);
> +
> +static int truly_illegal_insn(struct kvm_vcpu *vcpu,
> +			      struct kvm_run *run,
> +			      ulong insn)
> +{
> +	/* TODO: Redirect trap to Guest VCPU */
> +	return -ENOTSUPP;
> +}
> +
> +static int system_opcode_insn(struct kvm_vcpu *vcpu,
> +			      struct kvm_run *run,
> +			      ulong insn)
> +{
> +	if ((insn & INSN_MASK_WFI) == INSN_MATCH_WFI) {
> +		vcpu->stat.wfi_exit_stat++;
> +		if (!kvm_arch_vcpu_runnable(vcpu)) {
> +			srcu_read_unlock(&vcpu->kvm->srcu, vcpu->arch.srcu_idx);
> +			kvm_vcpu_block(vcpu);
> +			vcpu->arch.srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
> +			kvm_clear_request(KVM_REQ_UNHALT, vcpu);
> +		}
> +		vcpu->arch.guest_context.sepc += INSN_LEN(insn);
> +		return 1;
> +	}
> +
> +	return truly_illegal_insn(vcpu, run, insn);
> +}
> +
> +static illegal_insn_func illegal_insn_table[32] = {

Every time I did experiments on PowerPC with indirect tables like this 
over switch() in C, the switch() code won. CPUs are pretty good at 
predicting branches. Predicting indirect jumps however, they are 
terrible at.

So unless you consider the jump table more readable / maintainable, I 
would suggest to use a simple switch() statement. It will be faster and 
smaller.


Alex


> +	truly_illegal_insn, /* 0 */
> +	truly_illegal_insn, /* 1 */
> +	truly_illegal_insn, /* 2 */
> +	truly_illegal_insn, /* 3 */
> +	truly_illegal_insn, /* 4 */
> +	truly_illegal_insn, /* 5 */
> +	truly_illegal_insn, /* 6 */
> +	truly_illegal_insn, /* 7 */
> +	truly_illegal_insn, /* 8 */
> +	truly_illegal_insn, /* 9 */
> +	truly_illegal_insn, /* 10 */
> +	truly_illegal_insn, /* 11 */
> +	truly_illegal_insn, /* 12 */
> +	truly_illegal_insn, /* 13 */
> +	truly_illegal_insn, /* 14 */
> +	truly_illegal_insn, /* 15 */
> +	truly_illegal_insn, /* 16 */
> +	truly_illegal_insn, /* 17 */
> +	truly_illegal_insn, /* 18 */
> +	truly_illegal_insn, /* 19 */
> +	truly_illegal_insn, /* 20 */
> +	truly_illegal_insn, /* 21 */
> +	truly_illegal_insn, /* 22 */
> +	truly_illegal_insn, /* 23 */
> +	truly_illegal_insn, /* 24 */
> +	truly_illegal_insn, /* 25 */
> +	truly_illegal_insn, /* 26 */
> +	truly_illegal_insn, /* 27 */
> +	system_opcode_insn, /* 28 */
> +	truly_illegal_insn, /* 29 */
> +	truly_illegal_insn, /* 30 */
> +	truly_illegal_insn  /* 31 */
> +};
> +
> +static int illegal_inst_fault(struct kvm_vcpu *vcpu, struct kvm_run *run,
> +			      unsigned long stval)
> +{
> +	ulong insn = stval;
> +
> +	if (unlikely((insn & 3) != 3)) {
> +		if (insn == 0)
> +			insn = get_insn(vcpu);
> +		if ((insn & 3) != 3)
> +			return truly_illegal_insn(vcpu, run, insn);
> +	}
> +
> +	return illegal_insn_table[(insn & 0x7c) >> 2](vcpu, run, insn);
> +}
> +
>   static int emulate_load(struct kvm_vcpu *vcpu, struct kvm_run *run,
>   			unsigned long fault_addr)
>   {
> @@ -439,6 +523,10 @@ int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
>   	ret = -EFAULT;
>   	run->exit_reason = KVM_EXIT_UNKNOWN;
>   	switch (scause) {
> +	case EXC_INST_ILLEGAL:
> +		if (vcpu->arch.guest_context.hstatus & HSTATUS_SPV)
> +			ret = illegal_inst_fault(vcpu, run, stval);
> +		break;
>   	case EXC_INST_PAGE_FAULT:
>   	case EXC_LOAD_PAGE_FAULT:
>   	case EXC_STORE_PAGE_FAULT:
> 


  reply	other threads:[~2019-08-22 12:19 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-22  8:42 [PATCH v5 00/20] KVM RISC-V Support Anup Patel
2019-08-22  8:42 ` [PATCH v5 01/20] KVM: RISC-V: Add KVM_REG_RISCV for ONE_REG interface Anup Patel
2019-08-22  8:42 ` [PATCH v5 02/20] RISC-V: Add bitmap reprensenting ISA features common across CPUs Anup Patel
2019-08-22  8:43 ` [PATCH v5 03/20] RISC-V: Export few kernel symbols Anup Patel
2019-08-22  8:43 ` [PATCH v5 04/20] RISC-V: Add hypervisor extension related CSR defines Anup Patel
2019-08-22  8:43 ` [PATCH v5 05/20] RISC-V: Add initial skeletal KVM support Anup Patel
2019-08-22  8:43 ` [PATCH v5 06/20] RISC-V: KVM: Implement VCPU create, init and destroy functions Anup Patel
2019-08-22  8:44 ` [PATCH v5 07/20] RISC-V: KVM: Implement VCPU interrupts and requests handling Anup Patel
2019-08-22  8:44 ` [PATCH v5 08/20] RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls Anup Patel
2019-08-22 12:01   ` Alexander Graf
2019-08-22 14:00     ` Anup Patel
2019-08-22 14:12       ` Alexander Graf
2019-08-23 11:20         ` Anup Patel
2019-08-23 11:42           ` Graf (AWS), Alexander
2019-08-22 14:05     ` Anup Patel
2019-08-22  8:44 ` [PATCH v5 09/20] RISC-V: KVM: Implement VCPU world-switch Anup Patel
2019-08-22  8:44 ` [PATCH v5 10/20] RISC-V: KVM: Handle MMIO exits for VCPU Anup Patel
2019-08-22 12:10   ` Alexander Graf
2019-08-22 12:21     ` Andrew Jones
2019-08-22 12:27     ` Anup Patel
2019-08-22 12:14   ` Alexander Graf
2019-08-22 12:33     ` Anup Patel
2019-08-22 13:25       ` Alexander Graf
2019-08-22 13:55         ` Anup Patel
2019-08-22  8:45 ` [PATCH v5 11/20] RISC-V: KVM: Handle WFI " Anup Patel
2019-08-22 12:19   ` Alexander Graf [this message]
2019-08-22 12:50     ` Anup Patel
2019-08-22  8:45 ` [PATCH v5 12/20] RISC-V: KVM: Implement VMID allocator Anup Patel
2019-08-22  8:45 ` [PATCH v5 13/20] RISC-V: KVM: Implement stage2 page table programming Anup Patel
2019-08-22 12:28   ` Alexander Graf
2019-08-22 12:38     ` Anup Patel
2019-08-22 13:27       ` Alexander Graf
2019-08-22 13:58         ` Anup Patel
2019-08-22 14:09           ` Alexander Graf
2019-08-23 11:21             ` Anup Patel
2019-08-22  8:45 ` [PATCH v5 14/20] RISC-V: KVM: Implement MMU notifiers Anup Patel
2019-08-22  8:46 ` [PATCH v5 15/20] RISC-V: KVM: Add timer functionality Anup Patel
2019-08-23  7:52   ` Alexander Graf
2019-08-23 11:04     ` Anup Patel
2019-08-23 11:33       ` Graf (AWS), Alexander
2019-08-23 11:46         ` Anup Patel
2019-08-23 11:49           ` Alexander Graf
2019-08-23 12:11             ` Anup Patel
2019-08-23 12:25               ` Alexander Graf
2019-08-22  8:46 ` [PATCH v5 16/20] RISC-V: KVM: FP lazy save/restore Anup Patel
2019-08-22  8:46 ` [PATCH v5 17/20] RISC-V: KVM: Implement ONE REG interface for FP registers Anup Patel
2019-08-22  8:46 ` [PATCH v5 18/20] RISC-V: KVM: Add SBI v0.1 support Anup Patel
2019-08-23  8:04   ` Alexander Graf
2019-08-23 11:17     ` Anup Patel
2019-08-23 11:38       ` Graf (AWS), Alexander
2019-08-23 12:00         ` Anup Patel
2019-08-23 12:19           ` Alexander Graf
2019-08-23 12:28             ` Anup Patel
2019-08-22  8:47 ` [PATCH v5 19/20] RISC-V: Enable VIRTIO drivers in RV64 and RV32 defconfig Anup Patel
2019-08-22  8:47 ` [PATCH v5 20/20] RISC-V: KVM: Add MAINTAINERS entry Anup Patel
2019-08-23  8:08 ` [PATCH v5 00/20] KVM RISC-V Support Alexander Graf
2019-08-23 11:25   ` Anup Patel
2019-08-23 11:44     ` Graf (AWS), Alexander
2019-08-23 12:10       ` Paolo Bonzini
2019-08-23 12:19         ` Anup Patel
2019-08-23 12:28           ` Alexander Graf

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