From: Alexander Graf <graf@amazon.com>
To: Anup Patel <anup@brainfault.org>, Paolo Bonzini <pbonzini@redhat.com>
Cc: Anup Patel <Anup.Patel@wdc.com>,
Palmer Dabbelt <palmer@sifive.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
Radim K <rkrcmar@redhat.com>,
"Daniel Lezcano" <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
Atish Patra <Atish.Patra@wdc.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Damien Le Moal <Damien.LeMoal@wdc.com>,
"Christoph Hellwig" <hch@infradead.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v5 00/20] KVM RISC-V Support
Date: Fri, 23 Aug 2019 14:28:07 +0200 [thread overview]
Message-ID: <5a9ccf5f-ee75-9289-814e-0c8b9b3c3f00@amazon.com> (raw)
In-Reply-To: <CAAhSdy1k96m8GinxAhcfRL_gOxCzK+ODfyjDxCmr-AF2ycntwA@mail.gmail.com>
On 23.08.19 14:19, Anup Patel wrote:
> On Fri, Aug 23, 2019 at 5:40 PM Paolo Bonzini <pbonzini@redhat.com> wrote:
>>
>> On 23/08/19 13:44, Graf (AWS), Alexander wrote:
>>>> Overall, I'm quite happy with the code. It's a very clean implementation
>>>> of a KVM target.
>>
>> Yup, I said the same even for v1 (I prefer recursive implementation of
>> page table walking but that's all I can say).
>>
>>>> I will send v6 next week. I will try my best to implement unpriv
>>>> trap handling in v6 itself.
>>> Are you sure unpriv is the only exception that can hit there? What
>>> about NMIs? Do you have #MCs yet (ECC errors)? Do you have something
>>> like ARM's #SError which can asynchronously hit at any time because
>>> of external bus (PCI) errors?
>>
>> As far as I know, all interrupts on RISC-V are disabled by
>> local_irq_disable()/local_irq_enable().
>
> Yes, we don't have per-CPU interrupts for async bus errors or
> non-maskable interrupts. The local_irq_disable() and local_irq_enable()
> affect all interrupts (excepts traps).
Awesome, so that means you really only need to worry about traps. Even
easier then! :)
Also, you want to look out for a future extension that adds any of the
above (NMI, MCE, SError on local bus), as that would then break the
function ;)
Alex
prev parent reply other threads:[~2019-08-23 12:28 UTC|newest]
Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-22 8:42 [PATCH v5 00/20] KVM RISC-V Support Anup Patel
2019-08-22 8:42 ` [PATCH v5 01/20] KVM: RISC-V: Add KVM_REG_RISCV for ONE_REG interface Anup Patel
2019-08-22 8:42 ` [PATCH v5 02/20] RISC-V: Add bitmap reprensenting ISA features common across CPUs Anup Patel
2019-08-22 8:43 ` [PATCH v5 03/20] RISC-V: Export few kernel symbols Anup Patel
2019-08-22 8:43 ` [PATCH v5 04/20] RISC-V: Add hypervisor extension related CSR defines Anup Patel
2019-08-22 8:43 ` [PATCH v5 05/20] RISC-V: Add initial skeletal KVM support Anup Patel
2019-08-22 8:43 ` [PATCH v5 06/20] RISC-V: KVM: Implement VCPU create, init and destroy functions Anup Patel
2019-08-22 8:44 ` [PATCH v5 07/20] RISC-V: KVM: Implement VCPU interrupts and requests handling Anup Patel
2019-08-22 8:44 ` [PATCH v5 08/20] RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls Anup Patel
2019-08-22 12:01 ` Alexander Graf
2019-08-22 14:00 ` Anup Patel
2019-08-22 14:12 ` Alexander Graf
2019-08-23 11:20 ` Anup Patel
2019-08-23 11:42 ` Graf (AWS), Alexander
2019-08-22 14:05 ` Anup Patel
2019-08-22 8:44 ` [PATCH v5 09/20] RISC-V: KVM: Implement VCPU world-switch Anup Patel
2019-08-22 8:44 ` [PATCH v5 10/20] RISC-V: KVM: Handle MMIO exits for VCPU Anup Patel
2019-08-22 12:10 ` Alexander Graf
2019-08-22 12:21 ` Andrew Jones
2019-08-22 12:27 ` Anup Patel
2019-08-22 12:14 ` Alexander Graf
2019-08-22 12:33 ` Anup Patel
2019-08-22 13:25 ` Alexander Graf
2019-08-22 13:55 ` Anup Patel
2019-08-22 8:45 ` [PATCH v5 11/20] RISC-V: KVM: Handle WFI " Anup Patel
2019-08-22 12:19 ` Alexander Graf
2019-08-22 12:50 ` Anup Patel
2019-08-22 8:45 ` [PATCH v5 12/20] RISC-V: KVM: Implement VMID allocator Anup Patel
2019-08-22 8:45 ` [PATCH v5 13/20] RISC-V: KVM: Implement stage2 page table programming Anup Patel
2019-08-22 12:28 ` Alexander Graf
2019-08-22 12:38 ` Anup Patel
2019-08-22 13:27 ` Alexander Graf
2019-08-22 13:58 ` Anup Patel
2019-08-22 14:09 ` Alexander Graf
2019-08-23 11:21 ` Anup Patel
2019-08-22 8:45 ` [PATCH v5 14/20] RISC-V: KVM: Implement MMU notifiers Anup Patel
2019-08-22 8:46 ` [PATCH v5 15/20] RISC-V: KVM: Add timer functionality Anup Patel
2019-08-23 7:52 ` Alexander Graf
2019-08-23 11:04 ` Anup Patel
2019-08-23 11:33 ` Graf (AWS), Alexander
2019-08-23 11:46 ` Anup Patel
2019-08-23 11:49 ` Alexander Graf
2019-08-23 12:11 ` Anup Patel
2019-08-23 12:25 ` Alexander Graf
2019-08-22 8:46 ` [PATCH v5 16/20] RISC-V: KVM: FP lazy save/restore Anup Patel
2019-08-22 8:46 ` [PATCH v5 17/20] RISC-V: KVM: Implement ONE REG interface for FP registers Anup Patel
2019-08-22 8:46 ` [PATCH v5 18/20] RISC-V: KVM: Add SBI v0.1 support Anup Patel
2019-08-23 8:04 ` Alexander Graf
2019-08-23 11:17 ` Anup Patel
2019-08-23 11:38 ` Graf (AWS), Alexander
2019-08-23 12:00 ` Anup Patel
2019-08-23 12:19 ` Alexander Graf
2019-08-23 12:28 ` Anup Patel
2019-08-22 8:47 ` [PATCH v5 19/20] RISC-V: Enable VIRTIO drivers in RV64 and RV32 defconfig Anup Patel
2019-08-22 8:47 ` [PATCH v5 20/20] RISC-V: KVM: Add MAINTAINERS entry Anup Patel
2019-08-23 8:08 ` [PATCH v5 00/20] KVM RISC-V Support Alexander Graf
2019-08-23 11:25 ` Anup Patel
2019-08-23 11:44 ` Graf (AWS), Alexander
2019-08-23 12:10 ` Paolo Bonzini
2019-08-23 12:19 ` Anup Patel
2019-08-23 12:28 ` Alexander Graf [this message]
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