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From: Julien Thierry <julien.thierry@arm.com>
To: Marc Zyngier <marc.zyngier@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org
Cc: "Raslan, KarimAllah" <karahmed@amazon.de>
Subject: Re: [PATCH 3/8] KVM: arm/arm64: vgic-its: Cache successful MSI->LPI translation
Date: Fri, 7 Jun 2019 09:35:30 +0100	[thread overview]
Message-ID: <d9849310-7ff9-2385-d0e2-ac1de2878517@arm.com> (raw)
In-Reply-To: <20190606165455.162478-4-marc.zyngier@arm.com>

Hi Marc,

On 06/06/2019 17:54, Marc Zyngier wrote:
> On a successful translation, preserve the parameters in the LPI
> translation cache. Each translation is reusing the last slot
> in the list, naturally evincting the least recently used entry.
> 
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
>  virt/kvm/arm/vgic/vgic-its.c | 41 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 41 insertions(+)
> 
> diff --git a/virt/kvm/arm/vgic/vgic-its.c b/virt/kvm/arm/vgic/vgic-its.c
> index 5758504fd934..bc370b6c5afa 100644
> --- a/virt/kvm/arm/vgic/vgic-its.c
> +++ b/virt/kvm/arm/vgic/vgic-its.c
> @@ -538,6 +538,45 @@ static unsigned long vgic_mmio_read_its_idregs(struct kvm *kvm,
>  	return 0;
>  }
>  
> +static void vgic_its_cache_translation(struct kvm *kvm, struct vgic_its *its,
> +				       u32 devid, u32 eventid,
> +				       struct vgic_irq *irq)
> +{
> +	struct vgic_dist *dist = &kvm->arch.vgic;
> +	struct vgic_translation_cache_entry *cte;
> +	unsigned long flags;
> +
> +	/* Do not cache a directly injected interrupt */
> +	if (irq->hw)
> +		return;
> +
> +	raw_spin_lock_irqsave(&dist->lpi_list_lock, flags);
> +
> +	/* Always reuse the last entry (LRU policy) */
> +	cte = list_last_entry(&dist->lpi_translation_cache,
> +			      typeof(*cte), entry);
> +
> +	/*
> +	 * Caching the translation implies having an extra reference
> +	 * to the interrupt, so drop the potential reference on what
> +	 * was in the cache, and increment it on the new interrupt.
> +	 */
> +	if (cte->irq)
> +		__vgic_put_lpi_locked(kvm, cte->irq);
> +
> +	vgic_get_irq_kref(irq);

If cte->irq == irq, can we avoid the ref putting and getting and just
move the list entry (and update cte)?

Cheers,

-- 
Julien Thierry
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  reply	other threads:[~2019-06-07  8:35 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-06 16:54 [PATCH 0/8] KVM: arm/arm64: vgic: ITS translation cache Marc Zyngier
2019-06-06 16:54 ` [PATCH 1/8] KVM: arm/arm64: vgic: Add LPI translation cache definition Marc Zyngier
2019-06-07  3:47   ` Saidi, Ali
2019-06-07  7:38     ` Marc Zyngier
2019-06-07  8:12   ` Julien Thierry
2019-06-07  8:38     ` Marc Zyngier
2019-06-07 12:09   ` Auger Eric
2019-06-07 12:44     ` Marc Zyngier
2019-06-07 14:15       ` Auger Eric
2019-06-07 15:04         ` Marc Zyngier
2019-06-06 16:54 ` [PATCH 2/8] KVM: arm/arm64: vgic: Add __vgic_put_lpi_locked primitive Marc Zyngier
2019-06-07 12:11   ` Auger Eric
2019-06-06 16:54 ` [PATCH 3/8] KVM: arm/arm64: vgic-its: Cache successful MSI->LPI translation Marc Zyngier
2019-06-07  8:35   ` Julien Thierry [this message]
2019-06-07  8:51     ` Marc Zyngier
2019-06-07  8:56       ` Julien Thierry
2019-06-07  9:16         ` Marc Zyngier
2019-06-07 14:29   ` Auger Eric
2019-06-06 16:54 ` [PATCH 4/8] KVM: arm/arm64: vgic-its: Add kvm parameter to vgic_its_free_collection Marc Zyngier
2019-06-07 14:29   ` Auger Eric
2019-06-07 14:49     ` Marc Zyngier
2019-06-06 16:54 ` [PATCH 5/8] KVM: arm/arm64: vgic-its: Invalidate MSI-LPI translation cache on specific commands Marc Zyngier
2019-06-06 16:54 ` [PATCH 6/8] KVM: arm/arm64: vgic-its: Invalidate MSI-LPI translation cache on disabling LPIs Marc Zyngier
2019-06-06 16:54 ` [PATCH 7/8] KVM: arm/arm64: vgic-its: Check the LPI translation cache on MSI injection Marc Zyngier
2019-06-06 16:54 ` [PATCH 8/8] KVM: arm/arm64: vgic-irqfd: Implement kvm_arch_set_irq_inatomic Marc Zyngier

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