Re: [PATCH v3 0/5] arm64: SPE ACPI enablement

From: Hanjun Guo <guohanjun@huawei.com>
To: Jeremy Linton <jeremy.linton@arm.com>,
	<linux-arm-kernel@lists.infradead.org>
Cc: <linux-acpi@vger.kernel.org>, <catalin.marinas@arm.com>,
	<will.deacon@arm.com>, <rjw@rjwysocki.net>, <lenb@kernel.org>,
	<mark.rutland@arm.com>, <lorenzo.pieralisi@arm.com>,
	<sudeep.holla@arm.com>, <linuxarm@huawei.com>,
	<john.garry@huawei.com>, Hongbo Yao <yaohongbo@huawei.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>
Subject: Re: [PATCH v3 0/5] arm64: SPE ACPI enablement
Date: Wed, 8 May 2019 17:35:51 +0800	[thread overview]
Message-ID: <819de863-92ff-51c5-9c35-880db4f6a922@huawei.com> (raw)
In-Reply-To: <82032e5b-0cb5-e48f-ab51-ba5d5f9dceec@arm.com>

+Cc Alexander.

On 2019/5/8 1:58, Jeremy Linton wrote:
> Hi,
> 
> On 5/4/19 6:06 AM, Hanjun Guo wrote:
>> Hi Jeremy, Mark,
>>
>> On 2019/5/4 7:24, Jeremy Linton wrote:
>>> This patch series enables the Arm Statistical Profiling
>>> Extension (SPE) on ACPI platforms.
>>>
>>> This is possible because ACPI 6.3 uses a previously
>>> reserved field in the MADT to store the SPE interrupt
>>> number, similarly to how the normal PMU is described.
>>> If a consistent valid interrupt exists across all the
>>> cores in the system, a platform device is registered.
>>> That then triggers the SPE module, which runs as normal.
>>>
>>> We also add the ability to parse the PPTT for IDENTICAL
>>> cores. We then use this to sanity check the single SPE
>>> device we create. This creates a bit of a problem with
>>> respect to the specification though. The specification
>>> says that its legal for multiple tree's to exist in the
>>> PPTT. We handle this fine, but what happens in the
>>> case of multiple tree's is that the lack of a common
>>> node with IDENTICAL set forces us to assume that there
>>> are multiple non-IDENTICAL cores in the machine.
>>
>> Adding this patch set on top of latest mainline kernel,
>> and tested on D06 which has the SPE feature, in boot message
>> shows it was probed successfully:
>>
>> arm_spe_pmu arm,spe-v1: probed for CPUs 0-95 [max_record_sz 128, align 4, features 0x7]
>>
>> but when I test it with spe events such as
>>
>> perf record -c 1024 -e arm_spe_0/branch_filter=0/ -o spe ls
>>
>> it fails with:
>> failed to mmap with 12 (Cannot allocate memory),
>>
>> Confirmed that patch [0] is merged and other perf events are working
>> fine.
> 
> Its pretty easy to get into the weeds with this driver, does it work with examples like:
> 
> https://lkml.org/lkml/2018/1/14/122

No, not work at all.

SPE works on 5.0, but not work after 5.1-rc1, bisected to this commit:

5768402fd9c6 perf/ring_buffer: Use high order allocations for AUX buffers optimistically

Cced Alexander as well as Alexander is the author of above patch.

Thanks
Hanjun