From: Peter Zijlstra <peterz@infradead.org>
To: Boqun Feng <boqun.feng@gmail.com>
Cc: Guo Ren <guoren@kernel.org>, Huacai Chen <chenhuacai@gmail.com>,
Geert Uytterhoeven <geert@linux-m68k.org>,
Huacai Chen <chenhuacai@loongson.cn>,
Ingo Molnar <mingo@redhat.com>, Will Deacon <will@kernel.org>,
Arnd Bergmann <arnd@arndb.de>, Waiman Long <longman@redhat.com>,
Linux-Arch <linux-arch@vger.kernel.org>,
Rui Wang <wangrui@loongson.cn>,
Xuefeng Li <lixuefeng@loongson.cn>,
Jiaxun Yang <jiaxun.yang@flygoat.com>
Subject: Re: [PATCH RFC 1/2] arch: Introduce ARCH_HAS_HW_XCHG_SMALL
Date: Tue, 27 Jul 2021 12:12:47 +0200 [thread overview]
Message-ID: <YP/cHzVmebtbMDBF@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <YP7q5GBweaeWgvcs@boqun-archlinux>
On Tue, Jul 27, 2021 at 01:03:32AM +0800, Boqun Feng wrote:
> I'm missing you point here, a) ll/sc can provide forward progress and b)
> ll/sc instructions are used to implement xchg/cmpxchg (see ARM64 and
> PPC).
Correct on both counts, but b) is tricky, even if a), then it doesn't
hold that the primitive resulting from b) also provides fwd progress.
I feel this point is often overlooked. I should go add something to
atomic_t.txt about that I suppose.
> > How to make CPU guarantee "load + cmpxchg" forward-progress? Fusion
> > these instructions and lock the snoop channel?
> > Maybe hardware guys would think that it's easier to implement cas +
> > dcas + amo(short & byte).
> >
>
> Please note that if _Q_PENDING_BITS == 1, then the xchg_tail() is
> implemented as a "load + cmpxchg", so if "load + cmpxchg" implementation
> of xchg16() doesn't provide forward-progress in an architecture, neither
> does xchg_tail().
Right, so generally we rely on cmpxchg() to provide fairness. Some
architectures (notably Sparc64) go to great lengths to ensure this.
I have memories of adding backoff to an LL/SC based arch at some point,
but I cannot find it in a hurry, so it could be one of the since deleted
archs.
next prev parent reply other threads:[~2021-07-27 10:17 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-24 12:36 [PATCH RFC 1/2] arch: Introduce ARCH_HAS_HW_XCHG_SMALL Huacai Chen
2021-07-24 12:36 ` [PATCH RFC 2/2] qspinlock: Use ARCH_HAS_HW_XCHG_SMALL to select _Q_PENDING_BITS definition Huacai Chen
2021-07-24 19:24 ` [PATCH RFC 1/2] arch: Introduce ARCH_HAS_HW_XCHG_SMALL Arnd Bergmann
2021-07-25 3:06 ` Jiaxun Yang
2021-07-25 10:08 ` Arnd Bergmann
2021-07-26 8:36 ` Geert Uytterhoeven
2021-07-26 8:56 ` Huacai Chen
2021-07-26 10:39 ` Boqun Feng
2021-07-26 16:41 ` Guo Ren
2021-07-26 17:03 ` Boqun Feng
2021-07-26 21:20 ` Waiman Long
2021-07-27 1:27 ` Guo Ren
2021-07-27 2:29 ` Boqun Feng
2021-07-27 2:46 ` Waiman Long
2021-07-27 11:05 ` Peter Zijlstra
2021-07-28 10:40 ` Huacai Chen
2021-07-28 11:01 ` Peter Zijlstra
2021-07-29 16:38 ` Huacai Chen
2021-07-27 10:17 ` Peter Zijlstra
2021-07-27 1:07 ` Guo Ren
2021-07-27 1:52 ` Wang Rui
2021-07-27 11:03 ` Peter Zijlstra
2021-07-27 2:00 ` Boqun Feng
2021-07-27 10:50 ` Peter Zijlstra
2021-07-27 10:12 ` Peter Zijlstra [this message]
2021-07-26 9:00 ` Arnd Bergmann
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