* [PATCH v3 0/3] arm: dts: imx8mq: Add cpufreq support
@ 2019-02-28 21:42 Abel Vesa
2019-02-28 21:42 ` [PATCH v3 1/3] arm64: dts: imx8mq: Add the clocks and the latencies for the A53 cores Abel Vesa
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Abel Vesa @ 2019-02-28 21:42 UTC (permalink / raw)
To: Rob Herring, Stephen Boyd, Mark Rutland, Mike Turquette,
Shawn Guo, Sascha Hauer, Lucas Stach, Angus Ainslie, Anson Huang
Cc: devicetree, Abel Vesa, Linux Kernel Mailing List, dl-linux-imx,
linux-clk, linux-arm-kernel
Changes since v2:
* renamed the regulator
* removed the useless enable-active-high from the regulator
* renamed a53_0_opp_table to a53_opp_table
Abel Vesa (3):
arm64: dts: imx8mq: Add the clocks and the latencies for the A53 cores
arm64: dts: imx8mq: Add the buck vdd_arm regulator
arm64: dts: imx8mq: Add the opp table and cores opp properties
arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 35 ++++++++++++++++++++++++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 31 ++++++++++++++++++++++++
2 files changed, 66 insertions(+)
--
2.7.4
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^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v3 1/3] arm64: dts: imx8mq: Add the clocks and the latencies for the A53 cores
2019-02-28 21:42 [PATCH v3 0/3] arm: dts: imx8mq: Add cpufreq support Abel Vesa
@ 2019-02-28 21:42 ` Abel Vesa
2019-02-28 21:42 ` [PATCH v3 2/3] arm64: dts: imx8mq: Add the buck vdd_arm regulator Abel Vesa
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Abel Vesa @ 2019-02-28 21:42 UTC (permalink / raw)
To: Rob Herring, Stephen Boyd, Mark Rutland, Mike Turquette,
Shawn Guo, Sascha Hauer, Lucas Stach, Angus Ainslie, Anson Huang
Cc: devicetree, Abel Vesa, Linux Kernel Mailing List, dl-linux-imx,
linux-clk, linux-arm-kernel
The clocks and their latencies will be used by cpufreq-dt.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 9155bd4..1a89062 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -87,6 +87,8 @@
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0>;
+ clock-latency = <61036>; /* two CLK32 periods */
+ clocks = <&clk IMX8MQ_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
};
@@ -95,6 +97,8 @@
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x1>;
+ clock-latency = <61036>; /* two CLK32 periods */
+ clocks = <&clk IMX8MQ_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
};
@@ -103,6 +107,8 @@
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x2>;
+ clock-latency = <61036>; /* two CLK32 periods */
+ clocks = <&clk IMX8MQ_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
};
@@ -111,6 +117,8 @@
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x3>;
+ clock-latency = <61036>; /* two CLK32 periods */
+ clocks = <&clk IMX8MQ_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
};
--
2.7.4
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^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v3 2/3] arm64: dts: imx8mq: Add the buck vdd_arm regulator
2019-02-28 21:42 [PATCH v3 0/3] arm: dts: imx8mq: Add cpufreq support Abel Vesa
2019-02-28 21:42 ` [PATCH v3 1/3] arm64: dts: imx8mq: Add the clocks and the latencies for the A53 cores Abel Vesa
@ 2019-02-28 21:42 ` Abel Vesa
2019-02-28 21:42 ` [PATCH v3 3/3] arm64: dts: imx8mq: Add the opp table and cores opp properties Abel Vesa
2019-03-04 5:25 ` [PATCH v3 0/3] arm: dts: imx8mq: Add cpufreq support Shawn Guo
3 siblings, 0 replies; 5+ messages in thread
From: Abel Vesa @ 2019-02-28 21:42 UTC (permalink / raw)
To: Rob Herring, Stephen Boyd, Mark Rutland, Mike Turquette,
Shawn Guo, Sascha Hauer, Lucas Stach, Angus Ainslie, Anson Huang
Cc: devicetree, Abel Vesa, Linux Kernel Mailing List, dl-linux-imx,
linux-clk, linux-arm-kernel
According to the schematics, this is a MP2147 switch converter
which is controlled by GPIO1_IO13. When set the gpio is set to
high the regulator output is set to 0.9V. When the gpio is set
to low the regulator output is set to 1V.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 35 ++++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index 54737bf..afea110 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -31,6 +31,34 @@
gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
+
+ buck2_reg: regulator-buck2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_buck2>;
+ compatible = "regulator-gpio";
+ regulator-name = "vdd_arm";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1000000>;
+ gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+ states = <1000000 0x0
+ 900000 0x1>;
+ };
+};
+
+&A53_0 {
+ cpu-supply = <&buck2_reg>;
+};
+
+&A53_1 {
+ cpu-supply = <&buck2_reg>;
+};
+
+&A53_2 {
+ cpu-supply = <&buck2_reg>;
+};
+
+&A53_3 {
+ cpu-supply = <&buck2_reg>;
};
&fec1 {
@@ -203,6 +231,13 @@
};
&iomuxc {
+ pinctrl_buck2: vddarmgrp {
+ fsl,pins = <
+ MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x19
+ >;
+
+ };
+
pinctrl_fec1: fec1grp {
fsl,pins = <
MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3
--
2.7.4
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v3 3/3] arm64: dts: imx8mq: Add the opp table and cores opp properties
2019-02-28 21:42 [PATCH v3 0/3] arm: dts: imx8mq: Add cpufreq support Abel Vesa
2019-02-28 21:42 ` [PATCH v3 1/3] arm64: dts: imx8mq: Add the clocks and the latencies for the A53 cores Abel Vesa
2019-02-28 21:42 ` [PATCH v3 2/3] arm64: dts: imx8mq: Add the buck vdd_arm regulator Abel Vesa
@ 2019-02-28 21:42 ` Abel Vesa
2019-03-04 5:25 ` [PATCH v3 0/3] arm: dts: imx8mq: Add cpufreq support Shawn Guo
3 siblings, 0 replies; 5+ messages in thread
From: Abel Vesa @ 2019-02-28 21:42 UTC (permalink / raw)
To: Rob Herring, Stephen Boyd, Mark Rutland, Mike Turquette,
Shawn Guo, Sascha Hauer, Lucas Stach, Angus Ainslie, Anson Huang
Cc: devicetree, Abel Vesa, Linux Kernel Mailing List, dl-linux-imx,
linux-clk, linux-arm-kernel
Add the 0.8GHz and 1GHz opps. According to the datasheet:
https://www.nxp.com/docs/en/data-sheet/IMX8MDQLQIEC.pdf
section 3.1.3 Operating ranges.
The 0.8GHz opp runs in nominal mode with the regulator set to 0.9V.
The 1GHz runs in overdrive mode with the regulator set to 1V.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 1a89062..306e3e2 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -91,6 +91,7 @@
clocks = <&clk IMX8MQ_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
+ operating-points-v2 = <&a53_opp_table>;
};
A53_1: cpu@1 {
@@ -101,6 +102,7 @@
clocks = <&clk IMX8MQ_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
+ operating-points-v2 = <&a53_opp_table>;
};
A53_2: cpu@2 {
@@ -111,6 +113,7 @@
clocks = <&clk IMX8MQ_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
+ operating-points-v2 = <&a53_opp_table>;
};
A53_3: cpu@3 {
@@ -121,6 +124,7 @@
clocks = <&clk IMX8MQ_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
+ operating-points-v2 = <&a53_opp_table>;
};
A53_L2: l2-cache0 {
@@ -666,6 +670,25 @@
status = "disabled";
};
+
+ a53_opp_table: opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <150000>;
+ };
+
+ opp-1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <1000000>;
+ clock-latency-ns = <150000>;
+ opp-suspend;
+ };
+ };
+
gic: interrupt-controller@38800000 {
compatible = "arm,gic-v3";
reg = <0x38800000 0x10000>, /* GIC Dist */
--
2.7.4
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^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v3 0/3] arm: dts: imx8mq: Add cpufreq support
2019-02-28 21:42 [PATCH v3 0/3] arm: dts: imx8mq: Add cpufreq support Abel Vesa
` (2 preceding siblings ...)
2019-02-28 21:42 ` [PATCH v3 3/3] arm64: dts: imx8mq: Add the opp table and cores opp properties Abel Vesa
@ 2019-03-04 5:25 ` Shawn Guo
3 siblings, 0 replies; 5+ messages in thread
From: Shawn Guo @ 2019-03-04 5:25 UTC (permalink / raw)
To: Abel Vesa
Cc: Mark Rutland, Rob Herring, Anson Huang, devicetree, Stephen Boyd,
Mike Turquette, Linux Kernel Mailing List, dl-linux-imx,
Sascha Hauer, Angus Ainslie, linux-clk, linux-arm-kernel,
Lucas Stach
On Thu, Feb 28, 2019 at 09:42:43PM +0000, Abel Vesa wrote:
> Changes since v2:
> * renamed the regulator
> * removed the useless enable-active-high from the regulator
> * renamed a53_0_opp_table to a53_opp_table
>
> Abel Vesa (3):
> arm64: dts: imx8mq: Add the clocks and the latencies for the A53 cores
> arm64: dts: imx8mq: Add the buck vdd_arm regulator
> arm64: dts: imx8mq: Add the opp table and cores opp properties
Applied all, thanks.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2019-03-04 5:26 UTC | newest]
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2019-02-28 21:42 [PATCH v3 0/3] arm: dts: imx8mq: Add cpufreq support Abel Vesa
2019-02-28 21:42 ` [PATCH v3 1/3] arm64: dts: imx8mq: Add the clocks and the latencies for the A53 cores Abel Vesa
2019-02-28 21:42 ` [PATCH v3 2/3] arm64: dts: imx8mq: Add the buck vdd_arm regulator Abel Vesa
2019-02-28 21:42 ` [PATCH v3 3/3] arm64: dts: imx8mq: Add the opp table and cores opp properties Abel Vesa
2019-03-04 5:25 ` [PATCH v3 0/3] arm: dts: imx8mq: Add cpufreq support Shawn Guo
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