[kvmarm:kvm-arm64/nv-wip-v5.0-rc1 3/75] arch/arm/kvm/hyp/../../../../virt/kvm/arm/hyp/vgic-v3-sr.c:229:11: note: in expansion of macro 'read_gicreg'

[kvmarm:kvm-arm64/nv-wip-v5.0-rc1 3/75] arch/arm/kvm/hyp/../../../../virt/kvm/arm/hyp/vgic-v3-sr.c:229:11: note: in expansion of macro 'read_gicreg'

[kbuild test robot]

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tree:   https://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm.git kvm-arm64/nv-wip-v5.0-rc1
head:   688c386ca096f2c1f2eee386697586c88df5d5bc
commit: b8e5fdc85a46524d44283eca009e13f1dc91920c [3/75] KVM: arm64: Fix ICH_ELRSR_EL2 sysreg naming
config: arm-axm55xx_defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        git checkout b8e5fdc85a46524d44283eca009e13f1dc91920c
        # save the attached .config to linux build tree
        GCC_VERSION=7.2.0 make.cross ARCH=arm 

All error/warnings (new ones prefixed by >>):

   In file included from include/linux/irqchip/arm-gic-v3.h:578:0,
                    from arch/arm/kvm/hyp/../../../../virt/kvm/arm/hyp/vgic-v3-sr.c:19:
   arch/arm/kvm/hyp/../../../../virt/kvm/arm/hyp/vgic-v3-sr.c: In function '__vgic_v3_save_state':
>> arch/arm/include/asm/arch_gicv3.h:184:40: error: implicit declaration of function 'read_ICH_ELRSR_EL2'; did you mean 'read_ICH_ELSR_EL2'? [-Werror=implicit-function-declaration]
    #define read_gicreg(r)                 read_##r()
                                           ^
>> arch/arm/kvm/hyp/../../../../virt/kvm/arm/hyp/vgic-v3-sr.c:229:11: note: in expansion of macro 'read_gicreg'
      elrsr = read_gicreg(ICH_ELRSR_EL2);
              ^~~~~~~~~~~
   cc1: some warnings being treated as errors

vim +/read_gicreg +229 arch/arm/kvm/hyp/../../../../virt/kvm/arm/hyp/vgic-v3-sr.c

   207	
   208	void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu)
   209	{
   210		struct vgic_v3_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v3;
   211		u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs;
   212	
   213		/*
   214		 * Make sure stores to the GIC via the memory mapped interface
   215		 * are now visible to the system register interface when reading the
   216		 * LRs, and when reading back the VMCR on non-VHE systems.
   217		 */
   218		if (used_lrs || !has_vhe()) {
   219			if (!cpu_if->vgic_sre) {
   220				dsb(sy);
   221				isb();
   222			}
   223		}
   224	
   225		if (used_lrs) {
   226			int i;
   227			u32 elrsr;
   228	
 > 229			elrsr = read_gicreg(ICH_ELRSR_EL2);
   230	
   231			write_gicreg(cpu_if->vgic_hcr & ~ICH_HCR_EN, ICH_HCR_EL2);
   232	
   233			for (i = 0; i < used_lrs; i++) {
   234				if (elrsr & (1 << i))
   235					cpu_if->vgic_lr[i] &= ~ICH_LR_STATE;
   236				else
   237					cpu_if->vgic_lr[i] = __gic_v3_get_lr(i);
   238	
   239				__gic_v3_set_lr(0, i);
   240			}
   241		}
   242	}
   243	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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