From: Wei Li <liwei391@huawei.com>
To: Adrian Hunter <adrian.hunter@intel.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
James Clark <james.clark@arm.com>, Jiri Olsa <jolsa@redhat.com>,
Leo Yan <leo.yan@linaro.org>, Mark Rutland <mark.rutland@arm.com>,
Namhyung Kim <namhyung@kernel.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Will Deacon <will@kernel.org>, <zhangshaokun@hisilicon.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, guohanjun@huawei.com
Subject: [PATCH 4/4] perf: arm-spe: Synthesize new events for ARMv8.3-SPE
Date: Fri, 24 Jul 2020 17:16:07 +0800 [thread overview]
Message-ID: <20200724091607.41903-5-liwei391@huawei.com> (raw)
In-Reply-To: <20200724091607.41903-1-liwei391@huawei.com>
Synthesize unaligned address access events and partial/empty
predicated SVE operation introduced by ARMv8.3-SPE.
They can be filtered by itrace options when reporting.
Signed-off-by: Wei Li <liwei391@huawei.com>
---
.../util/arm-spe-decoder/arm-spe-decoder.c | 11 ++++
.../util/arm-spe-decoder/arm-spe-decoder.h | 3 +
tools/perf/util/arm-spe.c | 61 +++++++++++++++++++
3 files changed, 75 insertions(+)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
index 93e063f22be5..fac8102c0149 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
@@ -197,6 +197,17 @@ static int arm_spe_read_record(struct arm_spe_decoder *decoder)
if (payload & BIT(EV_MISPRED))
decoder->record.type |= ARM_SPE_BRANCH_MISS;
+ if ((idx == 4 || idx == 8) &&
+ (payload & BIT(EV_ALIGNMENT)))
+ decoder->record.type |= ARM_SPE_ALIGNMENT;
+
+ if ((idx == 4 || idx == 8) &&
+ (payload & BIT(EV_PARTIAL_PREDICATE)))
+ decoder->record.type |= ARM_SPE_PARTIAL_PREDICATE;
+
+ if ((idx == 4 || idx == 8) &&
+ (payload & BIT(EV_EMPTY_PREDICATE)))
+ decoder->record.type |= ARM_SPE_EMPTY_PREDICATE;
break;
case ARM_SPE_DATA_SOURCE:
break;
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h
index a5111a8d4360..d165418fcc13 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h
@@ -39,6 +39,9 @@ enum arm_spe_sample_type {
ARM_SPE_TLB_MISS = 1 << 5,
ARM_SPE_BRANCH_MISS = 1 << 6,
ARM_SPE_REMOTE_ACCESS = 1 << 7,
+ ARM_SPE_ALIGNMENT = 1 << 8,
+ ARM_SPE_PARTIAL_PREDICATE = 1 << 9,
+ ARM_SPE_EMPTY_PREDICATE = 1 << 10,
};
struct arm_spe_record {
diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c
index 3882a5360ada..e36d6eea269b 100644
--- a/tools/perf/util/arm-spe.c
+++ b/tools/perf/util/arm-spe.c
@@ -53,6 +53,8 @@ struct arm_spe {
u8 sample_tlb;
u8 sample_branch;
u8 sample_remote_access;
+ u8 sample_alignment;
+ u8 sample_sve;
u64 l1d_miss_id;
u64 l1d_access_id;
@@ -62,6 +64,9 @@ struct arm_spe {
u64 tlb_access_id;
u64 branch_miss_id;
u64 remote_access_id;
+ u64 alignment_id;
+ u64 epred_sve_id;
+ u64 ppred_sve_id;
u64 kernel_start;
@@ -344,6 +349,30 @@ static int arm_spe_sample(struct arm_spe_queue *speq)
return err;
}
+ if (spe->sample_alignment &&
+ (record->type & ARM_SPE_ALIGNMENT)) {
+ err = arm_spe_synth_spe_events_sample(speq,
+ spe->alignment_id);
+ if (err)
+ return err;
+ }
+
+ if (spe->sample_sve) {
+ if (record->type & ARM_SPE_EMPTY_PREDICATE) {
+ err = arm_spe_synth_spe_events_sample(
+ speq, spe->epred_sve_id);
+ if (err)
+ return err;
+ }
+
+ if (record->type & ARM_SPE_PARTIAL_PREDICATE) {
+ err = arm_spe_synth_spe_events_sample(
+ speq, spe->ppred_sve_id);
+ if (err)
+ return err;
+ }
+ }
+
return 0;
}
@@ -907,6 +936,38 @@ arm_spe_synth_events(struct arm_spe *spe, struct perf_session *session)
id += 1;
}
+ if (spe->synth_opts.alignment) {
+ spe->sample_alignment = true;
+
+ /* Alignment */
+ err = arm_spe_synth_event(session, &attr, id);
+ if (err)
+ return err;
+ spe->alignment_id = id;
+ arm_spe_set_event_name(evlist, id, "alignment");
+ id += 1;
+ }
+
+ if (spe->synth_opts.sve) {
+ spe->sample_sve = true;
+
+ /* Empty predicated SVE */
+ err = arm_spe_synth_event(session, &attr, id);
+ if (err)
+ return err;
+ spe->epred_sve_id = id;
+ arm_spe_set_event_name(evlist, id, "sve-pred-empty");
+ id += 1;
+
+ /* Partial predicated SVE */
+ err = arm_spe_synth_event(session, &attr, id);
+ if (err)
+ return err;
+ spe->ppred_sve_id = id;
+ arm_spe_set_event_name(evlist, id, "sve-pred-partial");
+ id += 1;
+ }
+
return 0;
}
--
2.17.1
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next prev parent reply other threads:[~2020-07-24 9:19 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-24 9:16 [PATCH 0/4] Add support for ARMv8.3-SPE Wei Li
2020-07-24 9:16 ` [PATCH 1/4] drivers/perf: " Wei Li
2020-07-28 12:27 ` Leo Yan
2020-07-28 13:24 ` liwei (GF)
2020-07-29 7:08 ` Leo Yan
2020-07-29 9:12 ` Suzuki K Poulose
2020-07-30 8:14 ` Leo Yan
2020-07-31 12:18 ` liwei (GF)
2020-07-31 14:01 ` Suzuki K Poulose
2020-09-07 12:51 ` Will Deacon
2020-09-29 8:17 ` liwei (GF)
2020-07-24 9:16 ` [PATCH 2/4] perf: arm-spe: " Wei Li
2020-07-29 6:29 ` Leo Yan
2020-07-29 7:21 ` liwei (GF)
2020-07-29 7:28 ` Leo Yan
2020-07-29 7:42 ` liwei (GF)
2020-08-17 15:04 ` Leo Yan
2020-07-24 9:16 ` [PATCH 3/4] perf auxtrace: Add new itrace options " Wei Li
2020-07-29 6:51 ` Leo Yan
2020-07-24 9:16 ` Wei Li [this message]
2020-07-28 12:06 ` [PATCH 0/4] Add support " Arnaldo Carvalho de Melo
2020-07-28 12:41 ` Leo Yan
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