From: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
To: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de
Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
p.zabel@pengutronix.de, l.stach@pengutronix.de, krzk@kernel.org,
agx@sigxcpu.org, marex@denx.de, andrew.smirnov@gmail.com,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, ping.bai@nxp.com,
frieder.schrempf@kontron.de, aford173@gmail.com,
abel.vesa@nxp.com, Peng Fan <peng.fan@nxp.com>
Subject: [PATCH V2 2/4] Documentation: bindings: clk: Add bindings for i.MX BLK_CTL
Date: Fri, 30 Apr 2021 13:27:44 +0800 [thread overview]
Message-ID: <20210430052746.10815-3-peng.fan@oss.nxp.com> (raw)
In-Reply-To: <20210430052746.10815-1-peng.fan@oss.nxp.com>
From: Peng Fan <peng.fan@nxp.com>
Document the i.MX BLK_CTL with its devicetree properties.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
.../bindings/soc/imx/fsl,imx-blk-ctl.yaml | 73 +++++++++++++++++++
1 file changed, 73 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml
diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml
new file mode 100644
index 000000000000..a491b63de50c
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/imx/fsl,imx-blk-ctl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX BLK_CTL
+
+maintainers:
+ - Peng Fan <peng.fan@nxp.com>
+
+description:
+ i.MX BLK_CTL is a conglomerate of different GPRs that are
+ dedicated to a specific subsystem. It usually contains
+ clocks and resets amongst other things. Here we take the clocks
+ and resets as virtual PDs, the reason we could not take it as
+ clock provider is there is A/B lock issue between power domain
+ and clock.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - fsl,imx8mm-dispmix-blk-ctl
+ - fsl,imx8mm-vpumix-blk-ctl
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+ "#power-domain-cells":
+ const: 1
+
+ power-domains:
+ minItems: 1
+ maxItems: 32
+
+ power-domain-names:
+ minItems: 1
+ maxItems: 32
+
+ '#reset-cells':
+ const: 1
+
+ clocks:
+ minItems: 1
+ maxItems: 32
+
+ clock-names:
+ minItems: 1
+ maxItems: 32
+
+required:
+ - compatible
+ - reg
+ - power-domains
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/imx8mm-clock.h>
+
+ dispmix_blk_ctl: blk-ctl@32e28000 {
+ compatible = "fsl,imx8mm-dispmix-blk-ctl", "syscon";
+ reg = <0x32e28000 0x100>;
+ #power-domain-cells = <1>;
+ power-domains = <&pgc_dispmix>, <&pgc_mipi>;
+ power-domain-names = "dispmix", "mipi";
+ clocks = <&clk IMX8MM_CLK_DISP_ROOT>, <&clk IMX8MM_CLK_DISP_AXI_ROOT>,
+ <&clk IMX8MM_CLK_DISP_APB_ROOT>;
+ clock-names = "disp", "axi", "apb";
+ };
--
2.30.0
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next prev parent reply other threads:[~2021-04-30 4:58 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-30 5:27 [PATCH V2 0/4] soc: imx: add i.MX BLK-CTL support Peng Fan (OSS)
2021-04-30 5:27 ` [PATCH V2 1/4] dt-bindings: power: Add defines for i.MX8MM BLK-CTL power domains Peng Fan (OSS)
2021-04-30 5:27 ` Peng Fan (OSS) [this message]
2021-05-05 23:08 ` [PATCH V2 2/4] Documentation: bindings: clk: Add bindings for i.MX BLK_CTL Rob Herring
2021-05-06 0:50 ` Peng Fan (OSS)
2021-04-30 5:27 ` [PATCH V2 3/4] soc: imx: Add generic blk-ctl driver Peng Fan (OSS)
2021-05-04 9:47 ` Lucas Stach
2021-05-04 10:30 ` Peng Fan (OSS)
2021-05-04 10:16 ` Frieder Schrempf
2021-05-04 11:22 ` Peng Fan (OSS)
2021-05-06 7:55 ` Frieder Schrempf
2021-04-30 5:27 ` [PATCH V2 4/4] soc: imx: Add blk-ctl driver for i.MX8MM Peng Fan (OSS)
2021-05-04 10:25 ` Frieder Schrempf
2021-05-04 11:13 ` Fabio Estevam
2021-05-04 11:22 ` Peng Fan
2021-04-30 6:19 ` [PATCH V2 0/4] soc: imx: add i.MX BLK-CTL support Peng Fan
2021-05-03 14:57 ` Frieder Schrempf
2021-05-04 8:55 ` Frieder Schrempf
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