[PATCH v2 1/3] soc/tegra: pmc: Fail to allocate more than one wake IRQ

[PATCH v2 1/3] soc/tegra: pmc: Fail to allocate more than one wake IRQ

[Thierry Reding]

From: Thierry Reding <treding@nvidia.com>

The code currently doesn't support allocating more than one wake IRQ at
a time. Detect this situation and error out. Also make sure to output a
warning when that happens to help track down callers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 drivers/soc/tegra/pmc.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index 5648e5c09ef5..653fe2c466f6 100644
--- a/drivers/soc/tegra/pmc.c
+++ b/drivers/soc/tegra/pmc.c
@@ -1863,6 +1863,9 @@ static int tegra_pmc_irq_alloc(struct irq_domain *domain, unsigned int virq,
 	unsigned int i;
 	int err = 0;
 
+	if (WARN_ON(num_irqs > 1))
+		return -EINVAL;
+
 	for (i = 0; i < soc->num_wake_events; i++) {
 		const struct tegra_wake_event *event = &soc->wake_events[i];
 
-- 
2.21.0


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[PATCH v2 2/3] soc/tegra: pmc: Avoid crash for non-wake IRQs

[Thierry Reding]

From: Thierry Reding <treding@nvidia.com>

For interrupts that are not wakeup sources but that may end up getting
mapped through the PMC as interrupt parent (this can happen for GPIOs),
return early in order to avoid a subsequent crash from an out-of-bounds
access to the register region.

Reported-by: Bitan Biswas <bbiswas@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 drivers/soc/tegra/pmc.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index 653fe2c466f6..6e66b5e293be 100644
--- a/drivers/soc/tegra/pmc.c
+++ b/drivers/soc/tegra/pmc.c
@@ -1924,6 +1924,9 @@ static int tegra_pmc_irq_set_wake(struct irq_data *data, unsigned int on)
 	unsigned int offset, bit;
 	u32 value;
 
+	if (WARN_ON(data->hwirq == ULONG_MAX))
+		return 0;
+
 	offset = data->hwirq / 32;
 	bit = data->hwirq % 32;
 
-- 
2.21.0


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[PATCH v2 3/3] soc/tegra: pmc: Add comments clarifying wake events

[Thierry Reding]

From: Thierry Reding <treding@nvidia.com>

Add some comments to clarify the purpose of the wake event support
implemented in the PMC driver.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 drivers/soc/tegra/pmc.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index 6e66b5e293be..af8f63a844cd 100644
--- a/drivers/soc/tegra/pmc.c
+++ b/drivers/soc/tegra/pmc.c
@@ -241,6 +241,11 @@ struct tegra_pmc_soc {
 	const char * const *reset_levels;
 	unsigned int num_reset_levels;
 
+	/*
+	 * These describe events that can wake the system from sleep (i.e.
+	 * LP0 or SC7). Wakeup from other sleep states (such as LP1 or LP2)
+	 * are dealt with in the LIC.
+	 */
 	const struct tegra_wake_event *wake_events;
 	unsigned int num_wake_events;
 };
@@ -1906,6 +1911,11 @@ static int tegra_pmc_irq_alloc(struct irq_domain *domain, unsigned int virq,
 		}
 	}
 
+	/*
+	 * For interrupts that don't have associated wake events, assign a
+	 * dummy hardware IRQ number. This is used in the ->irq_set_type()
+	 * and ->irq_set_wake() callbacks to return early for these IRQs.
+	 */
 	if (i == soc->num_wake_events)
 		err = irq_domain_set_hwirq_and_chip(domain, virq, ULONG_MAX,
 						    &pmc->irq, pmc);
@@ -1924,6 +1934,7 @@ static int tegra_pmc_irq_set_wake(struct irq_data *data, unsigned int on)
 	unsigned int offset, bit;
 	u32 value;
 
+	/* nothing to do if there's no associated wake event */
 	if (WARN_ON(data->hwirq == ULONG_MAX))
 		return 0;
 
@@ -1954,6 +1965,7 @@ static int tegra_pmc_irq_set_type(struct irq_data *data, unsigned int type)
 	struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data);
 	u32 value;
 
+	/* nothing to do if there's no associated wake event */
 	if (data->hwirq == ULONG_MAX)
 		return 0;
 
-- 
2.21.0


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Re: [PATCH v2 3/3] soc/tegra: pmc: Add comments clarifying wake events

[Jon Hunter]

On 04/06/2019 16:51, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> Add some comments to clarify the purpose of the wake event support
> implemented in the PMC driver.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
>  drivers/soc/tegra/pmc.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
> index 6e66b5e293be..af8f63a844cd 100644
> --- a/drivers/soc/tegra/pmc.c
> +++ b/drivers/soc/tegra/pmc.c
> @@ -241,6 +241,11 @@ struct tegra_pmc_soc {
>  	const char * const *reset_levels;
>  	unsigned int num_reset_levels;
>  
> +	/*
> +	 * These describe events that can wake the system from sleep (i.e.
> +	 * LP0 or SC7). Wakeup from other sleep states (such as LP1 or LP2)
> +	 * are dealt with in the LIC.
> +	 */
>  	const struct tegra_wake_event *wake_events;
>  	unsigned int num_wake_events;
>  };
> @@ -1906,6 +1911,11 @@ static int tegra_pmc_irq_alloc(struct irq_domain *domain, unsigned int virq,
>  		}
>  	}
>  
> +	/*
> +	 * For interrupts that don't have associated wake events, assign a
> +	 * dummy hardware IRQ number. This is used in the ->irq_set_type()
> +	 * and ->irq_set_wake() callbacks to return early for these IRQs.
> +	 */
>  	if (i == soc->num_wake_events)
>  		err = irq_domain_set_hwirq_and_chip(domain, virq, ULONG_MAX,
>  						    &pmc->irq, pmc);
> @@ -1924,6 +1934,7 @@ static int tegra_pmc_irq_set_wake(struct irq_data *data, unsigned int on)
>  	unsigned int offset, bit;
>  	u32 value;
>  
> +	/* nothing to do if there's no associated wake event */
>  	if (WARN_ON(data->hwirq == ULONG_MAX))
>  		return 0;
>  
> @@ -1954,6 +1965,7 @@ static int tegra_pmc_irq_set_type(struct irq_data *data, unsigned int type)
>  	struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data);
>  	u32 value;
>  
> +	/* nothing to do if there's no associated wake event */
>  	if (data->hwirq == ULONG_MAX)
>  		return 0;
>  

For the series ...

Reviewed-by: Jon Hunter <jonathanh@nvidia.com>

Cheers
Jon


-- 
nvpublic

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