From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Stephen Boyd <sboyd@kernel.org>
Cc: Loic Poulain <loic.poulain@linaro.org>,
mturquette@baylibre.com, linux-arm-msm@vger.kernel.org,
linux-clk@vger.kernel.org
Subject: Re: [PATCH v2 2/4] clk: qcom: Add CPU clock driver for msm8996
Date: Sat, 20 Jun 2020 23:59:53 -0700 [thread overview]
Message-ID: <20200621065953.GB128451@builder.lan> (raw)
In-Reply-To: <159261287558.62212.16649006403982628548@swboyd.mtv.corp.google.com>
On Fri 19 Jun 17:27 PDT 2020, Stephen Boyd wrote:
> Quoting Loic Poulain (2020-06-04 03:35:25)
> > Each of the CPU clusters (Power and Perf) on msm8996 are
> > clocked via 2 PLLs, a primary and alternate. There are also
> > 2 Mux'es, a primary and secondary all connected together
> > as shown below
> >
> > +-------+
> > XO | |
> > +------------------>0 |
> > | |
> > PLL/2 | SMUX +----+
> > +------->1 | |
> > | | | |
> > | +-------+ | +-------+
> > | +---->0 |
> > | | |
> > +---------------+ | +----------->1 | CPU clk
> > |Primary PLL +----+ PLL_EARLY | | +------>
> > | +------+-----------+ +------>2 PMUX |
> > +---------------+ | | | |
> > | +------+ | +-->3 |
> > +--^+ ACD +-----+ | +-------+
> > +---------------+ +------+ |
> > |Alt PLL | |
> > | +---------------------------+
> > +---------------+ PLL_EARLY
> >
> > The primary PLL is what drives the CPU clk, except for times
> > when we are reprogramming the PLL itself (for rate changes) when
> > we temporarily switch to an alternate PLL. A subsequent patch adds
> > support to switch between primary and alternate PLL during rate
> > changes.
> >
> > The primary PLL operates on a single VCO range, between 600MHz
> > and 3GHz. However the CPUs do support OPPs with frequencies
> > between 300MHz and 600MHz. In order to support running the CPUs
> > at those frequencies we end up having to lock the PLL at twice
> > the rate and drive the CPU clk via the PLL/2 output and SMUX.
> >
> > So for frequencies above 600MHz we follow the following path
> > Primary PLL --> PLL_EARLY --> PMUX(1) --> CPU clk
> > and for frequencies between 300MHz and 600MHz we follow
> > Primary PLL --> PLL/2 --> SMUX(1) --> PMUX(0) --> CPU clk
> >
> > ACD stands for Adaptive Clock Distribution and is used to
> > detect voltage droops.
> >
> > Co-developed-by: Rajendra Nayak <rnayak@codeaurora.org>
> > Co-developed-by: Ilia Lin <ilialin@codeaurora.org>
>
> Co-developed-by should be combined with Signed-off-by tags.
>
> From Documentation/process/submitting-patches.rst
>
> "Co-developed-by: states that the patch was co-created by multiple developers;
> it is a used to give attribution to co-authors (in addition to the author
> attributed by the From: tag) when several people work on a single patch. Since
> Co-developed-by: denotes authorship, every Co-developed-by: must be immediately
> followed by a Signed-off-by: of the associated co-author."
>
...which is not what happened here.
By using Co-developed-by and a Signed-off-by one would state that
Rajendra certifies the origin of any additions done by Ilia and Loic.
Instead, Rajendra certified the origin of the original patch
(presumably) per 11.a by his s-o-b, then Ilia took the patch in whole or
part and certified that he can contribute it per 11.a or 11.c with his
s-o-b, then finally Loic should do the same, by adding his s-o-b.
As such we should see three Signed-off-by here, preferably with [name:
changelog] entries inbetween to document any modifications done to the
patch.
Regards,
Bjorn
> > Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
> > ---
> > drivers/clk/qcom/Kconfig | 8 +
> > drivers/clk/qcom/Makefile | 1 +
> > drivers/clk/qcom/clk-alpha-pll.h | 6 +
> > drivers/clk/qcom/clk-cpu-8996.c | 538 +++++++++++++++++++++++++++++++++++++++
> > 4 files changed, 553 insertions(+)
> > create mode 100644 drivers/clk/qcom/clk-cpu-8996.c
> >
> > diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
> > index abb121f..87b515d 100644
> > --- a/drivers/clk/qcom/Kconfig
> > +++ b/drivers/clk/qcom/Kconfig
> > @@ -37,6 +37,14 @@ config QCOM_CLK_APCS_MSM8916
> > Say Y if you want to support CPU frequency scaling on devices
> > such as msm8916.
> >
> > +config QCOM_CLK_APCC_MSM8996
> > + tristate "MSM8996 CPU Clock Controller"
> > + select QCOM_KRYO_L2_ACCESSORS
>
> This needs to depend on ARM || ARM64 because it uses the kryo accessors which
> are architecture specific instructions.
>
> > + help
> > + Support for the CPU clock controller on msm8996 devices.
> > + Say Y if you want to support CPU clock scaling using CPUfreq
> > + drivers for dyanmic power management.
> > +
> > config QCOM_CLK_RPM
> > tristate "RPM based Clock Controller"
> > depends on MFD_QCOM_RPM
next prev parent reply other threads:[~2020-06-21 7:02 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-04 10:35 [PATCH v2 0/4] msm8996 CPU scaling support Loic Poulain
2020-06-04 10:35 ` [PATCH v2 1/4] soc: qcom: Separate kryo l2 accessors from PMU driver Loic Poulain
2020-06-20 0:23 ` Stephen Boyd
2020-07-03 13:18 ` Will Deacon
2020-06-04 10:35 ` [PATCH v2 2/4] clk: qcom: Add CPU clock driver for msm8996 Loic Poulain
2020-06-20 0:27 ` Stephen Boyd
2020-06-21 6:59 ` Bjorn Andersson [this message]
2020-06-04 10:35 ` [PATCH v2 3/4] dt-bindings: clk: qcom: Add bindings for CPU clock " Loic Poulain
2020-06-20 0:24 ` Stephen Boyd
2020-06-04 10:35 ` [PATCH v2 4/4] arch: arm64: dts: msm8996: Add opp and thermal Loic Poulain
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200621065953.GB128451@builder.lan \
--to=bjorn.andersson@linaro.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=loic.poulain@linaro.org \
--cc=mturquette@baylibre.com \
--cc=sboyd@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).