From: Marc Gonzalez <marc.w.gonzalez@free.fr>
To: Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>
Cc: Jeffrey Hugo <jhugo@codeaurora.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
linux-clk <linux-clk@vger.kernel.org>,
MSM <linux-arm-msm@vger.kernel.org>,
Evan Green <evgreen@chromium.org>,
Douglas Anderson <dianders@chromium.org>,
Vinod Koul <vkoul@kernel.org>,
Manu Gautam <mgautam@codeaurora.org>,
Amit Nischal <anischal@codeaurora.org>
Subject: Re: [PATCH v1] clk: qcom: Skip halt checks on gcc_pcie_0_pipe_clk for 8998
Date: Mon, 1 Apr 2019 10:48:01 +0200 [thread overview]
Message-ID: <fd7f35ce-69c7-e92c-cb2e-b6bcf4126931@free.fr> (raw)
In-Reply-To: <155389876377.20095.15037552865160559827@swboyd.mtv.corp.google.com>
On 29/03/2019 23:32, Stephen Boyd wrote:
> I keep asking Qualcomm engineers every time this comes up why they can't
> fix their phy initialization sequence.
If I had the clock-tree documentation, I'd give it a shot. But qcom sits
on their "internal" documentation like a dragon on his pile o' gold.
In the mean time, will you take the patch? :-)
Regards.
next prev parent reply other threads:[~2019-04-01 8:48 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-25 13:49 [PATCH v1] clk: qcom: Skip halt checks on gcc_pcie_0_pipe_clk for 8998 Marc Gonzalez
2019-03-28 16:26 ` Marc Gonzalez
2019-03-29 22:32 ` Stephen Boyd
2019-04-01 8:48 ` Marc Gonzalez [this message]
2019-10-09 8:31 ` Manu Gautam
2019-10-10 4:15 ` Stephen Boyd
2019-10-10 7:33 ` Manu Gautam
2019-10-10 19:48 ` Stephen Boyd
2019-10-11 3:47 ` Manu Gautam
2019-10-17 17:49 ` Stephen Boyd
2019-04-05 12:29 ` Marc Gonzalez
2019-04-09 13:25 ` Jeffrey Hugo
2019-04-11 20:38 ` Stephen Boyd
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