From: Megha Dey <megha.dey@intel.com>
To: linux-crypto@vger.kernel.org, herbert@gondor.apana.org.au,
davem@davemloft.net
Cc: ravi.v.shankar@intel.com, tim.c.chen@intel.com,
andi.kleen@intel.com, dave.hansen@intel.com, megha.dey@intel.com,
greg.b.tucker@intel.com, robert.a.kasten@intel.com,
rajendrakumar.chinnaiyan@intel.com, tomasz.kantecki@intel.com,
ryan.d.saffores@intel.com, ilya.albrekht@intel.com,
kyung.min.park@intel.com, tony.luck@intel.com,
ira.weiny@intel.com, ebiggers@kernel.org, ardb@kernel.org,
x86@kernel.org
Subject: [RFC V2 2/5] x86: Probe assembler capabilities for VAES and VPLCMULQDQ support
Date: Fri, 22 Jan 2021 23:28:37 -0800 [thread overview]
Message-ID: <1611386920-28579-3-git-send-email-megha.dey@intel.com> (raw)
In-Reply-To: <1611386920-28579-1-git-send-email-megha.dey@intel.com>
This is a preparatory patch to introduce the optimized crypto algorithms
using AVX512 instructions which would require VAES and VPLCMULQDQ support.
Check for VAES and VPCLMULQDQ assembler support using AVX512 registers.
Cc: x86@kernel.org
Signed-off-by: Megha Dey <megha.dey@intel.com>
---
arch/x86/Kconfig.assembler | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/x86/Kconfig.assembler b/arch/x86/Kconfig.assembler
index 26b8c08..1b07bc6 100644
--- a/arch/x86/Kconfig.assembler
+++ b/arch/x86/Kconfig.assembler
@@ -1,6 +1,16 @@
# SPDX-License-Identifier: GPL-2.0
# Copyright (C) 2020 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
+config AS_VAES_AVX512
+ def_bool $(as-instr,vaesenc %zmm0$(comma)%zmm1$(comma)%zmm1)
+ help
+ Supported by binutils >= 2.30 and LLVM integrated assembler
+
+config AS_VPCLMULQDQ
+ def_bool $(as-instr,vpclmulqdq \$0$(comma)%zmm2$(comma)%zmm6$(comma)%zmm4)
+ help
+ Supported by binutils >= 2.30 and LLVM integrated assembler
+
config AS_AVX512
def_bool $(as-instr,vpmovm2b %k1$(comma)%zmm5)
help
--
2.7.4
next prev parent reply other threads:[~2021-01-23 7:30 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-23 7:28 [RFC V2 0/5] Introduce AVX512 optimized crypto algorithms Megha Dey
2021-01-23 7:28 ` [RFC V2 1/5] crypto: aesni - fix coding style for if/else block Megha Dey
2021-01-23 7:28 ` Megha Dey [this message]
2021-01-23 7:28 ` [RFC V2 3/5] crypto: crct10dif - Accelerated CRC T10 DIF with vectorized instruction Megha Dey
2021-01-23 7:28 ` [RFC V2 4/5] crypto: aesni - AES CTR x86_64 "by16" AVX512 optimization Megha Dey
2021-01-23 7:28 ` [RFC V2 5/5] crypto: aesni - AVX512 version of AESNI-GCM using VPCLMULQDQ Megha Dey
2021-01-24 16:23 ` [RFC V2 0/5] Introduce AVX512 optimized crypto algorithms Andy Lutomirski
2021-02-24 0:54 ` Dey, Megha
2021-02-24 17:42 ` Andy Lutomirski
2022-01-31 18:43 ` Dey, Megha
2022-01-31 19:18 ` Dave Hansen
2022-02-01 16:42 ` Dey, Megha
2022-02-24 19:31 ` Dey, Megha
2022-03-05 18:37 ` Andy Lutomirski
2021-05-07 16:22 ` Dave Hansen
2021-01-25 17:27 ` Dave Hansen
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