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From: zhangfei <zhangfei.gao@linaro.org>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Arnd Bergmann <arnd@arndb.de>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	jonathan.cameron@huawei.com, dave.jiang@intel.com,
	grant.likely@arm.com, jean-philippe <jean-philippe@linaro.org>,
	Jerome Glisse <jglisse@redhat.com>,
	ilias.apalodimas@linaro.org, francois.ozog@linaro.org,
	kenneth-lee-2012@foxmail.com, Wangzhou <wangzhou1@hisilicon.com>,
	"haojian . zhuang" <haojian.zhuang@linaro.org>,
	guodong.xu@linaro.org, linux-accelerators@lists.ozlabs.org,
	linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org,
	iommu@lists.linux-foundation.org,
	Kenneth Lee <liguozhu@hisilicon.com>,
	Zaibo Xu <xuzaibo@huawei.com>
Subject: Re: [PATCH v12 2/4] uacce: add uacce driver
Date: Tue, 11 Feb 2020 15:59:08 +0800	[thread overview]
Message-ID: <837da172-1ec7-d077-bf54-18d620b1d3bb@linaro.org> (raw)
In-Reply-To: <20200210233711.GA1787983@kroah.com>



On 2020/2/11 上午7:37, Greg Kroah-Hartman wrote:
> On Wed, Jan 15, 2020 at 10:12:46PM +0800, Zhangfei Gao wrote:
>> From: Kenneth Lee <liguozhu@hisilicon.com>
>>
>> Uacce (Unified/User-space-access-intended Accelerator Framework) targets to
>> provide Shared Virtual Addressing (SVA) between accelerators and processes.
>> So accelerator can access any data structure of the main cpu.
>> This differs from the data sharing between cpu and io device, which share
>> only data content rather than address.
>> Since unified address, hardware and user space of process can share the
>> same virtual address in the communication.
>>
>> Uacce create a chrdev for every registration, the queue is allocated to
>> the process when the chrdev is opened. Then the process can access the
>> hardware resource by interact with the queue file. By mmap the queue
>> file space to user space, the process can directly put requests to the
>> hardware without syscall to the kernel space.
>>
>> The IOMMU core only tracks mm<->device bonds at the moment, because it
>> only needs to handle IOTLB invalidation and PASID table entries. However
>> uacce needs a finer granularity since multiple queues from the same
>> device can be bound to an mm. When the mm exits, all bound queues must
>> be stopped so that the IOMMU can safely clear the PASID table entry and
>> reallocate the PASID.
>>
>> An intermediate struct uacce_mm links uacce devices and queues.
>> Note that an mm may be bound to multiple devices but an uacce_mm
>> structure only ever belongs to a single device, because we don't need
>> anything more complex (if multiple devices are bound to one mm, then
>> we'll create one uacce_mm for each bond).
>>
>>          uacce_device --+-- uacce_mm --+-- uacce_queue
>>                         |              '-- uacce_queue
>>                         |
>>                         '-- uacce_mm --+-- uacce_queue
>>                                        +-- uacce_queue
>>                                        '-- uacce_queue
>>
>> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>> Signed-off-by: Kenneth Lee <liguozhu@hisilicon.com>
>> Signed-off-by: Zaibo Xu <xuzaibo@huawei.com>
>> Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
>> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
>> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
> Looks much saner now, thanks for all of the work on this:
>
> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
>
> Or am I supposed to take this in my tree?  If so, I can, but I need an
> ack for the crypto parts.
>
>
That's Great, thanks Greg.

For the convenience, I rebase the patchset on 5.6-rc1.
Not sure is there any conflict to crypto tree.
How about just pick the uacce part, patch 1 , 2.
We can resend the crypto part to crypto tree.

Thanks


  reply	other threads:[~2020-02-11  7:59 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-15 14:12 [PATCH v12 0/4] Add uacce module for Accelerator Zhangfei Gao
2020-01-15 14:12 ` [PATCH v12 1/4] uacce: Add documents for uacce Zhangfei Gao
2020-01-15 14:12 ` [PATCH v12 2/4] uacce: add uacce driver Zhangfei Gao
2020-02-10 23:37   ` Greg Kroah-Hartman
2020-02-11  7:59     ` zhangfei [this message]
2020-02-13  9:15     ` Herbert Xu
2020-02-13  9:42       ` zhangfei
2020-02-13 13:00       ` Greg Kroah-Hartman
2020-02-24 18:22   ` Raj, Ashok
2020-02-25  8:36     ` zhangfei
2020-03-03 11:45     ` Jean-Philippe Brucker
2020-01-15 14:12 ` [PATCH v12 3/4] crypto: hisilicon - Remove module_param uacce_mode Zhangfei Gao
2020-01-15 14:12 ` [PATCH v12 4/4] crypto: hisilicon - register zip engine to uacce Zhangfei Gao

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