[PATCH v3 0/2] Add support for Qualcomm's PRNG

[PATCH v3 0/2] Add support for Qualcomm's PRNG

[Stanimir Varbanov]

Hi,

Here is the third version of hwrng driver for MSM SoC's.

Changes since v2.

  * The PRNG clock is renamed to "core" - changed 1/2 and 2/2
accordingly.
  * Added unit address in the dt binding example in 1/2.
  * Removed the dependacy to HAVE_CLK because it is redundant in 2/2.
  * Added include "linux/err.h" for ENOMEM usage in 2/2.
  * Added MODULE_ALIAS in 2/2.

Comments are welcome!

regadrs,
Stan

===================================================================
Here is the second version of RNG driver for MSM SoC's.

During the time since first version I've made some tests using
rng tools this is the result:

# cat /dev/hw_random | rngtest -c 100000

Copyright (c) 2004 by Henrique de Moraes Holschuh
This is free software; see the source for copying conditions.  There is
NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR
PURPOSE.

rngtest: starting FIPS tests...
rngtest: bits received from input: 2000000032
rngtest: FIPS 140-2 successes: 99925
rngtest: FIPS 140-2 failures: 75
rngtest: FIPS 140-2(2001-10-10) Monobit: 10
rngtest: FIPS 140-2(2001-10-10) Poker: 9
rngtest: FIPS 140-2(2001-10-10) Runs: 20
rngtest: FIPS 140-2(2001-10-10) Long run: 38
rngtest: FIPS 140-2(2001-10-10) Continuous run: 0
rngtest: input channel speed: (min=1.267; avg=53.222; max=2384.186)Mibits/s
rngtest: FIPS tests speed: (min=3.016; avg=48.847; max=49.931)Mibits/s
rngtest: Program run time: 75191914 microseconds

Changes since v1:

  * I took into account Stephen Boyd's comments about define duplication
and added a call to platform_get_resource.
  * The 'struct hwrng' is now embedded into msm_rng private structure to
avoid global variables and allow more than one instances of the driver.

===================================================================
This patch set adds hardware RNG driver wich is used to control the
Qualcomm's PRNG hardware block.
The first patch document the DT bindings needed to sucessfuly probe
the driver and the second patch adds the driver.

Comments are welecome!

Stanimir Varbanov (2):
  ARM: DT: msm: Add Qualcomm's PRNG driver binding document
  hwrng: msm: Add PRNG support for MSM SoC's

 .../devicetree/bindings/rng/qcom,prng.txt          |  17 ++
 drivers/char/hw_random/Kconfig                     |  12 ++
 drivers/char/hw_random/Makefile                    |   1 +
 drivers/char/hw_random/msm-rng.c                   | 197 +++++++++++++++++++++
 4 files changed, 227 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/rng/qcom,prng.txt
 create mode 100644 drivers/char/hw_random/msm-rng.c

-- 
1.8.3.1

[PATCH v3 1/2] ARM: DT: msm: Add Qualcomm's PRNG driver binding document

[Stanimir Varbanov]

This adds Qualcomm PRNG driver device tree binding documentation
to use as an example in dts trees.

Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>
---
 Documentation/devicetree/bindings/rng/qcom,prng.txt | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/rng/qcom,prng.txt

diff --git a/Documentation/devicetree/bindings/rng/qcom,prng.txt b/Documentation/devicetree/bindings/rng/qcom,prng.txt
new file mode 100644
index 000000000000..8e5853c2879b
--- /dev/null
+++ b/Documentation/devicetree/bindings/rng/qcom,prng.txt
@@ -0,0 +1,17 @@
+Qualcomm MSM pseudo random number generator.
+
+Required properties:
+
+- compatible  : should be "qcom,prng"
+- reg         : specifies base physical address and size of the registers map
+- clocks      : phandle to clock-controller plus clock-specifier pair
+- clock-names : "core" clocks all registers, FIFO and circuits in PRNG IP block
+
+Example:
+
+	rng@f9bff000 {
+		compatible = "qcom,prng";
+		reg = <0xf9bff000 0x200>;
+		clocks = <&clock GCC_PRNG_AHB_CLK>;
+		clock-names = "core";
+	};
-- 
1.8.3.1

[PATCH v3 2/2] hwrng: msm: Add PRNG support for MSM SoC's

[Stanimir Varbanov]

This adds a driver for hardware random number generator present
on Qualcomm MSM SoC's.

Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>
---
 drivers/char/hw_random/Kconfig   |  12 +++
 drivers/char/hw_random/Makefile  |   1 +
 drivers/char/hw_random/msm-rng.c | 197 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 210 insertions(+)
 create mode 100644 drivers/char/hw_random/msm-rng.c

diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index 0aa9d91daef5..bc67099ea24d 100644
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig
@@ -314,3 +314,15 @@ config HW_RANDOM_TPM
 	  module will be called tpm-rng.
 
 	  If unsure, say Y.
+
+config HW_RANDOM_MSM
+	tristate "Qualcomm MSM Random Number Generator support"
+	depends on HW_RANDOM && ARCH_MSM
+	---help---
+	  This driver provides kernel-side support for the Random Number
+	  Generator hardware found on Qualcomm MSM SoCs.
+
+	  To compile this driver as a module, choose M here. the
+	  module will be called msm-rng.
+
+	  If unsure, say Y.
diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile
index bed467c9300e..441a0a7705a2 100644
--- a/drivers/char/hw_random/Makefile
+++ b/drivers/char/hw_random/Makefile
@@ -27,3 +27,4 @@ obj-$(CONFIG_HW_RANDOM_PSERIES) += pseries-rng.o
 obj-$(CONFIG_HW_RANDOM_EXYNOS)	+= exynos-rng.o
 obj-$(CONFIG_HW_RANDOM_TPM) += tpm-rng.o
 obj-$(CONFIG_HW_RANDOM_BCM2835) += bcm2835-rng.o
+obj-$(CONFIG_HW_RANDOM_MSM) += msm-rng.o
diff --git a/drivers/char/hw_random/msm-rng.c b/drivers/char/hw_random/msm-rng.c
new file mode 100644
index 000000000000..148521e51dc6
--- /dev/null
+++ b/drivers/char/hw_random/msm-rng.c
@@ -0,0 +1,197 @@
+/*
+ * Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/hw_random.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+
+/* Device specific register offsets */
+#define PRNG_DATA_OUT		0x0000
+#define PRNG_STATUS		0x0004
+#define PRNG_LFSR_CFG		0x0100
+#define PRNG_CONFIG		0x0104
+
+/* Device specific register masks and config values */
+#define PRNG_LFSR_CFG_MASK	0x0000ffff
+#define PRNG_LFSR_CFG_CLOCKS	0x0000dddd
+#define PRNG_CONFIG_HW_ENABLE	BIT(1)
+#define PRNG_STATUS_DATA_AVAIL	BIT(0)
+
+#define MAX_HW_FIFO_DEPTH	16
+#define MAX_HW_FIFO_SIZE	(MAX_HW_FIFO_DEPTH * 4)
+#define WORD_SZ			4
+
+struct msm_rng {
+	void __iomem *base;
+	struct clk *clk;
+	struct hwrng hwrng;
+};
+
+#define to_msm_rng(p)	container_of(p, struct msm_rng, hwrng)
+
+static int msm_rng_enable(struct hwrng *hwrng, int enable)
+{
+	struct msm_rng *rng = to_msm_rng(hwrng);
+	u32 val;
+	int ret;
+
+	ret = clk_prepare_enable(rng->clk);
+	if (ret)
+		return ret;
+
+	if (enable) {
+		/* Enable PRNG only if it is not already enabled */
+		val = readl_relaxed(rng->base + PRNG_CONFIG);
+		if (val & PRNG_CONFIG_HW_ENABLE)
+			goto already_enabled;
+
+		val = readl_relaxed(rng->base + PRNG_LFSR_CFG);
+		val &= ~PRNG_LFSR_CFG_MASK;
+		val |= PRNG_LFSR_CFG_CLOCKS;
+		writel(val, rng->base + PRNG_LFSR_CFG);
+
+		val = readl_relaxed(rng->base + PRNG_CONFIG);
+		val |= PRNG_CONFIG_HW_ENABLE;
+		writel(val, rng->base + PRNG_CONFIG);
+	} else {
+		val = readl_relaxed(rng->base + PRNG_CONFIG);
+		val &= ~PRNG_CONFIG_HW_ENABLE;
+		writel(val, rng->base + PRNG_CONFIG);
+	}
+
+already_enabled:
+	clk_disable_unprepare(rng->clk);
+	return 0;
+}
+
+static int msm_rng_read(struct hwrng *hwrng, void *data, size_t max, bool wait)
+{
+	struct msm_rng *rng = to_msm_rng(hwrng);
+	size_t currsize = 0;
+	u32 *retdata = data;
+	size_t maxsize;
+	int ret;
+	u32 val;
+
+	/* calculate max size bytes to transfer back to caller */
+	maxsize = min_t(size_t, MAX_HW_FIFO_SIZE, max);
+
+	/* no room for word data */
+	if (maxsize < WORD_SZ)
+		return 0;
+
+	ret = clk_prepare_enable(rng->clk);
+	if (ret)
+		return ret;
+
+	/* read random data from hardware */
+	do {
+		val = readl_relaxed(rng->base + PRNG_STATUS);
+		if (!(val & PRNG_STATUS_DATA_AVAIL))
+			break;
+
+		val = readl_relaxed(rng->base + PRNG_DATA_OUT);
+		if (!val)
+			break;
+
+		*retdata++ = val;
+		currsize += WORD_SZ;
+
+		/* make sure we stay on 32bit boundary */
+		if ((maxsize - currsize) < WORD_SZ)
+			break;
+	} while (currsize < maxsize);
+
+	clk_disable_unprepare(rng->clk);
+
+	return currsize;
+}
+
+static int msm_rng_init(struct hwrng *hwrng)
+{
+	return msm_rng_enable(hwrng, 1);
+}
+
+static void msm_rng_cleanup(struct hwrng *hwrng)
+{
+	msm_rng_enable(hwrng, 0);
+}
+
+static int msm_rng_probe(struct platform_device *pdev)
+{
+	struct resource *res;
+	struct msm_rng *rng;
+	int ret;
+
+	rng = devm_kzalloc(&pdev->dev, sizeof(*rng), GFP_KERNEL);
+	if (!rng)
+		return -ENOMEM;
+
+	platform_set_drvdata(pdev, rng);
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	rng->base = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(rng->base))
+		return PTR_ERR(rng->base);
+
+	rng->clk = devm_clk_get(&pdev->dev, "core");
+	if (IS_ERR(rng->clk))
+		return PTR_ERR(rng->clk);
+
+	rng->hwrng.name = KBUILD_MODNAME,
+	rng->hwrng.init = msm_rng_init,
+	rng->hwrng.cleanup = msm_rng_cleanup,
+	rng->hwrng.read = msm_rng_read,
+
+	ret = hwrng_register(&rng->hwrng);
+	if (ret) {
+		dev_err(&pdev->dev, "failed to register hwrng\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int msm_rng_remove(struct platform_device *pdev)
+{
+	struct msm_rng *rng = platform_get_drvdata(pdev);
+
+	hwrng_unregister(&rng->hwrng);
+	return 0;
+}
+
+static const struct of_device_id msm_rng_of_match[] = {
+	{ .compatible = "qcom,prng", },
+	{}
+};
+MODULE_DEVICE_TABLE(of, msm_rng_of_match);
+
+static struct platform_driver msm_rng_driver = {
+	.probe = msm_rng_probe,
+	.remove = msm_rng_remove,
+	.driver = {
+		.name = KBUILD_MODNAME,
+		.owner = THIS_MODULE,
+		.of_match_table = of_match_ptr(msm_rng_of_match),
+	}
+};
+module_platform_driver(msm_rng_driver);
+
+MODULE_ALIAS("platform:" KBUILD_MODNAME);
+MODULE_AUTHOR("The Linux Foundation");
+MODULE_DESCRIPTION("Qualcomm MSM random number generator driver");
+MODULE_LICENSE("GPL v2");
-- 
1.8.3.1

Re: [PATCH v3 1/2] ARM: DT: msm: Add Qualcomm's PRNG driver binding document

[Stephen Boyd]

On 10/15/13 07:11, Stanimir Varbanov wrote:
> This adds Qualcomm PRNG driver device tree binding documentation
> to use as an example in dts trees.
>
> Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>
> ---

Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation

Re: [PATCH v3 2/2] hwrng: msm: Add PRNG support for MSM SoC's

[Stephen Boyd]

On 10/15/13 07:11, Stanimir Varbanov wrote:
> This adds a driver for hardware random number generator present
> on Qualcomm MSM SoC's.
>
> Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>
> ---

Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation

Re: [PATCH v3 1/2] ARM: DT: msm: Add Qualcomm's PRNG driver binding document

[Stanimir Varbanov]

On 10/15/2013 05:11 PM, Stanimir Varbanov wrote:
> This adds Qualcomm PRNG driver device tree binding documentation
> to use as an example in dts trees.
> 
> Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>

Dear DT binding maintainers,

I'd like to receive some comments or maybe an Ack to this patch. Or if
you think it needs another re-spin please let me know.

Thanks in advance for your time!

regards,
Stan

Re: [PATCH v3 2/2] hwrng: msm: Add PRNG support for MSM SoC's

[Stanimir Varbanov]

On 10/15/2013 05:11 PM, Stanimir Varbanov wrote:
> This adds a driver for hardware random number generator present
> on Qualcomm MSM SoC's.
> 
> Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>

Hi Matt, Herbert,

Sorry for the noise but this patch staying for a while in mailing list
and I'd like to get some attention to this driver. Do you think it needs
another re-spin or it has obvious issues / concerns?

Thanks for your time.

regards,
Stan

Re: [PATCH v3 2/2] hwrng: msm: Add PRNG support for MSM SoC's

[Herbert Xu]

On Wed, Oct 23, 2013 at 12:41:10PM +0300, Stanimir Varbanov wrote:
> On 10/15/2013 05:11 PM, Stanimir Varbanov wrote:
> > This adds a driver for hardware random number generator present
> > on Qualcomm MSM SoC's.
> > 
> > Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>
> 
> Hi Matt, Herbert,
> 
> Sorry for the noise but this patch staying for a while in mailing list
> and I'd like to get some attention to this driver. Do you think it needs
> another re-spin or it has obvious issues / concerns?
> 
> Thanks for your time.

Well if the ARM folks are OK with it I'm happy to take them.

Cheers,
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

Re: [PATCH v3 2/2] hwrng: msm: Add PRNG support for MSM SoC's

[Stanimir Varbanov]

Hi Herbert,

On 10/23/2013 12:45 PM, Herbert Xu wrote:
> On Wed, Oct 23, 2013 at 12:41:10PM +0300, Stanimir Varbanov wrote:
>> On 10/15/2013 05:11 PM, Stanimir Varbanov wrote:
>>> This adds a driver for hardware random number generator present
>>> on Qualcomm MSM SoC's.
>>>
>>> Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>
>>
>> Hi Matt, Herbert,
>>
>> Sorry for the noise but this patch staying for a while in mailing list
>> and I'd like to get some attention to this driver. Do you think it needs
>> another re-spin or it has obvious issues / concerns?
>>
>> Thanks for your time.
> 
> Well if the ARM folks are OK with it I'm happy to take them.

Thanks!

Can I add your Acked-by for the driver part patch 2/2?

regards,
Stan

Re: [PATCH v3 0/2] Add support for Qualcomm's PRNG

[H. Peter Anvin]

On 10/15/2013 03:11 PM, Stanimir Varbanov wrote:
> This patch set adds hardware RNG driver wich is used to control the
> Qualcomm's PRNG hardware block.

I still haven't seen anyone address the "P" bit of the "PRNG"... what is
the (guaranteed) entropic level of the output?

	-hpa

Re: [PATCH v3 2/2] hwrng: msm: Add PRNG support for MSM SoC's

[Herbert Xu]

On Fri, Oct 25, 2013 at 04:57:23PM +0300, Stanimir Varbanov wrote:
> Hi Herbert,
> 
> On 10/23/2013 12:45 PM, Herbert Xu wrote:
> > On Wed, Oct 23, 2013 at 12:41:10PM +0300, Stanimir Varbanov wrote:
> >> On 10/15/2013 05:11 PM, Stanimir Varbanov wrote:
> >>> This adds a driver for hardware random number generator present
> >>> on Qualcomm MSM SoC's.
> >>>
> >>> Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>
> >>
> >> Hi Matt, Herbert,
> >>
> >> Sorry for the noise but this patch staying for a while in mailing list
> >> and I'd like to get some attention to this driver. Do you think it needs
> >> another re-spin or it has obvious issues / concerns?
> >>
> >> Thanks for your time.
> > 
> > Well if the ARM folks are OK with it I'm happy to take them.
> 
> Thanks!
> 
> Can I add your Acked-by for the driver part patch 2/2?

Sure.

Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

Re: [PATCH v3 2/2] hwrng: msm: Add PRNG support for MSM SoC's

[Herbert Xu]

On Fri, Oct 18, 2013 at 11:39:28AM -0700, Stephen Boyd wrote:
> On 10/15/13 07:11, Stanimir Varbanov wrote:
> > This adds a driver for hardware random number generator present
> > on Qualcomm MSM SoC's.
> >
> > Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>
> > ---
> 
> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>

Both patches applied.  Thanks!
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt