From: Borislav Petkov <bp@alien8.de>
To: "Ghannam, Yazen" <Yazen.Ghannam@amd.com>
Cc: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [RFC PATCH v3 08/10] EDAC/amd64: Gather hardware information early
Date: Fri, 6 Sep 2019 22:35:19 +0200 [thread overview]
Message-ID: <20190906203519.GN19008@zn.tnic> (raw)
In-Reply-To: <SN6PR12MB26393DDA0F1818DCDD2D7953F8BA0@SN6PR12MB2639.namprd12.prod.outlook.com>
On Fri, Sep 06, 2019 at 07:14:57PM +0000, Ghannam, Yazen wrote:
> This struct is used per channel, so we may have 2-8 per system.
Ah, true.
> We could fix it at the max (8). What do you think?
Anything in struct amd64_umc that is shared between those channels or
all max 8 of them can be distinct?
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
next prev parent reply other threads:[~2019-09-06 20:35 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-21 23:59 [PATCH v3 0/8] AMD64 EDAC fixes Ghannam, Yazen
2019-08-21 23:59 ` [PATCH v3 1/8] EDAC/amd64: Support more than two controllers for chip selects handling Ghannam, Yazen
2019-08-21 23:59 ` [PATCH v3 2/8] EDAC/amd64: Recognize DRAM device type with EDAC_CTL_CAP Ghannam, Yazen
2019-08-21 23:59 ` [PATCH v3 3/8] EDAC/amd64: Initialize DIMM info for systems with more than two channels Ghannam, Yazen
2019-08-21 23:59 ` [PATCH v3 4/8] EDAC/amd64: Find Chip Select memory size using Address Mask Ghannam, Yazen
2019-08-22 0:00 ` [PATCH v3 5/8] EDAC/amd64: Decode syndrome before translating address Ghannam, Yazen
2019-08-22 0:00 ` [PATCH v3 6/8] EDAC/amd64: Cache secondary Chip Select registers Ghannam, Yazen
2019-08-22 0:00 ` [RFC PATCH v3 08/10] EDAC/amd64: Gather hardware information early Ghannam, Yazen
2019-08-29 9:22 ` Borislav Petkov
2019-09-06 19:14 ` Ghannam, Yazen
2019-09-06 20:35 ` Borislav Petkov [this message]
2019-09-06 20:49 ` Ghannam, Yazen
2019-09-09 15:31 ` Borislav Petkov
2019-08-22 0:00 ` [PATCH v3 7/8] EDAC/amd64: Support Asymmetric Dual-Rank DIMMs Ghannam, Yazen
2019-08-23 11:26 ` Borislav Petkov
2019-08-23 13:27 ` Ghannam, Yazen
2019-08-23 15:11 ` Borislav Petkov
2019-08-22 0:00 ` [RFC PATCH v3 10/10] EDAC/amd64: Check for memory before fully initializing an instance Ghannam, Yazen
2019-08-22 18:51 ` [RFC PATCH v2] " Ghannam, Yazen
2019-08-22 0:00 ` [RFC PATCH v3 09/10] EDAC/amd64: Use cached data when checking for ECC Ghannam, Yazen
2019-08-22 0:50 ` [PATCH v3 0/8] AMD64 EDAC fixes Adam Borowski
2019-08-22 8:35 ` Borislav Petkov
2019-08-22 9:46 ` Adam Borowski
2019-08-22 9:55 ` Borislav Petkov
2019-08-22 18:54 ` Ghannam, Yazen
2019-08-23 15:28 ` Ghannam, Yazen
2019-08-23 15:37 ` Borislav Petkov
2019-08-26 14:19 ` Ghannam, Yazen
2019-08-26 14:59 ` Borislav Petkov
2019-08-26 15:05 ` Ghannam, Yazen
2019-08-22 18:48 ` [RFC PATCH v2] EDAC/amd64: Check for memory before fully initializing an instance Ghannam, Yazen
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