Re: [PATCH v7 00/16] vfio: expose virtual Shared Virtual Addressing to VMs

From: Jason Wang <jasowang@redhat.com>
To: Liu Yi L <yi.l.liu@intel.com>,
	alex.williamson@redhat.com, eric.auger@redhat.com,
	baolu.lu@linux.intel.com, joro@8bytes.org
Cc: jean-philippe@linaro.org, kevin.tian@intel.com,
	ashok.raj@intel.com, kvm@vger.kernel.org,
	"Michael S. Tsirkin" <mst@redhat.com>,
	stefanha@gmail.com, jun.j.tian@intel.com,
	iommu@lists.linux-foundation.org, yi.y.sun@intel.com,
	Jason Gunthorpe <jgg@nvidia.com>,
	hao.wu@intel.com
Subject: Re: [PATCH v7 00/16] vfio: expose virtual Shared Virtual Addressing to VMs
Date: Mon, 14 Sep 2020 12:20:10 +0800	[thread overview]
Message-ID: <411c81c0-f13c-37cc-6c26-cafb42b46b15@redhat.com> (raw)
In-Reply-To: <1599734733-6431-1-git-send-email-yi.l.liu@intel.com>

On 2020/9/10 下午6:45, Liu Yi L wrote:
> Shared Virtual Addressing (SVA), a.k.a, Shared Virtual Memory (SVM) on
> Intel platforms allows address space sharing between device DMA and
> applications. SVA can reduce programming complexity and enhance security.
>
> This VFIO series is intended to expose SVA usage to VMs. i.e. Sharing
> guest application address space with passthru devices. This is called
> vSVA in this series. The whole vSVA enabling requires QEMU/VFIO/IOMMU
> changes. For IOMMU and QEMU changes, they are in separate series (listed
> in the "Related series").
>
> The high-level architecture for SVA virtualization is as below, the key
> design of vSVA support is to utilize the dual-stage IOMMU translation (
> also known as IOMMU nesting translation) capability in host IOMMU.
>
>
>      .-------------.  .---------------------------.
>      |   vIOMMU    |  | Guest process CR3, FL only|
>      |             |  '---------------------------'
>      .----------------/
>      | PASID Entry |--- PASID cache flush -
>      '-------------'                       |
>      |             |                       V
>      |             |                CR3 in GPA
>      '-------------'
> Guest
> ------| Shadow |--------------------------|--------
>        v        v                          v
> Host
>      .-------------.  .----------------------.
>      |   pIOMMU    |  | Bind FL for GVA-GPA  |
>      |             |  '----------------------'
>      .----------------/  |
>      | PASID Entry |     V (Nested xlate)
>      '----------------\.------------------------------.
>      |             ||SL for GPA-HPA, default domain|
>      |             |   '------------------------------'
>      '-------------'
> Where:
>   - FL = First level/stage one page tables
>   - SL = Second level/stage two page tables
>
> Patch Overview:
>   1. reports IOMMU nesting info to userspace ( patch 0001, 0002, 0003, 0015 , 0016)
>   2. vfio support for PASID allocation and free for VMs (patch 0004, 0005, 0007)
>   3. a fix to a revisit in intel iommu driver (patch 0006)
>   4. vfio support for binding guest page table to host (patch 0008, 0009, 0010)
>   5. vfio support for IOMMU cache invalidation from VMs (patch 0011)
>   6. vfio support for vSVA usage on IOMMU-backed mdevs (patch 0012)
>   7. expose PASID capability to VM (patch 0013)
>   8. add doc for VFIO dual stage control (patch 0014)

If it's possible, I would suggest a generic uAPI instead of a VFIO 
specific one.

Jason suggest something like /dev/sva. There will be a lot of other 
subsystems that could benefit from this (e.g vDPA).

Have you ever considered this approach?

Thanks

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