[PATCH v1 1/2] ARM: dts: tegra20: Add Memory Client reset to VDE

[PATCH v1 1/2] ARM: dts: tegra20: Add Memory Client reset to VDE

[Dmitry Osipenko]

Hook up Memory Client reset of the Video Decoder to the decoders DT node.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 arch/arm/boot/dts/tegra20.dtsi | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 983dd5c14794..f9495f12e731 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 #include <dt-bindings/clock/tegra20-car.h>
 #include <dt-bindings/gpio/tegra-gpio.h>
+#include <dt-bindings/memory/tegra20-mc.h>
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
@@ -282,7 +283,8 @@
 			     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; /* SXE interrupt */
 		interrupt-names = "sync-token", "bsev", "sxe";
 		clocks = <&tegra_car TEGRA20_CLK_VDE>;
-		resets = <&tegra_car 61>;
+		reset-names = "vde", "mc";
+		resets = <&tegra_car 61>, <&mc TEGRA20_MC_RESET_VDE>;
 	};
 
 	apbmisc@70000800 {
@@ -593,11 +595,12 @@
 		clock-names = "pclk", "clk32k_in";
 	};
 
-	memory-controller@7000f000 {
+	mc: memory-controller@7000f000 {
 		compatible = "nvidia,tegra20-mc";
 		reg = <0x7000f000 0x024
 		       0x7000f03c 0x3c4>;
 		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+		#reset-cells = <1>;
 	};
 
 	iommu@7000f024 {
-- 
2.17.0

[PATCH v1] media: staging: tegra-vde: Reset memory client

[Dmitry Osipenko]

DMA requests must be blocked before resetting VDE HW, otherwise it is
possible to get a memory corruption or a machine hang. Use the reset
control provided by the Memory Controller to block DMA before resetting
the VDE HW.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 drivers/staging/media/tegra-vde/tegra-vde.c | 42 +++++++++++++++++++--
 1 file changed, 38 insertions(+), 4 deletions(-)

diff --git a/drivers/staging/media/tegra-vde/tegra-vde.c b/drivers/staging/media/tegra-vde/tegra-vde.c
index 90177a59b97c..6dd3bf4481be 100644
--- a/drivers/staging/media/tegra-vde/tegra-vde.c
+++ b/drivers/staging/media/tegra-vde/tegra-vde.c
@@ -73,6 +73,7 @@ struct tegra_vde {
 	struct mutex lock;
 	struct miscdevice miscdev;
 	struct reset_control *rst;
+	struct reset_control *rst_mc;
 	struct gen_pool *iram_pool;
 	struct completion decode_completion;
 	struct clk *clk;
@@ -850,9 +851,23 @@ static int tegra_vde_ioctl_decode_h264(struct tegra_vde *vde,
 	 * We rely on the VDE registers reset value, otherwise VDE
 	 * causes bus lockup.
 	 */
+	ret = reset_control_assert(vde->rst_mc);
+	if (ret) {
+		dev_err(dev, "DEC start: Failed to assert MC reset: %d\n",
+			ret);
+		goto put_runtime_pm;
+	}
+
 	ret = reset_control_reset(vde->rst);
 	if (ret) {
-		dev_err(dev, "Failed to reset HW: %d\n", ret);
+		dev_err(dev, "DEC start: Failed to reset HW: %d\n", ret);
+		goto put_runtime_pm;
+	}
+
+	ret = reset_control_deassert(vde->rst_mc);
+	if (ret) {
+		dev_err(dev, "DEC start: Failed to deassert MC reset: %d\n",
+			ret);
 		goto put_runtime_pm;
 	}
 
@@ -880,9 +895,21 @@ static int tegra_vde_ioctl_decode_h264(struct tegra_vde *vde,
 		ret = timeout;
 	}
 
-	err = reset_control_assert(vde->rst);
-	if (err)
-		dev_err(dev, "Failed to assert HW reset: %d\n", err);
+	/*
+	 * At first reset memory client to avoid resetting VDE HW in the
+	 * middle of DMA which could result into memory corruption or hang
+	 * the whole system.
+	 */
+	err = reset_control_assert(vde->rst_mc);
+	if (!err) {
+		err = reset_control_assert(vde->rst);
+		if (err)
+			dev_err(dev,
+				"DEC end: Failed to assert HW reset: %d\n",
+				err);
+	} else {
+		dev_err(dev, "DEC end: Failed to assert MC reset: %d\n", err);
+	}
 
 put_runtime_pm:
 	pm_runtime_mark_last_busy(dev);
@@ -1074,6 +1101,13 @@ static int tegra_vde_probe(struct platform_device *pdev)
 		return err;
 	}
 
+	vde->rst_mc = devm_reset_control_get_optional(dev, "mc");
+	if (IS_ERR(vde->rst_mc)) {
+		err = PTR_ERR(vde->rst_mc);
+		dev_err(dev, "Could not get MC reset %d\n", err);
+		return err;
+	}
+
 	irq = platform_get_irq_byname(pdev, "sync-token");
 	if (irq < 0)
 		return irq;
-- 
2.17.0

[PATCH v1 2/2] ARM: dts: tegra30: Add Memory Client reset to VDE

[Dmitry Osipenko]

Hook up Memory Client reset of the Video Decoder to the decoders DT node.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 arch/arm/boot/dts/tegra30.dtsi | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 09087b9c5e26..3300ff976053 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -404,7 +404,8 @@
 			     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; /* SXE interrupt */
 		interrupt-names = "sync-token", "bsev", "sxe";
 		clocks = <&tegra_car TEGRA30_CLK_VDE>;
-		resets = <&tegra_car 61>;
+		reset-names = "vde", "mc";
+		resets = <&tegra_car 61>, <&mc TEGRA30_MC_RESET_VDE>;
 	};
 
 	apbmisc@70000800 {
@@ -712,6 +713,7 @@
 		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 
 		#iommu-cells = <1>;
+		#reset-cells = <1>;
 	};
 
 	fuse@7000f800 {
-- 
2.17.0

Re: [PATCH v1] media: staging: tegra-vde: Reset memory client

[Dmitry Osipenko]

On 20.05.2018 16:48, Dmitry Osipenko wrote:
> DMA requests must be blocked before resetting VDE HW, otherwise it is
> possible to get a memory corruption or a machine hang. Use the reset
> control provided by the Memory Controller to block DMA before resetting
> the VDE HW.
> 
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
>  drivers/staging/media/tegra-vde/tegra-vde.c | 42 +++++++++++++++++++--
>  1 file changed, 38 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/staging/media/tegra-vde/tegra-vde.c b/drivers/staging/media/tegra-vde/tegra-vde.c
> index 90177a59b97c..6dd3bf4481be 100644
> --- a/drivers/staging/media/tegra-vde/tegra-vde.c
> +++ b/drivers/staging/media/tegra-vde/tegra-vde.c
> @@ -73,6 +73,7 @@ struct tegra_vde {
>  	struct mutex lock;
>  	struct miscdevice miscdev;
>  	struct reset_control *rst;
> +	struct reset_control *rst_mc;
>  	struct gen_pool *iram_pool;
>  	struct completion decode_completion;
>  	struct clk *clk;
> @@ -850,9 +851,23 @@ static int tegra_vde_ioctl_decode_h264(struct tegra_vde *vde,
>  	 * We rely on the VDE registers reset value, otherwise VDE
>  	 * causes bus lockup.
>  	 */
> +	ret = reset_control_assert(vde->rst_mc);
> +	if (ret) {
> +		dev_err(dev, "DEC start: Failed to assert MC reset: %d\n",
> +			ret);
> +		goto put_runtime_pm;
> +	}
> +
>  	ret = reset_control_reset(vde->rst);
>  	if (ret) {
> -		dev_err(dev, "Failed to reset HW: %d\n", ret);
> +		dev_err(dev, "DEC start: Failed to reset HW: %d\n", ret);
> +		goto put_runtime_pm;
> +	}
> +
> +	ret = reset_control_deassert(vde->rst_mc);
> +	if (ret) {
> +		dev_err(dev, "DEC start: Failed to deassert MC reset: %d\n",
> +			ret);
>  		goto put_runtime_pm;
>  	}
>  
> @@ -880,9 +895,21 @@ static int tegra_vde_ioctl_decode_h264(struct tegra_vde *vde,
>  		ret = timeout;
>  	}
>  
> -	err = reset_control_assert(vde->rst);
> -	if (err)
> -		dev_err(dev, "Failed to assert HW reset: %d\n", err);
> +	/*
> +	 * At first reset memory client to avoid resetting VDE HW in the
> +	 * middle of DMA which could result into memory corruption or hang
> +	 * the whole system.
> +	 */
> +	err = reset_control_assert(vde->rst_mc);
> +	if (!err) {

It occurred to me that there is no need to skip the HW reset if MC resetting
fails. I'll make V2 to change that.

> +		err = reset_control_assert(vde->rst);
> +		if (err)
> +			dev_err(dev,
> +				"DEC end: Failed to assert HW reset: %d\n",
> +				err);
> +	} else {
> +		dev_err(dev, "DEC end: Failed to assert MC reset: %d\n", err);
> +	}
>  
>  put_runtime_pm:
>  	pm_runtime_mark_last_busy(dev);
> @@ -1074,6 +1101,13 @@ static int tegra_vde_probe(struct platform_device *pdev)
>  		return err;
>  	}
>  
> +	vde->rst_mc = devm_reset_control_get_optional(dev, "mc");
> +	if (IS_ERR(vde->rst_mc)) {
> +		err = PTR_ERR(vde->rst_mc);
> +		dev_err(dev, "Could not get MC reset %d\n", err);
> +		return err;
> +	}
> +
>  	irq = platform_get_irq_byname(pdev, "sync-token");
>  	if (irq < 0)
>  		return irq;
> 

Re: [PATCH v1 1/2] ARM: dts: tegra20: Add Memory Client reset to VDE

[Dmitry Osipenko]

On Sunday, 20 May 2018 16:48:44 MSK Dmitry Osipenko wrote:
> Hook up Memory Client reset of the Video Decoder to the decoders DT node.
> 
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>

Thierry, is there anything I could do in order to get these patches applied?

Re: [PATCH v1 2/2] ARM: dts: tegra30: Add Memory Client reset to VDE

[Thierry Reding]

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On Sun, May 20, 2018 at 04:48:46PM +0300, Dmitry Osipenko wrote:
> Hook up Memory Client reset of the Video Decoder to the decoders DT node.
> 
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
>  arch/arm/boot/dts/tegra30.dtsi | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)

Applied, thanks.

Thierry

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Re: [PATCH v1 1/2] ARM: dts: tegra20: Add Memory Client reset to VDE

[Thierry Reding]

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On Sun, May 20, 2018 at 04:48:44PM +0300, Dmitry Osipenko wrote:
> Hook up Memory Client reset of the Video Decoder to the decoders DT node.
> 
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
>  arch/arm/boot/dts/tegra20.dtsi | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)

Applied, thanks.

Thierry

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