[PATCH/RFC 0/9] FCP support for Renesas video cores

[PATCH/RFC 0/9] FCP support for Renesas video cores

[Laurent Pinchart]

Hello,

This RFC patch series implements support for the Frame Compression Processor
(FCP) modules found in the Renesas R-Car Gen3 SoCs.

The FCP is a companion module for various video processing modules in the Gen3
family SoCs. It provides data compression and decompression, data caching and
conversion of AXI transaction in order to reduce the memory bandwidth. In
simpler terms it handles data memory accesses on behalf of a video processing
module.

In the simplest case the FCP is completely transparent to the video processing
module for which it handles memory accesses, with one caveat: the FCP
functional clock and power domain must be enabled whenever it has to handle a
memory access.

The approach taken in this series is to describe the FCPs in DT as device
nodes with registers, clocks and power domains. They are referenced from the
associated video processing module DT node. On the driver side, a new rcar-fcp
driver handles registration of FCP instances as they are probed, and offers an
API to video processing module drivers to lookup FCP instances and enable and
disable them.

The FCP driver currently doesn't access the FCP registers, is for the FCPV
(FCP for VSP) instances no FCP parameter needs to be configured. Other FCP
variants (FCP for FDP and possiblye FCP for Codec) will require software
configuration which will be implemented later.

This patch series enables FCPV support for the r8a7795 SoC. In order to
provide enough context for review I've included patches that add FCP support
in the VSP driver, as well as DT patches to enable VSP and DU. Only patches
1/9, 3/9 and 6/9 are relevant for the FCP. Patches 5/9 and 7/9 show how the
FCP API is used in the VSP driver. Patches 2/9, 4/9, 8/9 and 9/9 are only
needed to test FCP + VSP operation on r8a7795 and are otherwise out of scope
for this RFC (reviews would of course still be appreciated).

The series applies on top of two previously posted patch series for the vsp1
and rcar-du-drm drivers. For review and testing convenience I've pushed the
result to

	git://linuxtv.org/pinchartl/media.git drm/du/vsp1-kms/boards

Laurent Pinchart (9):
  clk: shmobile: r8a7795: Add FCP clocks
  clk: shmobile: r8a7795: Add LVDS module clock
  v4l: Add Renesas R-Car FCP driver
  v4l: vsp1: VSPD instances have no LUT on Gen3
  v4l: vsp1: Add FCP support
  ARM64: renesas: r8a7795: Add FCPV nodes
  ARM64: renesas: r8a7795: Add VSP instances
  ARM64: renesas: r8a7795: Add DU device to DT
  ARM64: renesas: salvator-x: Enable DU

 .../devicetree/bindings/media/renesas,fcp.txt      |  24 +++
 .../devicetree/bindings/media/renesas,vsp1.txt     |   5 +
 MAINTAINERS                                        |  10 +
 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts |  44 ++++
 arch/arm64/boot/dts/renesas/r8a7795.dtsi           | 237 +++++++++++++++++++++
 drivers/clk/shmobile/r8a7795-cpg-mssr.c            |  16 ++
 drivers/media/platform/Kconfig                     |  14 ++
 drivers/media/platform/Makefile                    |   1 +
 drivers/media/platform/rcar-fcp.c                  | 176 +++++++++++++++
 drivers/media/platform/vsp1/vsp1.h                 |   2 +
 drivers/media/platform/vsp1/vsp1_drv.c             |  26 ++-
 include/media/rcar-fcp.h                           |  34 +++
 12 files changed, 587 insertions(+), 2 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/media/renesas,fcp.txt
 create mode 100644 drivers/media/platform/rcar-fcp.c
 create mode 100644 include/media/rcar-fcp.h

-- 
Regards,

Laurent Pinchart

[PATCH/RFC 1/9] clk: shmobile: r8a7795: Add FCP clocks

[Laurent Pinchart]

The parent clock isn't documented in the datasheet, use S2D1 as a best
guess for now.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 drivers/clk/shmobile/r8a7795-cpg-mssr.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/clk/shmobile/r8a7795-cpg-mssr.c b/drivers/clk/shmobile/r8a7795-cpg-mssr.c
index 13e994772dfd..ae5004ee7bdd 100644
--- a/drivers/clk/shmobile/r8a7795-cpg-mssr.c
+++ b/drivers/clk/shmobile/r8a7795-cpg-mssr.c
@@ -130,6 +130,21 @@ static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = {
 	DEF_MOD("hscif2",		 518,	R8A7795_CLK_S3D1),
 	DEF_MOD("hscif1",		 519,	R8A7795_CLK_S3D1),
 	DEF_MOD("hscif0",		 520,	R8A7795_CLK_S3D1),
+	DEF_MOD("fcpvd3",		 600,	R8A7795_CLK_S2D1),
+	DEF_MOD("fcpvd2",		 601,	R8A7795_CLK_S2D1),
+	DEF_MOD("fcpvd1",		 602,	R8A7795_CLK_S2D1),
+	DEF_MOD("fcpvd0",		 603,	R8A7795_CLK_S2D1),
+	DEF_MOD("fcpvb1",		 606,	R8A7795_CLK_S2D1),
+	DEF_MOD("fcpvb0",		 607,	R8A7795_CLK_S2D1),
+	DEF_MOD("fcpvi2",		 609,	R8A7795_CLK_S2D1),
+	DEF_MOD("fcpvi1",		 610,	R8A7795_CLK_S2D1),
+	DEF_MOD("fcpvi0",		 611,	R8A7795_CLK_S2D1),
+	DEF_MOD("fcpf2",		 613,	R8A7795_CLK_S2D1),
+	DEF_MOD("fcpf1",		 614,	R8A7795_CLK_S2D1),
+	DEF_MOD("fcpf0",		 615,	R8A7795_CLK_S2D1),
+	DEF_MOD("fcpci1",		 616,	R8A7795_CLK_S2D1),
+	DEF_MOD("fcpci0",		 617,	R8A7795_CLK_S2D1),
+	DEF_MOD("fcpcs",		 619,	R8A7795_CLK_S2D1),
 	DEF_MOD("vspd3",		 620,	R8A7795_CLK_S2D1),
 	DEF_MOD("vspd2",		 621,	R8A7795_CLK_S2D1),
 	DEF_MOD("vspd1",		 622,	R8A7795_CLK_S2D1),
-- 
2.4.10

[PATCH/RFC 2/9] clk: shmobile: r8a7795: Add LVDS module clock

[Laurent Pinchart]

The parent clock hasn't been validated yet.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 drivers/clk/shmobile/r8a7795-cpg-mssr.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/shmobile/r8a7795-cpg-mssr.c b/drivers/clk/shmobile/r8a7795-cpg-mssr.c
index ae5004ee7bdd..a301a5e14498 100644
--- a/drivers/clk/shmobile/r8a7795-cpg-mssr.c
+++ b/drivers/clk/shmobile/r8a7795-cpg-mssr.c
@@ -162,6 +162,7 @@ static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = {
 	DEF_MOD("du2",			 722,	R8A7795_CLK_S2D1),
 	DEF_MOD("du1",			 723,	R8A7795_CLK_S2D1),
 	DEF_MOD("du0",			 724,	R8A7795_CLK_S2D1),
+	DEF_MOD("lvds",			 727,	R8A7795_CLK_S2D1),
 	DEF_MOD("hdmi1",		 728,	R8A7795_CLK_HDMI),
 	DEF_MOD("hdmi0",		 729,	R8A7795_CLK_HDMI),
 	DEF_MOD("etheravb",		 812,	R8A7795_CLK_S3D2),
-- 
2.4.10

[PATCH/RFC 3/9] v4l: Add Renesas R-Car FCP driver

[Laurent Pinchart]

The FCP is a companion module of video processing modules in the
Renesas R-Car Gen3 SoCs. It provides data compression and decompression,
data caching, and converting of AXI transaction in order to reduce the
memory bandwidth.

The driver is not meant to be used standalone but provides an API to the
video processing modules to control the FCP.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 .../devicetree/bindings/media/renesas,fcp.txt      |  24 +++
 MAINTAINERS                                        |  10 ++
 drivers/media/platform/Kconfig                     |  13 ++
 drivers/media/platform/Makefile                    |   1 +
 drivers/media/platform/rcar-fcp.c                  | 176 +++++++++++++++++++++
 include/media/rcar-fcp.h                           |  34 ++++
 6 files changed, 258 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/media/renesas,fcp.txt
 create mode 100644 drivers/media/platform/rcar-fcp.c
 create mode 100644 include/media/rcar-fcp.h

diff --git a/Documentation/devicetree/bindings/media/renesas,fcp.txt b/Documentation/devicetree/bindings/media/renesas,fcp.txt
new file mode 100644
index 000000000000..b454a3caf3c9
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/renesas,fcp.txt
@@ -0,0 +1,24 @@
+Renesas R-Car Frame Compression Processor (FCP)
+-----------------------------------------------
+
+The FCP is a companion module of video processing modules in the Renesas R-Car
+Gen3 SoCs. It provides data compression and decompression, data caching, and
+converting of AXI transaction in order to reduce the memory bandwidth.
+
+There are three types of FCP whose configuration and behaviour highly depend
+on the module they are paired with.
+
+ - compatible: Must be one of the following
+   - "renesas,fcpv" for the 'FCP for VSP' device
+ - reg: the register base and size for the device registers
+ - clocks: Reference to the functional clock
+
+
+Device node example
+-------------------
+
+	fcpvd1: fcp@fea2f000 {
+		compatible = "renesas,fcpv";
+		reg = <0 0xfea2f000 0 0x200>;
+		clocks = <&cpg CPG_MOD 602>;
+	};
diff --git a/MAINTAINERS b/MAINTAINERS
index f07592658119..706f56e52888 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6933,6 +6933,16 @@ L:	linux-iio@vger.kernel.org
 S:	Maintained
 F:	drivers/iio/potentiometer/mcp4531.c
 
+MEDIA DRIVERS FOR RENESAS - FCP
+M:	Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+L:	linux-media@vger.kernel.org
+L:	linux-renesas-soc@vger.kernel.org
+T:	git git://linuxtv.org/media_tree.git
+S:	Supported
+F:	Documentation/devicetree/bindings/media/renesas,fcp.txt
+F:	drivers/media/platform/rcar-fcp.c
+F:	include/media/rcar-fcp.h
+
 MEDIA DRIVERS FOR RENESAS - VSP1
 M:	Laurent Pinchart <laurent.pinchart@ideasonboard.com>
 L:	linux-media@vger.kernel.org
diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig
index fd4fcd5a7184..cbb4e5735bf8 100644
--- a/drivers/media/platform/Kconfig
+++ b/drivers/media/platform/Kconfig
@@ -255,6 +255,19 @@ config VIDEO_RENESAS_JPU
 	  To compile this driver as a module, choose M here: the module
 	  will be called rcar_jpu.
 
+config VIDEO_RENESAS_FCP
+	tristate "Renesas Frame Compression Processor"
+	depends on ARCH_SHMOBILE || COMPILE_TEST
+	depends on OF
+	---help---
+	  This is a driver for the Renesas Frame Compression Processor (FCP).
+	  The FCP is a companion module of video processing modules in the
+	  Renesas R-Car Gen3 SoCs. It handles memory access for the codec,
+	  VSP and FDP modules.
+
+	  To compile this driver as a module, choose M here: the module
+	  will be called rcar-fcp.
+
 config VIDEO_RENESAS_VSP1
 	tristate "Renesas VSP1 Video Processing Engine"
 	depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API && HAS_DMA
diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile
index 028a7233096b..b25735a24306 100644
--- a/drivers/media/platform/Makefile
+++ b/drivers/media/platform/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_VIDEO_SH_VOU)		+= sh_vou.o
 
 obj-$(CONFIG_SOC_CAMERA)		+= soc_camera/
 
+obj-$(CONFIG_VIDEO_RENESAS_FCP) 	+= rcar-fcp.o
 obj-$(CONFIG_VIDEO_RENESAS_JPU) 	+= rcar_jpu.o
 obj-$(CONFIG_VIDEO_RENESAS_VSP1)	+= vsp1/
 
diff --git a/drivers/media/platform/rcar-fcp.c b/drivers/media/platform/rcar-fcp.c
new file mode 100644
index 000000000000..cf8cb629ae4f
--- /dev/null
+++ b/drivers/media/platform/rcar-fcp.c
@@ -0,0 +1,176 @@
+/*
+ * rcar-fcp.c  --  R-Car Frame Compression Processor Driver
+ *
+ * Copyright (C) 2016 Renesas Electronics Corporation
+ *
+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/device.h>
+#include <linux/list.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/slab.h>
+
+#include <media/rcar-fcp.h>
+
+struct rcar_fcp_device {
+	struct list_head list;
+	struct device *dev;
+};
+
+static LIST_HEAD(fcp_devices);
+static DEFINE_MUTEX(fcp_lock);
+
+/* -----------------------------------------------------------------------------
+ * Public API
+ */
+
+/**
+ * rcar_fcp_get - Find and acquire a reference to an FCP instance
+ * @np: Device node of the FCP instance
+ *
+ * Search the list of registered FCP instances for the instance corresponding to
+ * the given device node.
+ *
+ * Return a pointer to the FCP instance, or an ERR_PTR if the instance can't be
+ * found.
+ */
+struct rcar_fcp_device *rcar_fcp_get(const struct device_node *np)
+{
+	struct rcar_fcp_device *fcp;
+
+	mutex_lock(&fcp_lock);
+
+	list_for_each_entry(fcp, &fcp_devices, list) {
+		if (fcp->dev->of_node != np)
+			continue;
+
+		/*
+		 * Make sure the module won't be unloaded behind our back. This
+		 * is a poor's man safety net, the module should really not be
+		 * unloaded while FCP users can be active.
+		 */
+		if (!try_module_get(fcp->dev->driver->owner))
+			fcp = NULL;
+
+		goto done;
+	}
+
+	fcp = ERR_PTR(-EPROBE_DEFER);
+
+done:
+	mutex_unlock(&fcp_lock);
+	return fcp;
+}
+EXPORT_SYMBOL_GPL(rcar_fcp_get);
+
+/**
+ * rcar_fcp_put - Release a reference to an FCP instance
+ * @fcp: The FCP instance
+ *
+ * Release the FCP instance acquired by a call to rcar_fcp_get().
+ */
+void rcar_fcp_put(struct rcar_fcp_device *fcp)
+{
+	if (fcp)
+		module_put(fcp->dev->driver->owner);
+}
+EXPORT_SYMBOL_GPL(rcar_fcp_put);
+
+/**
+ * rcar_fcp_enable - Enable an FCP
+ * @fcp: The FCP instance
+ *
+ * Before any memory access through an FCP is performed by a module, the FCP
+ * must be enabled by a call to this function. The enable calls are reference
+ * counted, each of them must be followed by one rcar_fcp_disable() call when
+ * no more memory transfer can occur through the FCP.
+ */
+void rcar_fcp_enable(struct rcar_fcp_device *fcp)
+{
+	if (fcp)
+		pm_runtime_get_sync(fcp->dev);
+}
+EXPORT_SYMBOL_GPL(rcar_fcp_enable);
+
+/**
+ * rcar_fcp_disable - Disable an FCP
+ * @fcp: The FCP instance
+ *
+ * This function is the counterpart of rcar_fcp_enable(). As enable calls are
+ * reference counted a disable call may not disable the FCP synchronously.
+ */
+void rcar_fcp_disable(struct rcar_fcp_device *fcp)
+{
+	if (fcp)
+		pm_runtime_put(fcp->dev);
+}
+EXPORT_SYMBOL_GPL(rcar_fcp_disable);
+
+/* -----------------------------------------------------------------------------
+ * Platform Driver
+ */
+
+static int rcar_fcp_probe(struct platform_device *pdev)
+{
+	struct rcar_fcp_device *fcp;
+
+	fcp = devm_kzalloc(&pdev->dev, sizeof(*fcp), GFP_KERNEL);
+	if (fcp == NULL)
+		return -ENOMEM;
+
+	fcp->dev = &pdev->dev;
+
+	pm_runtime_enable(&pdev->dev);
+
+	mutex_lock(&fcp_lock);
+	list_add_tail(&fcp->list, &fcp_devices);
+	mutex_unlock(&fcp_lock);
+
+	platform_set_drvdata(pdev, fcp);
+
+	return 0;
+}
+
+static int rcar_fcp_remove(struct platform_device *pdev)
+{
+	struct rcar_fcp_device *fcp = platform_get_drvdata(pdev);
+
+	mutex_lock(&fcp_lock);
+	list_del(&fcp->list);
+	mutex_unlock(&fcp_lock);
+
+	pm_runtime_disable(&pdev->dev);
+
+	return 0;
+}
+
+static const struct of_device_id rcar_fcp_of_match[] = {
+	{ .compatible = "renesas,fcpv" },
+	{ },
+};
+
+static struct platform_driver rcar_fcp_platform_driver = {
+	.probe		= rcar_fcp_probe,
+	.remove		= rcar_fcp_remove,
+	.driver		= {
+		.name	= "rcar-fcp",
+		.of_match_table = rcar_fcp_of_match,
+		.suppress_bind_attrs = true,
+	},
+};
+
+module_platform_driver(rcar_fcp_platform_driver);
+
+MODULE_ALIAS("rcar-fcp");
+MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
+MODULE_DESCRIPTION("Renesas FCP Driver");
+MODULE_LICENSE("GPL");
diff --git a/include/media/rcar-fcp.h b/include/media/rcar-fcp.h
new file mode 100644
index 000000000000..4260cf48d3b1
--- /dev/null
+++ b/include/media/rcar-fcp.h
@@ -0,0 +1,34 @@
+/*
+ * rcar-fcp.h  --  R-Car Frame Compression Processor Driver
+ *
+ * Copyright (C) 2016 Renesas Electronics Corporation
+ *
+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef __MEDIA_RCAR_FCP_H__
+#define __MEDIA_RCAR_FCP_H__
+
+struct device_node;
+struct rcar_fcp_device;
+
+#if IS_ENABLED(CONFIG_VIDEO_RENESAS_FCP)
+struct rcar_fcp_device *rcar_fcp_get(const struct device_node *np);
+void rcar_fcp_put(struct rcar_fcp_device *fcp);
+void rcar_fcp_enable(struct rcar_fcp_device *fcp);
+void rcar_fcp_disable(struct rcar_fcp_device *fcp);
+#else
+static inline struct rcar_fcp_device *rcar_fcp_get(const struct device_node *np)
+{
+	return ERR_PTR(-ENOENT);
+}
+static inline void rcar_fcp_put(struct rcar_fcp_device *fcp) { }
+static inline void rcar_fcp_enable(struct rcar_fcp_device *fcp) { }
+static inline void rcar_fcp_disable(struct rcar_fcp_device *fcp) { }
+#endif
+
+#endif /* __MEDIA_RCAR_FCP_H__ */
-- 
2.4.10

[PATCH/RFC 4/9] v4l: vsp1: VSPD instances have no LUT on Gen3

[Laurent Pinchart]

Remove the HAS_LUT flag in the corresponding device information entry.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 drivers/media/platform/vsp1/vsp1_drv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/media/platform/vsp1/vsp1_drv.c b/drivers/media/platform/vsp1/vsp1_drv.c
index 25750a0e4631..da43e3f35610 100644
--- a/drivers/media/platform/vsp1/vsp1_drv.c
+++ b/drivers/media/platform/vsp1/vsp1_drv.c
@@ -623,7 +623,7 @@ static const struct vsp1_device_info vsp1_device_infos[] = {
 		.uapi = true,
 	}, {
 		.version = VI6_IP_VERSION_MODEL_VSPD_GEN3,
-		.features = VSP1_HAS_BRU | VSP1_HAS_LIF | VSP1_HAS_LUT,
+		.features = VSP1_HAS_BRU | VSP1_HAS_LIF,
 		.rpf_count = 5,
 		.wpf_count = 2,
 		.num_bru_inputs = 5,
-- 
2.4.10

[PATCH/RFC 5/9] v4l: vsp1: Add FCP support

[Laurent Pinchart]

On some platforms the VSP performs memory accesses through an FCP. When
that's the case get a reference to the FCP from the VSP DT node and
enable/disable it at runtime as needed.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 .../devicetree/bindings/media/renesas,vsp1.txt     |  5 +++++
 drivers/media/platform/Kconfig                     |  1 +
 drivers/media/platform/vsp1/vsp1.h                 |  2 ++
 drivers/media/platform/vsp1/vsp1_drv.c             | 24 +++++++++++++++++++++-
 4 files changed, 31 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/media/renesas,vsp1.txt b/Documentation/devicetree/bindings/media/renesas,vsp1.txt
index 627405abd144..9b695bcbf219 100644
--- a/Documentation/devicetree/bindings/media/renesas,vsp1.txt
+++ b/Documentation/devicetree/bindings/media/renesas,vsp1.txt
@@ -14,6 +14,11 @@ Required properties:
   - interrupts: VSP interrupt specifier.
   - clocks: A phandle + clock-specifier pair for the VSP functional clock.
 
+Optional properties:
+
+  - renesas,fcp: A phandle referencing the FCP that handles memory accesses
+                 for the VSP. Not needed on Gen2, mandatory on Gen3.
+
 
 Example: R8A7790 (R-Car H2) VSP1-S node
 
diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig
index cbb4e5735bf8..b12502555544 100644
--- a/drivers/media/platform/Kconfig
+++ b/drivers/media/platform/Kconfig
@@ -272,6 +272,7 @@ config VIDEO_RENESAS_VSP1
 	tristate "Renesas VSP1 Video Processing Engine"
 	depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API && HAS_DMA
 	depends on (ARCH_SHMOBILE && OF) || COMPILE_TEST
+	depends on m || VIDEO_RENESAS_FCP != m
 	select VIDEOBUF2_DMA_CONTIG
 	---help---
 	  This is a V4L2 driver for the Renesas VSP1 video processing engine.
diff --git a/drivers/media/platform/vsp1/vsp1.h b/drivers/media/platform/vsp1/vsp1.h
index 910d6b8e8b50..4316766c6489 100644
--- a/drivers/media/platform/vsp1/vsp1.h
+++ b/drivers/media/platform/vsp1/vsp1.h
@@ -25,6 +25,7 @@
 
 struct clk;
 struct device;
+struct rcar_fcp_device;
 
 struct vsp1_dl;
 struct vsp1_drm;
@@ -63,6 +64,7 @@ struct vsp1_device {
 
 	void __iomem *mmio;
 	struct clk *clock;
+	struct rcar_fcp_device *fcp;
 
 	struct mutex lock;
 	int ref_count;
diff --git a/drivers/media/platform/vsp1/vsp1_drv.c b/drivers/media/platform/vsp1/vsp1_drv.c
index da43e3f35610..f1b8343cc166 100644
--- a/drivers/media/platform/vsp1/vsp1_drv.c
+++ b/drivers/media/platform/vsp1/vsp1_drv.c
@@ -21,6 +21,7 @@
 #include <linux/platform_device.h>
 #include <linux/videodev2.h>
 
+#include <media/rcar-fcp.h>
 #include <media/v4l2-subdev.h>
 
 #include "vsp1.h"
@@ -491,8 +492,11 @@ int vsp1_device_get(struct vsp1_device *vsp1)
 	if (ret < 0)
 		goto done;
 
+	rcar_fcp_enable(vsp1->fcp);
+
 	ret = vsp1_device_init(vsp1);
 	if (ret < 0) {
+		rcar_fcp_disable(vsp1->fcp);
 		clk_disable_unprepare(vsp1->clock);
 		goto done;
 	}
@@ -515,8 +519,10 @@ void vsp1_device_put(struct vsp1_device *vsp1)
 {
 	mutex_lock(&vsp1->lock);
 
-	if (--vsp1->ref_count == 0)
+	if (--vsp1->ref_count == 0) {
+		rcar_fcp_disable(vsp1->fcp);
 		clk_disable_unprepare(vsp1->clock);
+	}
 
 	mutex_unlock(&vsp1->lock);
 }
@@ -537,6 +543,7 @@ static int vsp1_pm_suspend(struct device *dev)
 
 	vsp1_pipelines_suspend(vsp1);
 
+	rcar_fcp_disable(vsp1->fcp);
 	clk_disable_unprepare(vsp1->clock);
 
 	return 0;
@@ -552,6 +559,7 @@ static int vsp1_pm_resume(struct device *dev)
 		return 0;
 
 	clk_prepare_enable(vsp1->clock);
+	rcar_fcp_enable(vsp1->fcp);
 
 	vsp1_pipelines_resume(vsp1);
 
@@ -633,6 +641,7 @@ static const struct vsp1_device_info vsp1_device_infos[] = {
 static int vsp1_probe(struct platform_device *pdev)
 {
 	struct vsp1_device *vsp1;
+	struct device_node *fcp_node;
 	struct resource *irq;
 	struct resource *io;
 	unsigned int i;
@@ -673,6 +682,18 @@ static int vsp1_probe(struct platform_device *pdev)
 		return ret;
 	}
 
+	/* FCP (optional) */
+	fcp_node = of_parse_phandle(pdev->dev.of_node, "renesas,fcp", 0);
+	if (fcp_node) {
+		vsp1->fcp = rcar_fcp_get(fcp_node);
+		of_node_put(fcp_node);
+		if (IS_ERR(vsp1->fcp)) {
+			dev_dbg(&pdev->dev, "FCP not found (%ld)\n",
+				PTR_ERR(vsp1->fcp));
+			return PTR_ERR(vsp1->fcp);
+		}
+	}
+
 	/* Configure device parameters based on the version register. */
 	ret = clk_prepare_enable(vsp1->clock);
 	if (ret < 0)
@@ -713,6 +734,7 @@ static int vsp1_remove(struct platform_device *pdev)
 	struct vsp1_device *vsp1 = platform_get_drvdata(pdev);
 
 	vsp1_destroy_entities(vsp1);
+	rcar_fcp_put(vsp1->fcp);
 
 	return 0;
 }
-- 
2.4.10

[PATCH/RFC 6/9] ARM64: renesas: r8a7795: Add FCPV nodes

[Laurent Pinchart]

The FCPs handle the interface between various IP cores and memory. Add
the instances related to the VSP2s.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 63 ++++++++++++++++++++++++++++++++
 1 file changed, 63 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index b5e46e4ff72a..f62d6fa28acc 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -960,5 +960,68 @@
 			#dma-cells = <1>;
 			dma-channels = <2>;
 		};
+
+		fcpvb1: fcp@fe92f000 {
+			compatible = "renesas,fcpv";
+			reg = <0 0xfe92f000 0 0x200>;
+			clocks = <&cpg CPG_MOD 606>;
+			power-domains = <&cpg>;
+		};
+
+		fcpvb0: fcp@fe96f000 {
+			compatible = "renesas,fcpv";
+			reg = <0 0xfe96f000 0 0x200>;
+			clocks = <&cpg CPG_MOD 607>;
+			power-domains = <&cpg>;
+		};
+
+		fcpvi0: fcp@fe9af000 {
+			compatible = "renesas,fcpv";
+			reg = <0 0xfe9af000 0 0x200>;
+			clocks = <&cpg CPG_MOD 611>;
+			power-domains = <&cpg>;
+		};
+
+		fcpvi1: fcp@fe9bf000 {
+			compatible = "renesas,fcpv";
+			reg = <0 0xfe9bf000 0 0x200>;
+			clocks = <&cpg CPG_MOD 610>;
+			power-domains = <&cpg>;
+		};
+
+		fcpvi2: fcp@fe9cf000 {
+			compatible = "renesas,fcpv";
+			reg = <0 0xfe9cf000 0 0x200>;
+			clocks = <&cpg CPG_MOD 609>;
+			power-domains = <&cpg>;
+		};
+
+		fcpvd0: fcp@fea27000 {
+			compatible = "renesas,fcpv";
+			reg = <0 0xfea27000 0 0x200>;
+			clocks = <&cpg CPG_MOD 603>;
+			power-domains = <&cpg>;
+		};
+
+		fcpvd1: fcp@fea2f000 {
+			compatible = "renesas,fcpv";
+			reg = <0 0xfea2f000 0 0x200>;
+			clocks = <&cpg CPG_MOD 602>;
+			power-domains = <&cpg>;
+		};
+
+		fcpvd2: fcp@fea37000 {
+			compatible = "renesas,fcpv";
+			reg = <0 0xfea37000 0 0x200>;
+			clocks = <&cpg CPG_MOD 601>;
+			power-domains = <&cpg>;
+		};
+
+		fcpvd3: fcp@fea3f000 {
+			compatible = "renesas,fcpv";
+			reg = <0 0xfea3f000 0 0x200>;
+			clocks = <&cpg CPG_MOD 600>;
+			power-domains = <&cpg>;
+		};
 	};
 };
-- 
2.4.10

[PATCH/RFC 7/9] ARM64: renesas: r8a7795: Add VSP instances

[Laurent Pinchart]

The r8a7795 has 9 VSP instances with various capabilities.

Only the VSPD instances are currently enabled as the other 5 instances
cause the following crash when reading the version register.

[    5.284206] Bad mode in Error handler detected, code 0xbf000002 -- SError
[    5.287590] CPU: 0 PID: 518 Comm: mdev Not tainted 4.4.0-rc3+ #162
[    5.290666] Hardware name: Renesas Salvator-X board based on r8a7795 (DT)
[    5.294044] task: ffffffc039a8b700 ti: ffffffc038db4000 task.ti: ffffffc038db4000
[    5.297770] PC is at 0x9dd0
[    5.299160] LR is at 0x0
[    5.300420] pc : [<0000000000009dd0>] lr : [<0000000000000000>] pstate: 00000010
[    5.304101] sp : 00000000ffd94300
[    5.305750] x12: 0000000000000000
[    5.307446] x11: 0000000000000000 x10: 0000000000000000
[    5.310096] x9 : 0000000000000000 x8 : 0000000000000000
[    5.312745] x7 : 0000000000000000 x6 : 0000000000000000
[    5.315395] x5 : 0000000000000000 x4 : 0000000000000000
[    5.318044] x3 : 0000000000000000 x2 : 0000000000000000
[    5.320694] x1 : 0000000000000000 x0 : 0000000000000000

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 128 +++++++++++++++++++++++++++++++
 1 file changed, 128 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index f62d6fa28acc..3c49ba5ecfbb 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -961,6 +961,21 @@
 			dma-channels = <2>;
 		};
 
+		vspbc: vsp@fe920000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfe920000 0 0x8000>;
+			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 624>;
+
+			renesas,fcp = <&fcpvb1>;
+
+			renesas,has-lut;
+			renesas,has-sru;
+			renesas,#rpf = <5>;
+			renesas,#wpf = <1>;
+			status = "disabled";
+		};
+
 		fcpvb1: fcp@fe92f000 {
 			compatible = "renesas,fcpv";
 			reg = <0 0xfe92f000 0 0x200>;
@@ -968,6 +983,19 @@
 			power-domains = <&cpg>;
 		};
 
+		vspbd: vsp@fe960000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfe960000 0 0x8000>;
+			interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 626>;
+
+			renesas,fcp = <&fcpvb0>;
+
+			renesas,#rpf = <5>;
+			renesas,#wpf = <1>;
+			status = "disabled";
+		};
+
 		fcpvb0: fcp@fe96f000 {
 			compatible = "renesas,fcpv";
 			reg = <0 0xfe96f000 0 0x200>;
@@ -975,6 +1003,22 @@
 			power-domains = <&cpg>;
 		};
 
+		vspi0: vsp@fe9a0000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfe9a0000 0 0x8000>;
+			interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 631>;
+
+			renesas,fcp = <&fcpvi0>;
+
+			renesas,has-lut;
+			renesas,has-sru;
+			renesas,#rpf = <1>;
+			renesas,#uds = <3>;
+			renesas,#wpf = <1>;
+			status = "disabled";
+		};
+
 		fcpvi0: fcp@fe9af000 {
 			compatible = "renesas,fcpv";
 			reg = <0 0xfe9af000 0 0x200>;
@@ -982,6 +1026,22 @@
 			power-domains = <&cpg>;
 		};
 
+		vspi1: vsp@fe9b0000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfe9b0000 0 0x8000>;
+			interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 630>;
+
+			renesas,fcp = <&fcpvi1>;
+
+			renesas,has-lut;
+			renesas,has-sru;
+			renesas,#rpf = <1>;
+			renesas,#uds = <1>;
+			renesas,#wpf = <1>;
+			status = "disabled";
+		};
+
 		fcpvi1: fcp@fe9bf000 {
 			compatible = "renesas,fcpv";
 			reg = <0 0xfe9bf000 0 0x200>;
@@ -989,6 +1049,22 @@
 			power-domains = <&cpg>;
 		};
 
+		vspi2: vsp@fe9c0000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfe9c0000 0 0x8000>;
+			interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 629>;
+
+			renesas,fcp = <&fcpvi2>;
+
+			renesas,has-lut;
+			renesas,has-sru;
+			renesas,#rpf = <1>;
+			renesas,#uds = <1>;
+			renesas,#wpf = <1>;
+			status = "disabled";
+		};
+
 		fcpvi2: fcp@fe9cf000 {
 			compatible = "renesas,fcpv";
 			reg = <0 0xfe9cf000 0 0x200>;
@@ -996,6 +1072,19 @@
 			power-domains = <&cpg>;
 		};
 
+		vspd0: vsp@fea20000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfea20000 0 0x4000>;
+			interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 623>;
+
+			renesas,fcp = <&fcpvd0>;
+
+			renesas,has-lif;
+			renesas,#rpf = <5>;
+			renesas,#wpf = <2>;
+		};
+
 		fcpvd0: fcp@fea27000 {
 			compatible = "renesas,fcpv";
 			reg = <0 0xfea27000 0 0x200>;
@@ -1003,6 +1092,19 @@
 			power-domains = <&cpg>;
 		};
 
+		vspd1: vsp@fea28000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfea28000 0 0x4000>;
+			interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 622>;
+
+			renesas,fcp = <&fcpvd1>;
+
+			renesas,has-lif;
+			renesas,#rpf = <5>;
+			renesas,#wpf = <2>;
+		};
+
 		fcpvd1: fcp@fea2f000 {
 			compatible = "renesas,fcpv";
 			reg = <0 0xfea2f000 0 0x200>;
@@ -1010,6 +1112,19 @@
 			power-domains = <&cpg>;
 		};
 
+		vspd2: vsp@fea30000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfea30000 0 0x4000>;
+			interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 621>;
+
+			renesas,fcp = <&fcpvd2>;
+
+			renesas,has-lif;
+			renesas,#rpf = <5>;
+			renesas,#wpf = <2>;
+		};
+
 		fcpvd2: fcp@fea37000 {
 			compatible = "renesas,fcpv";
 			reg = <0 0xfea37000 0 0x200>;
@@ -1017,6 +1132,19 @@
 			power-domains = <&cpg>;
 		};
 
+		vspd3: vsp@fea38000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfea38000 0 0x4000>;
+			interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 620>;
+
+			renesas,fcp = <&fcpvd3>;
+
+			renesas,has-lif;
+			renesas,#rpf = <5>;
+			renesas,#wpf = <2>;
+		};
+
 		fcpvd3: fcp@fea3f000 {
 			compatible = "renesas,fcpv";
 			reg = <0 0xfea3f000 0 0x200>;
-- 
2.4.10

[PATCH/RFC 8/9] ARM64: renesas: r8a7795: Add DU device to DT

[Laurent Pinchart]

Add the DU device to r8a7795.dtsi in a disabled state.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 46 ++++++++++++++++++++++++++++++++
 1 file changed, 46 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 3c49ba5ecfbb..c57e3018cb48 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1151,5 +1151,51 @@
 			clocks = <&cpg CPG_MOD 600>;
 			power-domains = <&cpg>;
 		};
+
+		du: display@feb00000 {
+			compatible = "renesas,du-r8a7795";
+			reg = <0 0xfeb00000 0 0x80000>,
+			      <0 0xfeb90000 0 0x14>;
+			reg-names = "du", "lvds.0";
+			interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>,
+				     <0 268 IRQ_TYPE_LEVEL_HIGH>,
+				     <0 269 IRQ_TYPE_LEVEL_HIGH>,
+				     <0 270 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 724>,
+				 <&cpg CPG_MOD 723>,
+				 <&cpg CPG_MOD 722>,
+				 <&cpg CPG_MOD 721>,
+				 <&cpg CPG_MOD 727>;
+			clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
+			status = "disabled";
+
+			vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					du_out_rgb: endpoint {
+					};
+				};
+				port@1 {
+					reg = <1>;
+					du_out_hdmi0: endpoint {
+					};
+				};
+				port@2 {
+					reg = <2>;
+					du_out_hdmi1: endpoint {
+					};
+				};
+				port@3 {
+					reg = <3>;
+					du_out_lvds0: endpoint {
+					};
+				};
+			};
+		};
 	};
 };
-- 
2.4.10

[PATCH/RFC 9/9] ARM64: renesas: salvator-x: Enable DU

[Laurent Pinchart]

Only the VGA output is supported for now.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 44 ++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index 31ace9c1f79d..88573fac0e19 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -86,6 +86,50 @@
 			sound-dai = <&ak4613>;
 		};
 	};
+
+	vga-encoder {
+		compatible = "adi,adv7123";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				adv7123_in: endpoint {
+					remote-endpoint = <&du_out_rgb>;
+				};
+			};
+			port@1 {
+				reg = <1>;
+				adv7123_out: endpoint {
+					remote-endpoint = <&vga_in>;
+				};
+			};
+		};
+	};
+
+	vga {
+		compatible = "vga-connector";
+
+		port {
+			vga_in: endpoint {
+				remote-endpoint = <&adv7123_out>;
+			};
+		};
+	};
+};
+
+&du {
+	status = "okay";
+
+	ports {
+		port@0 {
+			endpoint {
+				remote-endpoint = <&adv7123_in>;
+			};
+		};
+	};
 };
 
 &extal_clk {
-- 
2.4.10

Re: [PATCH/RFC 1/9] clk: shmobile: r8a7795: Add FCP clocks

[Geert Uytterhoeven]

On Fri, Feb 12, 2016 at 3:00 AM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:
> The parent clock isn't documented in the datasheet, use S2D1 as a best
> guess for now.

Looks like a good guess...
I assume the driver doesn't depend on the clock rate?

> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC 2/9] clk: shmobile: r8a7795: Add LVDS module clock

[Geert Uytterhoeven]

On Fri, Feb 12, 2016 at 3:00 AM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:
> The parent clock hasn't been validated yet.

I assume the driver doesn't depend on the clock rate?

> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC 3/9] v4l: Add Renesas R-Car FCP driver

[Geert Uytterhoeven]

Hi Laurent,

On Fri, Feb 12, 2016 at 3:00 AM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:
> The FCP is a companion module of video processing modules in the
> Renesas R-Car Gen3 SoCs. It provides data compression and decompression,
> data caching, and converting of AXI transaction in order to reduce the

"conversion"?

> memory bandwidth.
>
> The driver is not meant to be used standalone but provides an API to the
> video processing modules to control the FCP.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Thanks for your patch!

> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/renesas,fcp.txt
> @@ -0,0 +1,24 @@
> +Renesas R-Car Frame Compression Processor (FCP)
> +-----------------------------------------------
> +
> +The FCP is a companion module of video processing modules in the Renesas R-Car
> +Gen3 SoCs. It provides data compression and decompression, data caching, and
> +converting of AXI transaction in order to reduce the memory bandwidth.

"conversion"?

> +
> +There are three types of FCP whose configuration and behaviour highly depend
> +on the module they are paired with.
> +
> + - compatible: Must be one of the following
> +   - "renesas,fcpv" for the 'FCP for VSP' device

Any chance this module can turn up in another SoC later? I guess yes.
What about future-proofing using "renesas,r8a7795-fcpv" and
"renesas,rcar-gen3-fcpv"?

> diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig
> index fd4fcd5a7184..cbb4e5735bf8 100644
> --- a/drivers/media/platform/Kconfig
> +++ b/drivers/media/platform/Kconfig
> @@ -255,6 +255,19 @@ config VIDEO_RENESAS_JPU
>           To compile this driver as a module, choose M here: the module
>           will be called rcar_jpu.
>
> +config VIDEO_RENESAS_FCP
> +       tristate "Renesas Frame Compression Processor"
> +       depends on ARCH_SHMOBILE || COMPILE_TEST

ARCH_RENESAS

> diff --git a/drivers/media/platform/rcar-fcp.c b/drivers/media/platform/rcar-fcp.c
> new file mode 100644
> index 000000000000..cf8cb629ae4f
> --- /dev/null
> +++ b/drivers/media/platform/rcar-fcp.c

> +struct rcar_fcp_device *rcar_fcp_get(const struct device_node *np)
> +{
> +       struct rcar_fcp_device *fcp;
> +
> +       mutex_lock(&fcp_lock);
> +
> +       list_for_each_entry(fcp, &fcp_devices, list) {
> +               if (fcp->dev->of_node != np)
> +                       continue;
> +
> +               /*
> +                * Make sure the module won't be unloaded behind our back. This
> +                * is a poor's man safety net, the module should really not be

poor man's

> diff --git a/include/media/rcar-fcp.h b/include/media/rcar-fcp.h
> new file mode 100644
> index 000000000000..4260cf48d3b1
> --- /dev/null
> +++ b/include/media/rcar-fcp.h
> @@ -0,0 +1,34 @@
> +/*
> + * rcar-fcp.h  --  R-Car Frame Compression Processor Driver
> + *
> + * Copyright (C) 2016 Renesas Electronics Corporation
> + *
> + * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +#ifndef __MEDIA_RCAR_FCP_H__
> +#define __MEDIA_RCAR_FCP_H__
> +
> +struct device_node;
> +struct rcar_fcp_device;
> +
> +#if IS_ENABLED(CONFIG_VIDEO_RENESAS_FCP)
> +struct rcar_fcp_device *rcar_fcp_get(const struct device_node *np);
> +void rcar_fcp_put(struct rcar_fcp_device *fcp);
> +void rcar_fcp_enable(struct rcar_fcp_device *fcp);
> +void rcar_fcp_disable(struct rcar_fcp_device *fcp);
> +#else
> +static inline struct rcar_fcp_device *rcar_fcp_get(const struct device_node *np)
> +{
> +       return ERR_PTR(-ENOENT);
> +}
> +static inline void rcar_fcp_put(struct rcar_fcp_device *fcp) { }
> +static inline void rcar_fcp_enable(struct rcar_fcp_device *fcp) { }
> +static inline void rcar_fcp_disable(struct rcar_fcp_device *fcp) { }

Given the dummies, the vsp driver can also work when FCP support is not
enabled?
Or is this meant purely to avoid #ifdefs in the vsp driver when compiling for
R-Car Gen2?

In case of the latter, you may want to enforce this in Kconfig.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC 6/9] ARM64: renesas: r8a7795: Add FCPV nodes

[Geert Uytterhoeven]

Hi Laurent,

On Fri, Feb 12, 2016 at 3:00 AM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:
> The FCPs handle the interface between various IP cores and memory. Add
> the instances related to the VSP2s.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> ---
>  arch/arm64/boot/dts/renesas/r8a7795.dtsi | 63 ++++++++++++++++++++++++++++++++
>  1 file changed, 63 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> index b5e46e4ff72a..f62d6fa28acc 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> @@ -960,5 +960,68 @@
>                         #dma-cells = <1>;
>                         dma-channels = <2>;
>                 };
> +
> +               fcpvb1: fcp@fe92f000 {
> +                       compatible = "renesas,fcpv";
> +                       reg = <0 0xfe92f000 0 0x200>;
> +                       clocks = <&cpg CPG_MOD 606>;
> +                       power-domains = <&cpg>;
> +               };

The FCP_V modules are located in the A3VP Power Area. But adding this
information to DT depends on the SYSC PM Domain driver.

I'll try to post my WIP PM Domain patchset for R-Car ASAP...

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC 7/9] ARM64: renesas: r8a7795: Add VSP instances

[Geert Uytterhoeven]

Hi Laurent,

On Fri, Feb 12, 2016 at 3:00 AM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:
> The r8a7795 has 9 VSP instances with various capabilities.
>
> Only the VSPD instances are currently enabled as the other 5 instances
> cause the following crash when reading the version register.
>
> [    5.284206] Bad mode in Error handler detected, code 0xbf000002 -- SError

Power Area A3VP seems to be powered down when Linux is started?

> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> ---
>  arch/arm64/boot/dts/renesas/r8a7795.dtsi | 128 +++++++++++++++++++++++++++++++
>  1 file changed, 128 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> index f62d6fa28acc..3c49ba5ecfbb 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> @@ -961,6 +961,21 @@
>                         dma-channels = <2>;
>                 };
>
> +               vspbc: vsp@fe920000 {
> +                       compatible = "renesas,vsp2";
> +                       reg = <0 0xfe920000 0 0x8000>;
> +                       interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;

465, according to the Dec errata?

> +                       clocks = <&cpg CPG_MOD 624>;

The VSP2 modules are located in the A3VP Power Area. But adding this
information to DT depends on the SYSC PM Domain driver.

I'll try to post my WIP PM Domain patchset for R-Car ASAP...

> +
> +                       renesas,fcp = <&fcpvb1>;
> +
> +                       renesas,has-lut;
> +                       renesas,has-sru;
> +                       renesas,#rpf = <5>;
> +                       renesas,#wpf = <1>;
> +                       status = "disabled";
> +               };
> +
>                 fcpvb1: fcp@fe92f000 {
>                         compatible = "renesas,fcpv";
>                         reg = <0 0xfe92f000 0 0x200>;
> @@ -968,6 +983,19 @@
>                         power-domains = <&cpg>;
>                 };
>
> +               vspbd: vsp@fe960000 {
> +                       compatible = "renesas,vsp2";
> +                       reg = <0 0xfe960000 0 0x8000>;
> +                       interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;

266, according to the Dec errata?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC 1/9] clk: shmobile: r8a7795: Add FCP clocks

[Laurent Pinchart]

Hi Geert,

On Monday 15 February 2016 10:22:22 Geert Uytterhoeven wrote:
> On Fri, Feb 12, 2016 at 3:00 AM, Laurent Pinchart wrote:
> > The parent clock isn't documented in the datasheet, use S2D1 as a best
> > guess for now.
> 
> Looks like a good guess...
> I assume the driver doesn't depend on the clock rate?

Correct.

> > Signed-off-by: Laurent Pinchart
> > <laurent.pinchart+renesas@ideasonboard.com>
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thank you.

-- 
Regards,

Laurent Pinchart

Re: [PATCH/RFC 2/9] clk: shmobile: r8a7795: Add LVDS module clock

[Laurent Pinchart]

Hi Geert,

On Monday 15 February 2016 10:24:02 Geert Uytterhoeven wrote:
> On Fri, Feb 12, 2016 at 3:00 AM, Laurent Pinchart wrote:
> > The parent clock hasn't been validated yet.
> 
> I assume the driver doesn't depend on the clock rate?

Correct.

> > Signed-off-by: Laurent Pinchart
> > <laurent.pinchart+renesas@ideasonboard.com>
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thank you.

-- 
Regards,

Laurent Pinchart

Re: [PATCH/RFC 3/9] v4l: Add Renesas R-Car FCP driver

[Laurent Pinchart]

Hi Geert,

Thank you for the review.

On Monday 15 February 2016 10:32:35 Geert Uytterhoeven wrote:
> On Fri, Feb 12, 2016 at 3:00 AM, Laurent Pinchart wrote:
> > The FCP is a companion module of video processing modules in the
> > Renesas R-Car Gen3 SoCs. It provides data compression and decompression,
> > data caching, and converting of AXI transaction in order to reduce the
> 
> "conversion"?

Of course. Can you submit a similar patch to the Gen3 datasheet ? ;-)

> > memory bandwidth.
> > 
> > The driver is not meant to be used standalone but provides an API to the
> > video processing modules to control the FCP.
> > 
> > Signed-off-by: Laurent Pinchart
> > <laurent.pinchart+renesas@ideasonboard.com>
> 
> Thanks for your patch!
> 
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/renesas,fcp.txt
> > @@ -0,0 +1,24 @@
> > +Renesas R-Car Frame Compression Processor (FCP)
> > +-----------------------------------------------
> > +
> > +The FCP is a companion module of video processing modules in the Renesas
> > R-Car
> > +Gen3 SoCs. It provides data compression and decompression, data caching,
> > and
> > +converting of AXI transaction in order to reduce the memory bandwidth.
>
> "conversion"?
> 
> > +
> > +There are three types of FCP whose configuration and behaviour highly
> > depend +on the module they are paired with.
> > +
> > + - compatible: Must be one of the following
> > +   - "renesas,fcpv" for the 'FCP for VSP' device
> 
> Any chance this module can turn up in another SoC later? I guess yes.

It's not just that it can, it will.

> What about future-proofing using "renesas,r8a7795-fcpv" and "renesas,rcar-
> gen3-fcpv"?

Given that the device currently has registers and clock only, I wanted to keep 
the DT bindings simple. My plan is to introduce new compat strings later as 
needed, if needed, when incompatible FCP instances will be introduced. Feel 
free to challenge that :-)

> > diff --git a/drivers/media/platform/Kconfig
> > b/drivers/media/platform/Kconfig index fd4fcd5a7184..cbb4e5735bf8 100644
> > --- a/drivers/media/platform/Kconfig
> > +++ b/drivers/media/platform/Kconfig
> > @@ -255,6 +255,19 @@ config VIDEO_RENESAS_JPU
> >           To compile this driver as a module, choose M here: the module
> >           will be called rcar_jpu.
> > 
> > +config VIDEO_RENESAS_FCP
> > +       tristate "Renesas Frame Compression Processor"
> > +       depends on ARCH_SHMOBILE || COMPILE_TEST
> 
> ARCH_RENESAS

Ah, that's finally merged, great.

> > diff --git a/drivers/media/platform/rcar-fcp.c
> > b/drivers/media/platform/rcar-fcp.c new file mode 100644
> > index 000000000000..cf8cb629ae4f
> > --- /dev/null
> > +++ b/drivers/media/platform/rcar-fcp.c
> > 
> > +struct rcar_fcp_device *rcar_fcp_get(const struct device_node *np)
> > +{
> > +       struct rcar_fcp_device *fcp;
> > +
> > +       mutex_lock(&fcp_lock);
> > +
> > +       list_for_each_entry(fcp, &fcp_devices, list) {
> > +               if (fcp->dev->of_node != np)
> > +                       continue;
> > +
> > +               /*
> > +                * Make sure the module won't be unloaded behind our back.
> > This
> > +                * is a poor's man safety net, the module should really
> > not be
>
> poor man's
> 
> > diff --git a/include/media/rcar-fcp.h b/include/media/rcar-fcp.h
> > new file mode 100644
> > index 000000000000..4260cf48d3b1
> > --- /dev/null
> > +++ b/include/media/rcar-fcp.h
> > @@ -0,0 +1,34 @@
> > +/*
> > + * rcar-fcp.h  --  R-Car Frame Compression Processor Driver
> > + *
> > + * Copyright (C) 2016 Renesas Electronics Corporation
> > + *
> > + * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License as published by
> > + * the Free Software Foundation; either version 2 of the License, or
> > + * (at your option) any later version.
> > + */
> > +#ifndef __MEDIA_RCAR_FCP_H__
> > +#define __MEDIA_RCAR_FCP_H__
> > +
> > +struct device_node;
> > +struct rcar_fcp_device;
> > +
> > +#if IS_ENABLED(CONFIG_VIDEO_RENESAS_FCP)
> > +struct rcar_fcp_device *rcar_fcp_get(const struct device_node *np);
> > +void rcar_fcp_put(struct rcar_fcp_device *fcp);
> > +void rcar_fcp_enable(struct rcar_fcp_device *fcp);
> > +void rcar_fcp_disable(struct rcar_fcp_device *fcp);
> > +#else
> > +static inline struct rcar_fcp_device *rcar_fcp_get(const struct
> > device_node *np)
> > +{
> > +       return ERR_PTR(-ENOENT);
> > +}
> > +static inline void rcar_fcp_put(struct rcar_fcp_device *fcp) { }
> > +static inline void rcar_fcp_enable(struct rcar_fcp_device *fcp) { }
> > +static inline void rcar_fcp_disable(struct rcar_fcp_device *fcp) { }
> 
> Given the dummies, the vsp driver can also work when FCP support is not
> enabled?
> Or is this meant purely to avoid #ifdefs in the vsp driver when compiling
> for R-Car Gen2?
> 
> In case of the latter, you may want to enforce this in Kconfig.

It's the latter, I'll enforce it in Kconfig in the patch that adds FCP support 
in the VSP driver (and keep the stubs here for Gen2).

-- 
Regards,

Laurent Pinchart

Re: [PATCH/RFC 6/9] ARM64: renesas: r8a7795: Add FCPV nodes

[Laurent Pinchart]

Hi Geert,

Thank you for the review.

On Monday 15 February 2016 10:45:39 Geert Uytterhoeven wrote:
> On Fri, Feb 12, 2016 at 3:00 AM, Laurent Pinchart wrote:
> > The FCPs handle the interface between various IP cores and memory. Add
> > the instances related to the VSP2s.
> > 
> > Signed-off-by: Laurent Pinchart
> > <laurent.pinchart+renesas@ideasonboard.com>
> > ---
> >  arch/arm64/boot/dts/renesas/r8a7795.dtsi | 63 ++++++++++++++++++++++++++
> >  1 file changed, 63 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index
> > b5e46e4ff72a..f62d6fa28acc 100644
> > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > @@ -960,5 +960,68 @@
> >                         #dma-cells = <1>;
> >                         dma-channels = <2>;
> >                 };
> > 
> > +
> > +               fcpvb1: fcp@fe92f000 {
> > +                       compatible = "renesas,fcpv";
> > +                       reg = <0 0xfe92f000 0 0x200>;
> > +                       clocks = <&cpg CPG_MOD 606>;
> > +                       power-domains = <&cpg>;
> > +               };
> 
> The FCP_V modules are located in the A3VP Power Area. But adding this
> information to DT depends on the SYSC PM Domain driver.
> 
> I'll try to post my WIP PM Domain patchset for R-Car ASAP...

As soon as you add the A3VP power domain to DT I'll make sure to make use of 
it :-)

-- 
Regards,

Laurent Pinchart

Re: [PATCH/RFC 7/9] ARM64: renesas: r8a7795: Add VSP instances

[Laurent Pinchart]

Hi Geert,

On Monday 15 February 2016 10:58:36 Geert Uytterhoeven wrote:
> On Fri, Feb 12, 2016 at 3:00 AM, Laurent Pinchart wrote:
> > The r8a7795 has 9 VSP instances with various capabilities.
> > 
> > Only the VSPD instances are currently enabled as the other 5 instances
> > cause the following crash when reading the version register.
> > 
> > [    5.284206] Bad mode in Error handler detected, code 0xbf000002 --
> > SError
>
> Power Area A3VP seems to be powered down when Linux is started?

That's probably the reason indeed.

> > Signed-off-by: Laurent Pinchart
> > <laurent.pinchart+renesas@ideasonboard.com>
> > ---
> > 
> >  arch/arm64/boot/dts/renesas/r8a7795.dtsi | 128 ++++++++++++++++++++++++++
> >  1 file changed, 128 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index
> > f62d6fa28acc..3c49ba5ecfbb 100644
> > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > @@ -961,6 +961,21 @@
> >                         dma-channels = <2>;
> >                 };
> > 
> > +               vspbc: vsp@fe920000 {
> > +                       compatible = "renesas,vsp2";
> > +                       reg = <0 0xfe920000 0 0x8000>;
> > +                       interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
> 
> 465, according to the Dec errata?

Good catch. I'll fix that.

> > +                       clocks = <&cpg CPG_MOD 624>;
> 
> The VSP2 modules are located in the A3VP Power Area. But adding this
> information to DT depends on the SYSC PM Domain driver.
> 
> I'll try to post my WIP PM Domain patchset for R-Car ASAP...
> 
> > +
> > +                       renesas,fcp = <&fcpvb1>;
> > +
> > +                       renesas,has-lut;
> > +                       renesas,has-sru;
> > +                       renesas,#rpf = <5>;
> > +                       renesas,#wpf = <1>;
> > +                       status = "disabled";
> > +               };
> > +
> >                 fcpvb1: fcp@fe92f000 {
> >                         compatible = "renesas,fcpv";
> >                         reg = <0 0xfe92f000 0 0x200>;
> > @@ -968,6 +983,19 @@
> >                         power-domains = <&cpg>;
> >                 };
> > 
> > +               vspbd: vsp@fe960000 {
> > +                       compatible = "renesas,vsp2";
> > +                       reg = <0 0xfe960000 0 0x8000>;
> > +                       interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
> 
> 266, according to the Dec errata?


-- 
Regards,

Laurent Pinchart

Re: [PATCH/RFC 1/9] clk: shmobile: r8a7795: Add FCP clocks

[Laurent Pinchart]

Hi Morimoto-san,

On Friday 12 February 2016 04:00:42 Laurent Pinchart wrote:
> The parent clock isn't documented in the datasheet, use S2D1 as a best
> guess for now.

Would you be able to find out what the parent clock is for the FCP and LVDS 
(patch 2/9) clocks ?

Feel free to tell the documentation team that your life would be easier if the 
information was included in the datasheets ;-)

> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> ---
>  drivers/clk/shmobile/r8a7795-cpg-mssr.c | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/drivers/clk/shmobile/r8a7795-cpg-mssr.c
> b/drivers/clk/shmobile/r8a7795-cpg-mssr.c index 13e994772dfd..ae5004ee7bdd
> 100644
> --- a/drivers/clk/shmobile/r8a7795-cpg-mssr.c
> +++ b/drivers/clk/shmobile/r8a7795-cpg-mssr.c
> @@ -130,6 +130,21 @@ static const struct mssr_mod_clk r8a7795_mod_clks[]
> __initconst = { DEF_MOD("hscif2",		 518,	R8A7795_CLK_S3D1),
>  	DEF_MOD("hscif1",		 519,	R8A7795_CLK_S3D1),
>  	DEF_MOD("hscif0",		 520,	R8A7795_CLK_S3D1),
> +	DEF_MOD("fcpvd3",		 600,	R8A7795_CLK_S2D1),
> +	DEF_MOD("fcpvd2",		 601,	R8A7795_CLK_S2D1),
> +	DEF_MOD("fcpvd1",		 602,	R8A7795_CLK_S2D1),
> +	DEF_MOD("fcpvd0",		 603,	R8A7795_CLK_S2D1),
> +	DEF_MOD("fcpvb1",		 606,	R8A7795_CLK_S2D1),
> +	DEF_MOD("fcpvb0",		 607,	R8A7795_CLK_S2D1),
> +	DEF_MOD("fcpvi2",		 609,	R8A7795_CLK_S2D1),
> +	DEF_MOD("fcpvi1",		 610,	R8A7795_CLK_S2D1),
> +	DEF_MOD("fcpvi0",		 611,	R8A7795_CLK_S2D1),
> +	DEF_MOD("fcpf2",		 613,	R8A7795_CLK_S2D1),
> +	DEF_MOD("fcpf1",		 614,	R8A7795_CLK_S2D1),
> +	DEF_MOD("fcpf0",		 615,	R8A7795_CLK_S2D1),
> +	DEF_MOD("fcpci1",		 616,	R8A7795_CLK_S2D1),
> +	DEF_MOD("fcpci0",		 617,	R8A7795_CLK_S2D1),
> +	DEF_MOD("fcpcs",		 619,	R8A7795_CLK_S2D1),
>  	DEF_MOD("vspd3",		 620,	R8A7795_CLK_S2D1),
>  	DEF_MOD("vspd2",		 621,	R8A7795_CLK_S2D1),
>  	DEF_MOD("vspd1",		 622,	R8A7795_CLK_S2D1),

-- 
Regards,

Laurent Pinchart

Re: [PATCH/RFC 3/9] v4l: Add Renesas R-Car FCP driver

[Geert Uytterhoeven]

Hi Laurent,

On Mon, Feb 15, 2016 at 1:35 PM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
>> > --- /dev/null
>> > +++ b/Documentation/devicetree/bindings/media/renesas,fcp.txt
>> > @@ -0,0 +1,24 @@
>> > +Renesas R-Car Frame Compression Processor (FCP)
>> > +-----------------------------------------------
>> > +
>> > +The FCP is a companion module of video processing modules in the Renesas
>> > R-Car
>> > +Gen3 SoCs. It provides data compression and decompression, data caching,
>> > and
>> > +converting of AXI transaction in order to reduce the memory bandwidth.
>>
>> "conversion"?
>>
>> > +
>> > +There are three types of FCP whose configuration and behaviour highly
>> > depend +on the module they are paired with.
>> > +
>> > + - compatible: Must be one of the following
>> > +   - "renesas,fcpv" for the 'FCP for VSP' device
>>
>> Any chance this module can turn up in another SoC later? I guess yes.
>
> It's not just that it can, it will.
>
>> What about future-proofing using "renesas,r8a7795-fcpv" and "renesas,rcar-
>> gen3-fcpv"?
>
> Given that the device currently has registers and clock only, I wanted to keep
> the DT bindings simple. My plan is to introduce new compat strings later as
> needed, if needed, when incompatible FCP instances will be introduced. Feel
> free to challenge that :-)

I'm afraid that will be too late.
How are you gonna distinguish the new and incompatible variants from the
r8a7795 variant? Ah, by using "renesas,PartOfTheMonth-fcpv"?
So why not use "renesas,r8a7795-fcpv" now?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC 1/9] clk: shmobile: r8a7795: Add FCP clocks

[Kuninori Morimoto]

Hi Laurent

> > The parent clock isn't documented in the datasheet, use S2D1 as a best
> > guess for now.
> 
> Would you be able to find out what the parent clock is for the FCP and LVDS 
> (patch 2/9) clocks ?

Thanks !
I asked it to HW team

> Feel free to tell the documentation team that your life would be easier if the 
> information was included in the datasheets ;-)

Hehe :)
OK, will try

Best regards
---
Kuninori Morimoto

Re: [PATCH/RFC 1/9] clk: shmobile: r8a7795: Add FCP clocks

[Kuninori Morimoto]

Hi Laurent

> > > The parent clock isn't documented in the datasheet, use S2D1 as a best
> > > guess for now.
> > 
> > Would you be able to find out what the parent clock is for the FCP and LVDS 
> > (patch 2/9) clocks ?

It seems FCP clock is based on each SoC
In H3 ES1 case, it is using
 - s2d2 (for 200MHz)
 - s2d1 (for 400MHz)

Re: [PATCH/RFC 1/9] clk: shmobile: r8a7795: Add FCP clocks

[Laurent Pinchart]

Hi Morimoto-san,

On Thursday 03 March 2016 00:17:54 Kuninori Morimoto wrote:
> Hi Laurent
> 
> >>> The parent clock isn't documented in the datasheet, use S2D1 as a best
> >>> guess for now.
> >> 
> >> Would you be able to find out what the parent clock is for the FCP and
> >> LVDS (patch 2/9) clocks ?
> 
> It seems FCP clock is based on each SoC
> In H3 ES1 case, it is using
>  - s2d2 (for 200MHz)
>  - s2d1 (for 400MHz)

Thank you for the information. Do you mean that different FCP instances use 
different clocks ? If so, could you tell us which clock is used by each 
instance in th H3 ES1 ?

-- 
Regards,

Laurent Pinchart

Re: [PATCH/RFC 1/9] clk: shmobile: r8a7795: Add FCP clocks

[Kuninori Morimoto]

Hi Laurent

> > It seems FCP clock is based on each SoC
> > In H3 ES1 case, it is using
> >  - s2d2 (for 200MHz)
> >  - s2d1 (for 400MHz)
> 
> Thank you for the information. Do you mean that different FCP instances use 
> different clocks ? If so, could you tell us which clock is used by each 
> instance in th H3 ES1 ?

Sorry for my confusable mail.
All FCP on H3 ES1 is using above,
but, M3 or E3 will use different clock.

Is this more clear ?

Re: [PATCH/RFC 1/9] clk: shmobile: r8a7795: Add FCP clocks

[Laurent Pinchart]

Hi Morimoto-sa,

On Thursday 03 March 2016 07:19:20 Kuninori Morimoto wrote:
> Hi Laurent
> 
> >> It seems FCP clock is based on each SoC
> >> In H3 ES1 case, it is using
> >> 
> >>  - s2d2 (for 200MHz)
> >>  - s2d1 (for 400MHz)
> > 
> > Thank you for the information. Do you mean that different FCP instances
> > use different clocks ? If so, could you tell us which clock is used by
> > each instance in th H3 ES1 ?
> 
> Sorry for my confusable mail.
> All FCP on H3 ES1 is using above,
> but, M3 or E3 will use different clock.
> 
> Is this more clear ?

Does it mean that every FCP instance uses both the S2D2 and the S2D1 clocks as 
functional clocks on H3 ES1 ?

-- 
Regards,

Laurent Pinchart

Re: [PATCH/RFC 1/9] clk: shmobile: r8a7795: Add FCP clocks

[Kuninori Morimoto]

Hi Laurent

> > >>  - s2d2 (for 200MHz)
> > >>  - s2d1 (for 400MHz)
> > > 
> > > Thank you for the information. Do you mean that different FCP instances
> > > use different clocks ? If so, could you tell us which clock is used by
> > > each instance in th H3 ES1 ?
> > 
> > Sorry for my confusable mail.
> > All FCP on H3 ES1 is using above,
> > but, M3 or E3 will use different clock.
> > 
> > Is this more clear ?
> 
> Does it mean that every FCP instance uses both the S2D2 and the S2D1 clocks as 
> functional clocks on H3 ES1 ?

 - s2d2 (200MHz) is for APB-IF,
 - s2d1 (400MHz) is for AXI-IF, and internal

Is this clear answer ?

Re: [PATCH/RFC 1/9] clk: shmobile: r8a7795: Add FCP clocks

[Laurent Pinchart]

Hi Morimoto-san,

On Thursday 03 March 2016 08:37:02 Kuninori Morimoto wrote:
> Hi Laurent
> 
> >>>>  - s2d2 (for 200MHz)
> >>>>  - s2d1 (for 400MHz)
> >>>
> >>> Thank you for the information. Do you mean that different FCP instances
> >>> use different clocks ? If so, could you tell us which clock is used by
> >>> each instance in th H3 ES1 ?
> >> 
> >> Sorry for my confusable mail.
> >> All FCP on H3 ES1 is using above,
> >> but, M3 or E3 will use different clock.
> >> 
> >> Is this more clear ?
> > 
> > Does it mean that every FCP instance uses both the S2D2 and the S2D1
> > clocks as functional clocks on H3 ES1 ?
> 
>  - s2d2 (200MHz) is for APB-IF,
>  - s2d1 (400MHz) is for AXI-IF, and internal
> 
> Is this clear answer ?

It is, thank you very much for putting up with my slow mind ;-)

Geert, deciding what clock to use as a parent for the MSTP clock becomes 
interesting, As S2D2 clocks the control interface I propose picking it. This 
shows the limits of the MSTP clock model though, MSTP is really a module stop 
bit, not a clock.

-- 
Regards,

Laurent Pinchart

Re: [PATCH/RFC 1/9] clk: shmobile: r8a7795: Add FCP clocks

[Geert Uytterhoeven]

Hi Laurent,

On Thu, Mar 3, 2016 at 11:49 AM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> On Thursday 03 March 2016 08:37:02 Kuninori Morimoto wrote:
>> >>>>  - s2d2 (for 200MHz)
>> >>>>  - s2d1 (for 400MHz)
>> >>>
>> >>> Thank you for the information. Do you mean that different FCP instances
>> >>> use different clocks ? If so, could you tell us which clock is used by
>> >>> each instance in th H3 ES1 ?
>> >>
>> >> Sorry for my confusable mail.
>> >> All FCP on H3 ES1 is using above,
>> >> but, M3 or E3 will use different clock.
>> >>
>> >> Is this more clear ?
>> >
>> > Does it mean that every FCP instance uses both the S2D2 and the S2D1
>> > clocks as functional clocks on H3 ES1 ?
>>
>>  - s2d2 (200MHz) is for APB-IF,
>>  - s2d1 (400MHz) is for AXI-IF, and internal
>>
>> Is this clear answer ?
>
> It is, thank you very much for putting up with my slow mind ;-)
>
> Geert, deciding what clock to use as a parent for the MSTP clock becomes
> interesting, As S2D2 clocks the control interface I propose picking it. This
> shows the limits of the MSTP clock model though, MSTP is really a module stop
> bit, not a clock.

Quoting R-Car Gen3 rev. 0.5E:
"Under software control, the CPG is capable of turning the supply of
clock signals
 to individual modules on or off and of resetting individual modules."

So it is a clock signal, or better (or worse): clock signals (plural).

Hence MSTP gates one or more clocks. Sigh...

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC 1/9] clk: shmobile: r8a7795: Add FCP clocks

[Laurent Pinchart]

Hi Geert,

On Thursday 03 March 2016 12:56:29 Geert Uytterhoeven wrote:
> On Thu, Mar 3, 2016 at 11:49 AM, Laurent Pinchart wrote:
> > On Thursday 03 March 2016 08:37:02 Kuninori Morimoto wrote:
> >>>>>>  - s2d2 (for 200MHz)
> >>>>>>  - s2d1 (for 400MHz)
> >>>>> 
> >>>>> Thank you for the information. Do you mean that different FCP 
> >>>>> instances use different clocks ? If so, could you tell us which clock
> >>>>> is used by each instance in th H3 ES1 ?
> >>>> 
> >>>> Sorry for my confusable mail.
> >>>> All FCP on H3 ES1 is using above,
> >>>> but, M3 or E3 will use different clock.
> >>>> 
> >>>> Is this more clear ?
> >>> 
> >>> Does it mean that every FCP instance uses both the S2D2 and the S2D1
> >>> clocks as functional clocks on H3 ES1 ?
> >>  
> >>  - s2d2 (200MHz) is for APB-IF,
> >>  - s2d1 (400MHz) is for AXI-IF, and internal
> >> 
> >> Is this clear answer ?
> > 
> > It is, thank you very much for putting up with my slow mind ;-)
> > 
> > Geert, deciding what clock to use as a parent for the MSTP clock becomes
> > interesting, As S2D2 clocks the control interface I propose picking it.
> > This shows the limits of the MSTP clock model though, MSTP is really a
> > module stop bit, not a clock.
> 
> Quoting R-Car Gen3 rev. 0.5E:
> "Under software control, the CPG is capable of turning the supply of clock
> signals to individual modules on or off and of resetting individual
> modules."
> 
> So it is a clock signal, or better (or worse): clock signals (plural).

I certainly believe that the module clock(s) is (are) gated when the module is 
stopped through its MSTP bit. My point was that MSTP in itself is not a clock, 
it's a module stop feature that uses clock and possibly other means to stop 
modules and lower power consumption.

> Hence MSTP gates one or more clocks. Sigh...

The question is whether we really need to model that, and the answer can be 
given in a case-by-case basis. In this case, given that S2D1 and S2D2 are both 
children of the S2 clock and are not individually gate-able (the S2 clock 
itself isn't either as far as I can tell) then it doesn't matter too much from 
a functional point of view. The FCP MSTP clock doesn't have to be modeled in 
the CPG driver as having multiple parents.

-- 
Regards,

Laurent Pinchart

Re: [PATCH/RFC 1/9] clk: shmobile: r8a7795: Add FCP clocks

[Kuninori Morimoto]

Hi Laurent

> > > The parent clock isn't documented in the datasheet, use S2D1 as a best
> > > guess for now.
> > 
> > Would you be able to find out what the parent clock is for the FCP and LVDS 
> > (patch 2/9) clocks ?
> 
> Thanks !
> I asked it to HW team

It is too late information for you

LVDS (APB) is using S0D4 (200MHz)