From: Chen-Yu Tsai <wens@csie.org>
To: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Cc: Linux Media Mailing List <linux-media@vger.kernel.org>,
devicetree <devicetree@vger.kernel.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
devel@driverdev.osuosl.org,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Maxime Ripard <maxime.ripard@bootlin.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
linux-sunxi <linux-sunxi@googlegroups.com>,
Hans Verkuil <hverkuil@xs4all.nl>,
Sakari Ailus <sakari.ailus@linux.intel.com>
Subject: Re: [PATCH v2 07/15] arm64: dts: allwinner: h5: Add system-control node with SRAM C1
Date: Wed, 5 Dec 2018 17:49:57 +0800 [thread overview]
Message-ID: <CAGb2v67tgp_tD_Pkx1Qkc=d__saZUMwwmE44uCCeLgVM2HWmUQ@mail.gmail.com> (raw)
In-Reply-To: <edf44a24633ecaf59a7d5bea1f4acffdd0ae01a3.camel@bootlin.com>
On Wed, Dec 5, 2018 at 5:48 PM Paul Kocialkowski
<paul.kocialkowski@bootlin.com> wrote:
>
> Hi,
>
> On Wed, 2018-12-05 at 17:45 +0800, Chen-Yu Tsai wrote:
> > On Wed, Dec 5, 2018 at 5:25 PM Paul Kocialkowski
> > <paul.kocialkowski@bootlin.com> wrote:
> > > Add the H5-specific system control node description to its device-tree
> > > with support for the SRAM C1 section, that will be used by the video
> > > codec node later on.
> > >
> > > The CPU-side SRAM address was obtained empirically while the size was
> > > taken from the documentation. They may not be entirely accurate.
> > >
> > > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
> > > ---
> > > arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 22 ++++++++++++++++++++
> > > 1 file changed, 22 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
> > > index b41dc1aab67d..42bfb560b367 100644
> > > --- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
> > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
> > > @@ -94,6 +94,28 @@
> > > };
> > >
> > > soc {
> > > + system-control@1c00000 {
> > > + compatible = "allwinner,sun50i-h5-system-control";
> > > + reg = <0x01c00000 0x1000>;
> > > + #address-cells = <1>;
> > > + #size-cells = <1>;
> > > + ranges;
> > > +
> > > + sram_c1: sram@1d00000 {
> > > + compatible = "mmio-sram";
> > > + reg = <0x00018000 0x1c000>;
> >
> > 0x1d00000 or 0x18000?
>
> For the H5, I found the VE SRAM area to be mapped to 0x18000 on the CPU
> side (when testing with devmem), unlike the A64, H3 and others. I was
> rather surprised about this as well!
I'm actually referring to the node name that still says 1d00000.
ChenYu
>
> > > + #address-cells = <1>;
> > > + #size-cells = <1>;
> > > + ranges = <0 0x00018000 0x1c000>;
> >
> > Same here.
> >
> > > +
> > > + ve_sram: sram-section@0 {
> > > + compatible = "allwinner,sun50i-h5-sram-c1",
> > > + "allwinner,sun4i-a10-sram-c1";
> > > + reg = <0x000000 0x1c000>;
> > > + };
> > > + };
> > > + };
> > > +
> > > mali: gpu@1e80000 {
> > > compatible = "allwinner,sun50i-h5-mali", "arm,mali-450";
> > > reg = <0x01e80000 0x30000>;
> > > --
> > > 2.19.2
>
> Cheers,
>
> Paul
>
> --
> Paul Kocialkowski, Bootlin (formerly Free Electrons)
> Embedded Linux and kernel engineering
> https://bootlin.com
>
next prev parent reply other threads:[~2018-12-05 10:00 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-05 9:24 [PATCH v2 00/15] Cedrus H5 and A64 support with A33 and H3 updates Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 01/15] ARM: dts: sun8i: h3: Fix the system-control register range Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 02/15] ARM: dts: sun8i: a33: Remove unnecessary reserved memory node Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 03/15] ARM: dts: sun8i: h3: " Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 04/15] soc: sunxi: sram: Enable EMAC clock access for H3 variant Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 05/15] dt-bindings: sram: sunxi: Add bindings for the H5 with SRAM C1 Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 06/15] soc: sunxi: sram: Add support for the H5 SoC system control Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 07/15] arm64: dts: allwinner: h5: Add system-control node with SRAM C1 Paul Kocialkowski
2018-12-05 9:45 ` Chen-Yu Tsai
2018-12-05 9:48 ` Paul Kocialkowski
2018-12-05 9:49 ` Chen-Yu Tsai [this message]
2018-12-05 9:53 ` Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 08/15] ARM/arm64: sunxi: Move H3/H5 syscon label over to soc-specific nodes Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 09/15] dt-bindings: sram: sunxi: Add compatible for the A64 SRAM C1 Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 10/15] arm64: dts: allwinner: a64: Add support for the SRAM C1 section Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 11/15] dt-bindings: media: cedrus: Add compatibles for the A64 and H5 Paul Kocialkowski
2018-12-05 11:00 ` Maxime Ripard
2018-12-05 9:24 ` [PATCH v2 12/15] media: cedrus: Add device-tree compatible and variant for H5 support Paul Kocialkowski
2018-12-05 11:00 ` Maxime Ripard
2018-12-05 9:24 ` [PATCH v2 13/15] media: cedrus: Add device-tree compatible and variant for A64 support Paul Kocialkowski
2018-12-05 11:01 ` Maxime Ripard
2018-12-05 9:24 ` [PATCH v2 14/15] arm64: dts: allwinner: h5: Add Video Engine node Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 15/15] arm64: dts: allwinner: a64: " Paul Kocialkowski
2018-12-07 21:22 ` [linux-sunxi] " Jernej Škrabec
2018-12-10 9:00 ` Paul Kocialkowski
2018-12-05 9:48 ` [PATCH v2 00/15] Cedrus H5 and A64 support with A33 and H3 updates Chen-Yu Tsai
2018-12-05 11:07 ` Maxime Ripard
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