Re: [PATCH net-next v3 4/8] MIPS: dts: mscc: describe the PTP ready interrupt

From: Antoine Tenart <antoine.tenart@bootlin.com>
To: davem@davemloft.net, richardcochran@gmail.com,
	alexandre.belloni@bootlin.com, UNGLinuxDriver@microchip.com,
	ralf@linux-mips.org, paul.burton@mips.com, jhogan@kernel.org
Cc: Antoine Tenart <antoine.tenart@bootlin.com>,
	netdev@vger.kernel.org, linux-mips@vger.kernel.org,
	thomas.petazzoni@bootlin.com, allan.nielsen@microchip.com
Subject: Re: [PATCH net-next v3 4/8] MIPS: dts: mscc: describe the PTP ready interrupt
Date: Thu, 22 Aug 2019 09:56:40 +0200	[thread overview]
Message-ID: <20190822075640.GB3006@kwain> (raw)
In-Reply-To: <20190724081715.29159-5-antoine.tenart@bootlin.com>

Hello,

On Wed, Jul 24, 2019 at 10:17:11AM +0200, Antoine Tenart wrote:
> This patch adds a description of the PTP ready interrupt, which can be
> triggered when a PTP timestamp is available on an hardware FIFO.
> 
> Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
> Acked-by: Paul Burton <paul.burton@mips.com>

The net patches of this series were applied into the net-next tree.
However the two dts patches were not and should go through the MIPS
tree. Gentle ping about this :)

Thanks,
Antoine

> ---
>  arch/mips/boot/dts/mscc/ocelot.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi b/arch/mips/boot/dts/mscc/ocelot.dtsi
> index 1e55a778def5..797d336db54d 100644
> --- a/arch/mips/boot/dts/mscc/ocelot.dtsi
> +++ b/arch/mips/boot/dts/mscc/ocelot.dtsi
> @@ -139,8 +139,8 @@
>  				    "port2", "port3", "port4", "port5", "port6",
>  				    "port7", "port8", "port9", "port10", "qsys",
>  				    "ana", "s2";
> -			interrupts = <21 22>;
> -			interrupt-names = "xtr", "inj";
> +			interrupts = <18 21 22>;
> +			interrupt-names = "ptp_rdy", "xtr", "inj";
>  
>  			ethernet-ports {
>  				#address-cells = <1>;
> -- 
> 2.21.0
> 

-- 
Antoine Ténart, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com