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From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: linux-mips@vger.kernel.org
Cc: tsbogend@alpha.franken.de, philmd@linaro.org,
	Jiaxun Yang <jiaxun.yang@flygoat.com>
Subject: [PATCH 02/12] MIPS: smp-cps: Disable coherence setup for unsupported ISA
Date: Sat,  4 Mar 2023 22:15:14 +0000	[thread overview]
Message-ID: <20230304221524.47160-3-jiaxun.yang@flygoat.com> (raw)
In-Reply-To: <20230304221524.47160-1-jiaxun.yang@flygoat.com>

We don't know how to do coherence setup on ISA before MIPS
Release 1.

As CPS support only servers simulation purpose on those cores,
and simulators are always coherent, just disable initialization
code and provide user a warning in case coherence is not setup
properly.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 arch/mips/kernel/cps-vec.S | 5 +++++
 arch/mips/kernel/smp-cps.c | 5 +++++
 2 files changed, 10 insertions(+)

diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S
index 8ef492da827f..64ecfdac6580 100644
--- a/arch/mips/kernel/cps-vec.S
+++ b/arch/mips/kernel/cps-vec.S
@@ -116,6 +116,8 @@ not_nmi:
 	li	t0, ST0_CU1 | ST0_CU0 | ST0_BEV | STATUS_BITDEPS
 	mtc0	t0, CP0_STATUS
 
+	/* We don't know how to do coherence setup on earlier ISA */
+#if MIPS_ISA_REV > 0
 	/* Skip cache & coherence setup if we're already coherent */
 	lw	s7, GCR_CL_COHERENCE_OFS(s1)
 	bnez	s7, 1f
@@ -129,6 +131,7 @@ not_nmi:
 	li	t0, 0xff
 	sw	t0, GCR_CL_COHERENCE_OFS(s1)
 	ehb
+#endif /* MIPS_ISA_REV > 0 */
 
 	/* Set Kseg0 CCA to that in s0 */
 1:	mfc0	t0, CP0_CONFIG
@@ -515,6 +518,7 @@ LEAF(mips_cps_boot_vpes)
 	 nop
 	END(mips_cps_boot_vpes)
 
+#if MIPS_ISA_REV > 0
 LEAF(mips_cps_cache_init)
 	/*
 	 * Clear the bits used to index the caches. Note that the architecture
@@ -588,6 +592,7 @@ dcache_done:
 	jr	ra
 	 nop
 	END(mips_cps_cache_init)
+#endif /* MIPS_ISA_REV > 0 */
 
 #if defined(CONFIG_MIPS_CPS_PM) && defined(CONFIG_CPU_PM)
 
diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c
index 4fc288bb85b9..f968a319d87f 100644
--- a/arch/mips/kernel/smp-cps.c
+++ b/arch/mips/kernel/smp-cps.c
@@ -361,6 +361,8 @@ static int cps_boot_secondary(int cpu, struct task_struct *idle)
 
 static void cps_init_secondary(void)
 {
+	int core = cpu_core(&current_cpu_data);
+
 	/* Disable MT - we only want to run 1 TC per VPE */
 	if (cpu_has_mipsmt)
 		dmt();
@@ -376,6 +378,9 @@ static void cps_init_secondary(void)
 		BUG_ON(ident != mips_cm_vp_id(smp_processor_id()));
 	}
 
+	if (core > 0 && !read_gcr_cl_coherence())
+		pr_warn("Core %u is not in coherent domain\n", core);
+
 	if (cpu_has_veic)
 		clear_c0_status(ST0_IM);
 	else
-- 
2.34.1


  parent reply	other threads:[~2023-03-04 22:15 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-04 22:15 [PATCH 00/12] MIPS Virt board support Jiaxun Yang
2023-03-04 22:15 ` [PATCH 01/12] MIPS: Move declaration of bcache ops to cache.c Jiaxun Yang
2023-03-04 22:15 ` Jiaxun Yang [this message]
2023-03-04 22:15 ` [PATCH 03/12] MIPS: mips-cm: Check availability of config registers Jiaxun Yang
2023-03-04 22:15 ` [PATCH 04/12] MIPS: Octeon: Opt-out 4k_cache feature Jiaxun Yang
2023-03-06 14:28   ` Alexander Lobakin
2023-03-06 19:55     ` Jiaxun Yang
2023-03-07 16:51       ` Alexander Lobakin
2023-03-04 22:15 ` [PATCH 05/12] MIPS: cpu-features: Enable octeon_cache by cpu_type Jiaxun Yang
2023-03-04 22:15 ` [PATCH 06/12] MIPS: c-octeon: Provide alternative SMP cache flush function Jiaxun Yang
2023-03-05  8:41   ` Sergei Shtylyov
2023-03-04 22:15 ` [PATCH 07/12] MIPS: Octeon: Allow CVMSEG to be disabled Jiaxun Yang
2023-03-04 22:15 ` [PATCH 08/12] MIPS: Loongson: Move arch cflags to MIPS top level Makefile Jiaxun Yang
2023-03-04 22:15 ` [PATCH 09/12] MIPS: Loongson: Don't select platform features with CPU Jiaxun Yang
2023-03-04 22:15 ` [PATCH 10/12] MIPS: Octeon: Disable CVMSEG by default on other platforms Jiaxun Yang
2023-03-04 22:15 ` [PATCH 11/12] MIPS: Add board config for virt board Jiaxun Yang
2023-03-04 22:15 ` [PATCH 12/12] MIPS: generic: Enable all CPUs supported by virt board in Kconfig Jiaxun Yang

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