From: haibo.chen@nxp.com
To: ashish.kumar@nxp.com, yogeshgaur.83@gmail.com,
broonie@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, han.xu@nxp.com,
singh.kuldeep87k@gmail.com, tudor.ambarus@microchip.com,
p.yadav@ti.com, michael@walle.cc, miquel.raynal@bootlin.com,
richard@nod.at, vigneshr@ti.com, shawnguo@kernel.org,
s.hauer@pengutronix.de, kernel@pengutronix.de
Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-mtd@lists.infradead.org,
festevam@gmail.com, linux-imx@nxp.com,
linux-arm-kernel@lists.infradead.org, haibo.chen@nxp.com,
zhengxunli@mxic.com.tw
Subject: [PATCH 03/11] spi: spi-nxp-fspi: add DTR mode support
Date: Tue, 5 Jul 2022 17:11:35 +0800 [thread overview]
Message-ID: <1657012303-6464-3-git-send-email-haibo.chen@nxp.com> (raw)
In-Reply-To: <1657012303-6464-1-git-send-email-haibo.chen@nxp.com>
From: Haibo Chen <haibo.chen@nxp.com>
For LUT, add DTR command support.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
---
drivers/spi/spi-nxp-fspi.c | 27 ++++++++++++++++++++++-----
1 file changed, 22 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
index 10e71e55d21a..c32a4f53fa2a 100644
--- a/drivers/spi/spi-nxp-fspi.c
+++ b/drivers/spi/spi-nxp-fspi.c
@@ -537,12 +537,22 @@ static void nxp_fspi_prepare_lut(struct nxp_fspi *f,
int lutidx = 1, i;
/* cmd */
- lutval[0] |= LUT_DEF(0, LUT_CMD, LUT_PAD(op->cmd.buswidth),
- op->cmd.opcode);
+ if (op->cmd.dtr) {
+ lutval[0] |= LUT_DEF(0, LUT_CMD_DDR, LUT_PAD(op->cmd.buswidth),
+ op->cmd.opcode >> 8);
+ lutval[lutidx / 2] |= LUT_DEF(lutidx, LUT_CMD_DDR,
+ LUT_PAD(op->cmd.buswidth),
+ op->cmd.opcode & 0x00ff);
+ lutidx++;
+ } else {
+ lutval[0] |= LUT_DEF(0, LUT_CMD, LUT_PAD(op->cmd.buswidth),
+ op->cmd.opcode);
+ }
/* addr bytes */
if (op->addr.nbytes) {
- lutval[lutidx / 2] |= LUT_DEF(lutidx, LUT_ADDR,
+ lutval[lutidx / 2] |= LUT_DEF(lutidx, op->addr.dtr ?
+ LUT_ADDR_DDR : LUT_ADDR,
LUT_PAD(op->addr.buswidth),
op->addr.nbytes * 8);
lutidx++;
@@ -550,7 +560,8 @@ static void nxp_fspi_prepare_lut(struct nxp_fspi *f,
/* dummy bytes, if needed */
if (op->dummy.nbytes) {
- lutval[lutidx / 2] |= LUT_DEF(lutidx, LUT_DUMMY,
+ lutval[lutidx / 2] |= LUT_DEF(lutidx, op->dummy.dtr ?
+ LUT_DUMMY_DDR : LUT_DUMMY,
/*
* Due to FlexSPI controller limitation number of PAD for dummy
* buswidth needs to be programmed as equal to data buswidth.
@@ -565,7 +576,8 @@ static void nxp_fspi_prepare_lut(struct nxp_fspi *f,
if (op->data.nbytes) {
lutval[lutidx / 2] |= LUT_DEF(lutidx,
op->data.dir == SPI_MEM_DATA_IN ?
- LUT_NXP_READ : LUT_NXP_WRITE,
+ (op->data.dtr ? LUT_READ_DDR : LUT_NXP_READ) :
+ (op->data.dtr ? LUT_WRITE_DDR : LUT_NXP_WRITE),
LUT_PAD(op->data.buswidth),
0);
lutidx++;
@@ -1090,6 +1102,10 @@ static const struct spi_controller_mem_ops nxp_fspi_mem_ops = {
.get_name = nxp_fspi_get_name,
};
+static struct spi_controller_mem_caps nxp_fspi_mem_caps = {
+ .dtr = true,
+};
+
static int nxp_fspi_probe(struct platform_device *pdev)
{
struct spi_controller *ctlr;
@@ -1194,6 +1210,7 @@ static int nxp_fspi_probe(struct platform_device *pdev)
ctlr->bus_num = -1;
ctlr->num_chipselect = NXP_FSPI_MAX_CHIPSELECT;
ctlr->mem_ops = &nxp_fspi_mem_ops;
+ ctlr->mem_caps = &nxp_fspi_mem_caps;
nxp_fspi_default_setup(f);
--
2.25.1
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http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2022-07-05 9:29 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-05 9:11 [PATCH 01/11] spi: spi-nxp-fspi: enable runtime pm for fspi haibo.chen
2022-07-05 9:11 ` [PATCH 02/11] spi: spi-nxp-fspi: change the default lut index haibo.chen
2022-07-05 9:11 ` haibo.chen [this message]
2022-07-05 9:11 ` [PATCH 04/11] spi: spi-nxp-fspi: add function to select sample clock source for flash reading haibo.chen
2022-07-06 21:02 ` Michael Walle
2022-07-05 9:11 ` [PATCH 05/11] spi: spi-nxp-fspi: Add quirk to disable DTR support haibo.chen
2022-07-05 13:50 ` Michael Walle
2022-07-05 9:11 ` [PATCH 06/11] spi: spi-nxp-fspi: enable octal ddr for iMX8QM/QXP/DXL haibo.chen
2022-07-05 9:11 ` [PATCH 07/11] dt-bindings: spi: spi-nxp-fspi: add a new property nxp,fspi-dll-slvdly haibo.chen
2022-07-05 9:48 ` Krzysztof Kozlowski
2022-07-05 10:28 ` Bough Chen
2022-07-05 10:36 ` Krzysztof Kozlowski
2022-07-05 13:19 ` Han Xu
2022-07-05 13:29 ` Krzysztof Kozlowski
2022-07-05 14:00 ` Han Xu
2022-07-05 14:03 ` Krzysztof Kozlowski
2022-07-05 14:31 ` Han Xu
2022-07-05 14:06 ` Michael Walle
2022-07-05 14:12 ` Krzysztof Kozlowski
2022-07-05 14:52 ` Han Xu
2022-07-05 14:58 ` Michael Walle
2022-07-05 15:07 ` Mark Brown
2022-07-05 15:38 ` Krzysztof Kozlowski
2022-07-05 15:50 ` Han Xu
2022-07-06 16:11 ` Rob Herring
2022-07-06 20:59 ` Michael Walle
2022-07-05 9:11 ` [PATCH 08/11] mtd: spi-nor: macronix: add support for Macronix octaflash haibo.chen
2022-07-05 9:11 ` [PATCH 09/11] mtd: spi-nor: macronix: add mx25uw51345g OPI mode support haibo.chen
2022-07-18 6:57 ` Michael Walle
2022-07-05 9:11 ` [PATCH 10/11] arm64: dts: imx8ulp: add flexspi support haibo.chen
2022-07-05 9:11 ` [PATCH 11/11] arm64: dts: imx8qm/imx8qxp: " haibo.chen
2022-07-05 14:01 ` [PATCH 01/11] spi: spi-nxp-fspi: enable runtime pm for fspi Michael Walle
2022-07-05 23:06 ` Han Xu
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