From: Boris Brezillon <boris.brezillon@collabora.com>
To: Rickard Andersson <rickaran@axis.com>
Cc: linux-mtd@lists.infradead.org, miquel.raynal@bootlin.com
Subject: Re: [PATCH v2 2/2] mtd: rawnand: Add timings for Kioxia TH58NVG2S3HBAI4
Date: Wed, 20 May 2020 23:15:08 +0200 [thread overview]
Message-ID: <20200520231508.7216afe8@collabora.com> (raw)
In-Reply-To: <20200520133854.25241-2-rickaran@axis.com>
On Wed, 20 May 2020 15:38:54 +0200
Rickard Andersson <rickaran@axis.com> wrote:
> From: Rickard x Andersson <rickaran@axis.com>
>
> The Kioxia/Toshiba TH58NVG2S3HBAI4 NAND memory is not a
> ONFI compliant memory. The timings of the memory is quite
> close to ONFI mode 4 but is breaking that spec.
>
> Erase block read speed is increased from 6910 KiB/s to
> 13490 KiB/s. Erase block write speed is increased from
> 3350 KiB/s to 4410 KiB/s.
>
> Tested on IMX6SX which has a NAND controller supporting
> EDO mode.
>
> Signed-off-by: Rickard x Andersson <rickaran@axis.com>
> ---
> drivers/mtd/nand/raw/nand_ids.c | 3 ++
> drivers/mtd/nand/raw/nand_toshiba.c | 66 +++++++++++++++++++++++++++++++++++++
> 2 files changed, 69 insertions(+)
>
> diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c
> index e0dbc2e316c7..8b676e8b481b 100644
> --- a/drivers/mtd/nand/raw/nand_ids.c
> +++ b/drivers/mtd/nand/raw/nand_ids.c
> @@ -52,6 +52,9 @@ struct nand_flash_dev nand_flash_ids[] = {
> { .id = {0xad, 0xde, 0x94, 0xda, 0x74, 0xc4} },
> SZ_8K, SZ_8K, SZ_2M, NAND_NEED_SCRAMBLING, 6, 640,
> NAND_ECC_INFO(40, SZ_1K), 4 },
> + {"TH58NVG2S3HBAI4 4G 3.3V 8-bit",
> + { .id = {0x98, 0xdc, 0x91, 0x15, 0x76} },
> + SZ_2K, SZ_512, SZ_128K, 0, 5, 128, NAND_ECC_INFO(8, SZ_512) },
>
> LEGACY_ID_NAND("NAND 4MiB 5V 8-bit", 0x6B, 4, SZ_8K, SP_OPTIONS),
> LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 4, SZ_8K, SP_OPTIONS),
> diff --git a/drivers/mtd/nand/raw/nand_toshiba.c b/drivers/mtd/nand/raw/nand_toshiba.c
> index b6efaf5195bb..60ca895b1775 100644
> --- a/drivers/mtd/nand/raw/nand_toshiba.c
> +++ b/drivers/mtd/nand/raw/nand_toshiba.c
> @@ -26,6 +26,52 @@
> /* Max ECC Steps for BENAND */
> #define TOSHIBA_NAND_MAX_ECC_STEPS 8
>
> +static const struct nand_data_interface th58nvg2s3hbai4_timings = {
> + .type = NAND_SDR_IFACE,
> + .timings.mode = 0,
> + .timings.sdr = {
> + .tPROG_max = 700000000,
> + .tBERS_max = 5000000000,
> + .tCCS_min = 500000,
> + .tR_max = 200000000,
> + .tADL_min = 400000,
> + .tALH_min = 5000,
> + .tALS_min = 12000,
> + .tAR_min = 10000,
> + .tCEA_max = 25000,
> + .tCEH_min = 20000,
> + .tCH_min = 5000,
> + .tCHZ_max = 20000,
> + .tCLH_min = 5000,
> + .tCLR_min = 10000,
> + .tCLS_min = 12000,
> + .tCOH_min = 0,
> + .tCS_min = 20000,
> + .tDH_min = 5000,
> + .tDS_min = 12000,
> + .tFEAT_max = 1000000,
> + .tIR_min = 0,
> + .tITC_max = 1000000,
> + .tRC_min = 25000,
> + .tREA_max = 20000,
> + .tREH_min = 10000,
> + .tRHOH_min = 25000,
> + .tRHW_min = 30000,
> + .tRHZ_max = 60000,
> + .tRLOH_min = 5000,
> + .tRP_min = 12000,
> + .tRR_min = 20000,
> + .tRST_max = 500000000,
> + .tWB_max = 100000,
> + .tWC_min = 25000,
> + .tWH_min = 10000,
> + .tWHR_min = 60000,
> + .tWP_min = 12000,
> + .tWW_min = 100000,
> + }
> +};
If we don't want the RO section to grow considerably we should try to
come with a solution to express things in term of deviation from an
existing ONFI timing mode. I'd expect most parameters to match.
> +
> +
> static int toshiba_nand_benand_read_eccstatus_op(struct nand_chip *chip,
> u8 *buf)
> {
> @@ -194,6 +240,18 @@ static void toshiba_nand_decode_id(struct nand_chip *chip)
> }
> }
>
> +static int th58nvg2s3hbai4_choose_data_interface(struct nand_chip *chip)
> +{
> + int ret;
> +
> + chip->data_interface = th58nvg2s3hbai4_timings;
Something like:
/* Start from the closest timing mode. */
onfi_fill_data_interface(chip, SDR, modeX);
/* Patch only what you need to patch. */
chip->data_interface.timings.tXX = YY;
...
> +
> + /* Check if the controller can handle the timings */
> + ret = nand_test_data_interface(chip);
> +
> + return ret;
> +}
> +
> static int tc58teg5dclta00_init(struct nand_chip *chip)
> {
> struct mtd_info *mtd = nand_to_mtd(chip);
> @@ -205,6 +263,12 @@ static int tc58teg5dclta00_init(struct nand_chip *chip)
> return 0;
> }
>
> +static int th58nvg2s3hbai4_init(struct nand_chip *chip)
> +{
> + chip->ops.choose_data_interface = th58nvg2s3hbai4_choose_data_interface;
> + return 0;
> +}
> +
> static int toshiba_nand_init(struct nand_chip *chip)
> {
> if (nand_is_slc(chip))
> @@ -217,6 +281,8 @@ static int toshiba_nand_init(struct nand_chip *chip)
>
> if (!strcmp("TC58TEG5DCLTA00", chip->parameters.model))
> tc58teg5dclta00_init(chip);
> + if (!strncmp("TH58NVG2S3HBAI4", chip->parameters.model, 15))
> + th58nvg2s3hbai4_init(chip);
I think we should add a table with all the chips needing a specific
initialization.
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2020-05-20 21:15 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-20 13:38 [PATCH v2 1/2] mtd: rawnand: Add a helper for testing data interface Rickard Andersson
2020-05-20 13:38 ` [PATCH v2 2/2] mtd: rawnand: Add timings for Kioxia TH58NVG2S3HBAI4 Rickard Andersson
2020-05-20 21:15 ` Boris Brezillon [this message]
2020-05-20 13:55 ` [PATCH v2 1/2] mtd: rawnand: Add a helper for testing data interface Miquel Raynal
2020-05-20 14:52 ` SV: " Rickard X Andersson
2020-05-20 16:40 ` Boris Brezillon
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200520231508.7216afe8@collabora.com \
--to=boris.brezillon@collabora.com \
--cc=linux-mtd@lists.infradead.org \
--cc=miquel.raynal@bootlin.com \
--cc=rickaran@axis.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).