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From: Tudor Ambarus <tudor.ambarus@microchip.com>
To: <tkuw584924@gmail.com>, <p.yadav@ti.com>, <michael@walle.cc>
Cc: <miquel.raynal@bootlin.com>, <richard@nod.at>,
	<Bacem.Daassi@infineon.com>, <Takahiro.Kuwano@infineon.com>,
	<linux-mtd@lists.infradead.org>,
	Tudor Ambarus <tudor.ambarus@microchip.com>
Subject: [PATCH v14 7/8] mtd: spi-nor: spansion: Add local function to discover page size
Date: Tue, 3 May 2022 11:16:26 +0300	[thread overview]
Message-ID: <20220503081627.341870-8-tudor.ambarus@microchip.com> (raw)
In-Reply-To: <20220503081627.341870-1-tudor.ambarus@microchip.com>

From: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>

The page size check in s28hs512t fixup can be used for s25hs/hl-t as well.
Move that to a newly created local function. Please note that the hardcoded
value 3 for the number of address bytes was replaced by
nor->params->addr_nbytes.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
 drivers/mtd/spi-nor/spansion.c | 54 ++++++++++++++++++++--------------
 1 file changed, 32 insertions(+), 22 deletions(-)

diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
index 43cd6cd92537..e130f5398763 100644
--- a/drivers/mtd/spi-nor/spansion.c
+++ b/drivers/mtd/spi-nor/spansion.c
@@ -113,6 +113,37 @@ static int cypress_nor_octal_dtr_dis(struct spi_nor *nor)
 	return 0;
 }
 
+/**
+ * cypress_nor_set_page_size() - Set page size which corresponds to the flash
+ *                               configuration.
+ * @nor:	pointer to a 'struct spi_nor'
+ *
+ * The BFPT table advertises a 512B or 256B page size depending on part but the
+ * page size is actually configurable (with the default being 256B). Read from
+ * CFR3V[4] and set the correct size.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int cypress_nor_set_page_size(struct spi_nor *nor)
+{
+	struct spi_mem_op op =
+		CYPRESS_NOR_RD_ANY_REG_OP(nor->params->addr_nbytes,
+					  SPINOR_REG_CYPRESS_CFR3V,
+					  nor->bouncebuf);
+	int ret;
+
+	ret = spi_nor_read_any_reg(nor, &op, nor->reg_proto);
+	if (ret)
+		return ret;
+
+	if (nor->bouncebuf[0] & SPINOR_REG_CYPRESS_CFR3V_PGSZ)
+		nor->params->page_size = 512;
+	else
+		nor->params->page_size = 256;
+
+	return 0;
+}
+
 /**
  * cypress_nor_octal_dtr_enable() - Enable octal DTR on Cypress flashes.
  * @nor:		pointer to a 'struct spi_nor'
@@ -167,28 +198,7 @@ static int s28hs512t_post_bfpt_fixup(struct spi_nor *nor,
 				     const struct sfdp_parameter_header *bfpt_header,
 				     const struct sfdp_bfpt *bfpt)
 {
-	/*
-	 * The BFPT table advertises a 512B page size but the page size is
-	 * actually configurable (with the default being 256B). Read from
-	 * CFR3V[4] and set the correct size.
-	 */
-	struct spi_mem_op op =
-		CYPRESS_NOR_RD_ANY_REG_OP(3, SPINOR_REG_CYPRESS_CFR3V,
-					  nor->bouncebuf);
-	int ret;
-
-	spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
-
-	ret = spi_mem_exec_op(nor->spimem, &op);
-	if (ret)
-		return ret;
-
-	if (nor->bouncebuf[0] & SPINOR_REG_CYPRESS_CFR3V_PGSZ)
-		nor->params->page_size = 512;
-	else
-		nor->params->page_size = 256;
-
-	return 0;
+	return cypress_nor_set_page_size(nor);
 }
 
 static const struct spi_nor_fixups s28hs512t_fixups = {
-- 
2.25.1


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  parent reply	other threads:[~2022-05-03  8:17 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-03  8:16 [PATCH v14 0/8] mtd: spi-nor: Add support for Infineon s25hl-t/s25hs-t Tudor Ambarus
2022-05-03  8:16 ` [PATCH v14 1/8] mtd: spi-nor: s/addr_width/addr_nbytes Tudor Ambarus
2022-05-03  8:16 ` [PATCH v14 2/8] mtd: spi-nor: core: Shrink the storage size of the flash_info's addr_nbytes Tudor Ambarus
2022-05-03  8:27   ` Tudor.Ambarus
2022-05-03  8:35     ` Tudor.Ambarus
2022-05-03  8:16 ` [PATCH v14 3/8] mtd: spi-nor: sfdp: Clarify that nor->read_{opcode, dummy} are uninitialized Tudor Ambarus
2022-05-03  8:16 ` [PATCH v14 4/8] mtd: spi-nor: Do not change nor->addr_nbytes at SFDP parsing time Tudor Ambarus
2022-05-03  8:16 ` [PATCH v14 5/8] mtd: spi-nor: core: Couple the number of address bytes with the address mode Tudor Ambarus
2022-05-03  8:16 ` [PATCH v14 6/8] mtd: spi-nor: Retain nor->addr_width at 4BAIT parse Tudor Ambarus
2022-05-03  8:16 ` Tudor Ambarus [this message]
2022-05-03  8:16 ` [PATCH v14 8/8] mtd: spi-nor: spansion: Add s25hl-t/s25hs-t IDs and fixups Tudor Ambarus
2022-05-04  7:38   ` Takahiro Kuwano
2022-05-04  7:47     ` Tudor.Ambarus
2022-05-04  7:59       ` Takahiro Kuwano
2022-05-04  7:56 ` [PATCH v14 0/8] mtd: spi-nor: Add support for Infineon s25hl-t/s25hs-t Takahiro Kuwano
2022-05-04  9:55   ` Tudor.Ambarus
2022-05-09  2:37     ` Takahiro Kuwano

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