From: Tero Kristo <t-kristo@ti.com>
To: <linux-omap@vger.kernel.org>, <tony@atomide.com>
Cc: <linux-arm-kernel@lists.infradead.org>
Subject: [PATCH 4/8] ARM: dts: omap5: add aes2 entry
Date: Wed, 29 Apr 2020 17:29:58 +0300 [thread overview]
Message-ID: <20200429143002.5050-5-t-kristo@ti.com> (raw)
In-Reply-To: <20200429143002.5050-1-t-kristo@ti.com>
OMAP5 has AES hardware cryptographic accelerator, add AES2 instance for
it.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
arch/arm/boot/dts/omap5.dtsi | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 30391dbc7f8f..007911685cd9 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -276,6 +276,35 @@
};
};
+ aes2_target: target-module@4b701000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ reg = <0x4b701080 0x4>,
+ <0x4b701084 0x4>,
+ <0x4b701088 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>,
+ <SYSC_IDLE_SMART_WKUP>;
+ ti,syss-mask = <1>;
+ /* Domains (P, C): l4per_pwrdm, l4sec_clkdm */
+ clocks = <&l4sec_clkctrl OMAP5_AES2_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x4b701000 0x1000>;
+
+ aes2: aes@0 {
+ compatible = "ti,omap4-aes";
+ reg = <0 0xa0>;
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&sdma 114>, <&sdma 113>;
+ dma-names = "tx", "rx";
+ };
+ };
+
bandgap: bandgap@4a0021e0 {
reg = <0x4a0021e0 0xc
0x4a00232c 0xc
--
2.17.1
--
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next prev parent reply other threads:[~2020-04-29 14:30 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-29 14:29 [PATCH 0/8] ARM: omap4/5: crypto support fixes Tero Kristo
2020-04-29 14:29 ` [PATCH 1/8] ARM: dts: omap4: fix node names for the l4_cm clkctrl nodes Tero Kristo
2020-04-29 22:07 ` Tony Lindgren
2020-04-30 4:55 ` Tero Kristo
2020-04-30 8:34 ` Tero Kristo
2020-04-30 20:25 ` Tony Lindgren
2020-05-05 18:21 ` Tony Lindgren
2020-04-29 14:29 ` [PATCH 2/8] ARM: dts: omap5: " Tero Kristo
2020-04-29 14:29 ` [PATCH 3/8] ARM: dts: omap5: add aes1 entry Tero Kristo
2020-04-29 14:29 ` Tero Kristo [this message]
2020-04-29 14:29 ` [PATCH 5/8] ARM: dts: omap5: add SHA crypto accelerator node Tero Kristo
2020-04-29 14:30 ` [PATCH 6/8] ARM: dts: omap5: add DES " Tero Kristo
2020-04-29 14:30 ` [PATCH 7/8] ARM: OMAP4: Make L4SEC clock domain SWSUP only Tero Kristo
2020-04-29 14:30 ` [PATCH 8/8] ARM: OMAP5: " Tero Kristo
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