[PATCH 00/10] Save MSI chip in pci_sys_data

[PATCH 00/10] Save MSI chip in pci_sys_data

[Yijing Wang]

Now PCI host bridge drivers in arm associate MSI chip and
PCI bus by adding .add_bus(), and assign MSI chip pointer
to every PCI bus. Associating MSI chip and every PCI bus
is not necessary. All PCI busses under same PCI host brdige
share the same MSI chip. So saving MSI chip in pci_sys_data
is a better solution, it make PCI host bridge drivers clean.
Because we still need to provide arch spec pcibios_msi_controller()
to extract MSI controller pointer, a better solution is to
refactor PCI host bridge, make a generic pci_host_bridge, and
save common info like PCI domain number, MSI chip, resources
in it. We will do that work in another series as soon.

To Bjorn: Because struct msi_chip defined in struct hw_pci and pci_sys_data
is under the #ifdef CONFIG_PCI_MSI, if we use if(IS_ENABLED(CONFIG_PCI_MSI))
in PCI host bridge drivers, it will cause build errors when the CONFIG_PCI_MSI
is off. So I keep #ifdef CONFIG_PCI_MSI in this series.

Yijing Wang (10):
  MSI: Rename msi_chip to msi_controller for better readability
  PCI/MSI: Introduce weak pcibios_msi_controller()
  arm/MSI: Save MSI controller in pci_sys_data
  PCI: tegra: Save MSI controller in pci_sys_data
  PCI: designware: Save MSI controller in pci_sys_data
  PCI: rcar: Save MSI controller in pci_sys_data
  PCI: mvebu: Save MSI controller in pci_sys_data
  PCI: xilinx: Save MSI controller in pci_sys_data
  arm/PCI: Clean unused pcibios_add_bus() and pcibios_remove_bus()
  PCI/MSI: Remove useless bus->msi assignment

 arch/arm/include/asm/mach/pci.h     |   10 +++++---
 arch/arm/kernel/bios32.c            |   28 ++++++++++--------------
 drivers/irqchip/irq-armada-370-xp.c |   22 +++++++++---------
 drivers/of/of_pci.c                 |   40 +++++++++++++++++-----------------
 drivers/pci/host/pci-keystone-dw.c  |    4 +-
 drivers/pci/host/pci-keystone.h     |    2 +-
 drivers/pci/host/pci-mvebu.c        |   14 ++++-------
 drivers/pci/host/pci-tegra.c        |   37 +++++++++++++-------------------
 drivers/pci/host/pcie-designware.c  |   25 +++++++--------------
 drivers/pci/host/pcie-designware.h  |    2 +-
 drivers/pci/host/pcie-rcar.c        |   37 +++++++++++++-------------------
 drivers/pci/host/pcie-xilinx.c      |   27 +++++++----------------
 drivers/pci/msi.c                   |   22 ++++++++++++++-----
 drivers/pci/probe.c                 |    1 -
 include/linux/msi.h                 |    6 ++--
 include/linux/of_pci.h              |   14 ++++++------
 include/linux/pci.h                 |    2 +-
 17 files changed, 132 insertions(+), 161 deletions(-)

[PATCH 01/10] MSI: Rename msi_chip to msi_controller for better readability

[Yijing Wang]

"msi_chip" name has bad readability, it easily confuses
people that some sort of semiconductor integrated circuit
involved. Rename it to "msi_controller", it's more
descriptive, and arm also use "msi-controller" property
to represent MSI interrupt controller in dts file.
Should no functional change.

Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
 drivers/irqchip/irq-armada-370-xp.c |   22 +++++++++---------
 drivers/of/of_pci.c                 |   40 +++++++++++++++++-----------------
 drivers/pci/host/pci-keystone-dw.c  |    4 +-
 drivers/pci/host/pci-keystone.h     |    2 +-
 drivers/pci/host/pci-mvebu.c        |    4 +-
 drivers/pci/host/pci-tegra.c        |   26 +++++++++++-----------
 drivers/pci/host/pcie-designware.c  |   14 ++++++------
 drivers/pci/host/pcie-designware.h  |    2 +-
 drivers/pci/host/pcie-rcar.c        |   26 +++++++++++-----------
 drivers/pci/host/pcie-xilinx.c      |   12 +++++-----
 drivers/pci/msi.c                   |   12 +++++-----
 include/linux/msi.h                 |    6 ++--
 include/linux/of_pci.h              |   14 ++++++------
 include/linux/pci.h                 |    2 +-
 14 files changed, 93 insertions(+), 93 deletions(-)

diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c
index 3e238cd..c778ab0 100644
--- a/drivers/irqchip/irq-armada-370-xp.c
+++ b/drivers/irqchip/irq-armada-370-xp.c
@@ -129,7 +129,7 @@ static void armada_370_xp_free_msi(int hwirq)
 	mutex_unlock(&msi_used_lock);
 }
 
-static int armada_370_xp_setup_msi_irq(struct msi_chip *chip,
+static int armada_370_xp_setup_msi_irq(struct msi_controller *ctrl,
 				       struct pci_dev *pdev,
 				       struct msi_desc *desc)
 {
@@ -160,7 +160,7 @@ static int armada_370_xp_setup_msi_irq(struct msi_chip *chip,
 	return 0;
 }
 
-static void armada_370_xp_teardown_msi_irq(struct msi_chip *chip,
+static void armada_370_xp_teardown_msi_irq(struct msi_controller *ctrl,
 					   unsigned int irq)
 {
 	struct irq_data *d = irq_get_irq_data(irq);
@@ -195,34 +195,34 @@ static const struct irq_domain_ops armada_370_xp_msi_irq_ops = {
 static int armada_370_xp_msi_init(struct device_node *node,
 				  phys_addr_t main_int_phys_base)
 {
-	struct msi_chip *msi_chip;
+	struct msi_controller *ctrl;
 	u32 reg;
 	int ret;
 
 	msi_doorbell_addr = main_int_phys_base +
 		ARMADA_370_XP_SW_TRIG_INT_OFFS;
 
-	msi_chip = kzalloc(sizeof(*msi_chip), GFP_KERNEL);
-	if (!msi_chip)
+	ctrl = kzalloc(sizeof(*msi_controller), GFP_KERNEL);
+	if (!ctrl)
 		return -ENOMEM;
 
-	msi_chip->setup_irq = armada_370_xp_setup_msi_irq;
-	msi_chip->teardown_irq = armada_370_xp_teardown_msi_irq;
-	msi_chip->of_node = node;
+	ctrl->setup_irq = armada_370_xp_setup_msi_irq;
+	ctrl->teardown_irq = armada_370_xp_teardown_msi_irq;
+	ctrl->of_node = node;
 
 	armada_370_xp_msi_domain =
 		irq_domain_add_linear(NULL, PCI_MSI_DOORBELL_NR,
 				      &armada_370_xp_msi_irq_ops,
 				      NULL);
 	if (!armada_370_xp_msi_domain) {
-		kfree(msi_chip);
+		kfree(ctrl);
 		return -ENOMEM;
 	}
 
-	ret = of_pci_msi_chip_add(msi_chip);
+	ret = of_pci_msi_controller_add(ctrl);
 	if (ret < 0) {
 		irq_domain_remove(armada_370_xp_msi_domain);
-		kfree(msi_chip);
+		kfree(ctrl);
 		return ret;
 	}
 
diff --git a/drivers/of/of_pci.c b/drivers/of/of_pci.c
index 8882b46..ab136ea 100644
--- a/drivers/of/of_pci.c
+++ b/drivers/of/of_pci.c
@@ -233,45 +233,45 @@ EXPORT_SYMBOL_GPL(of_pci_get_host_bridge_resources);
 
 #ifdef CONFIG_PCI_MSI
 
-static LIST_HEAD(of_pci_msi_chip_list);
-static DEFINE_MUTEX(of_pci_msi_chip_mutex);
+static LIST_HEAD(of_pci_msi_controller_list);
+static DEFINE_MUTEX(of_pci_msi_controller_mutex);
 
-int of_pci_msi_chip_add(struct msi_chip *chip)
+int of_pci_msi_controller_add(struct msi_controller *ctrl)
 {
-	if (!of_property_read_bool(chip->of_node, "msi-controller"))
+	if (!of_property_read_bool(ctrl->of_node, "msi-controller"))
 		return -EINVAL;
 
-	mutex_lock(&of_pci_msi_chip_mutex);
-	list_add(&chip->list, &of_pci_msi_chip_list);
-	mutex_unlock(&of_pci_msi_chip_mutex);
+	mutex_lock(&of_pci_msi_controller_mutex);
+	list_add(&ctrl->list, &of_pci_msi_controller_list);
+	mutex_unlock(&of_pci_msi_controller_mutex);
 
 	return 0;
 }
-EXPORT_SYMBOL_GPL(of_pci_msi_chip_add);
+EXPORT_SYMBOL_GPL(of_pci_msi_controller_add);
 
-void of_pci_msi_chip_remove(struct msi_chip *chip)
+void of_pci_msi_controller_remove(struct msi_controller *ctrl)
 {
-	mutex_lock(&of_pci_msi_chip_mutex);
-	list_del(&chip->list);
-	mutex_unlock(&of_pci_msi_chip_mutex);
+	mutex_lock(&of_pci_msi_controller_mutex);
+	list_del(&ctrl->list);
+	mutex_unlock(&of_pci_msi_controller_mutex);
 }
-EXPORT_SYMBOL_GPL(of_pci_msi_chip_remove);
+EXPORT_SYMBOL_GPL(of_pci_msi_controller_remove);
 
-struct msi_chip *of_pci_find_msi_chip_by_node(struct device_node *of_node)
+struct msi_controller *of_pci_find_msi_controller_by_node(struct device_node *of_node)
 {
-	struct msi_chip *c;
+	struct msi_controller *c;
 
-	mutex_lock(&of_pci_msi_chip_mutex);
-	list_for_each_entry(c, &of_pci_msi_chip_list, list) {
+	mutex_lock(&of_pci_msi_controller_mutex);
+	list_for_each_entry(c, &of_pci_msi_controller_list, list) {
 		if (c->of_node == of_node) {
-			mutex_unlock(&of_pci_msi_chip_mutex);
+			mutex_unlock(&of_pci_msi_controller_mutex);
 			return c;
 		}
 	}
-	mutex_unlock(&of_pci_msi_chip_mutex);
+	mutex_unlock(&of_pci_msi_controller_mutex);
 
 	return NULL;
 }
-EXPORT_SYMBOL_GPL(of_pci_find_msi_chip_by_node);
+EXPORT_SYMBOL_GPL(of_pci_find_msi_controller_by_node);
 
 #endif /* CONFIG_PCI_MSI */
diff --git a/drivers/pci/host/pci-keystone-dw.c b/drivers/pci/host/pci-keystone-dw.c
index 34086ce..6db4a5b 100644
--- a/drivers/pci/host/pci-keystone-dw.c
+++ b/drivers/pci/host/pci-keystone-dw.c
@@ -205,7 +205,7 @@ const struct irq_domain_ops ks_dw_pcie_msi_domain_ops = {
 	.map = ks_dw_pcie_msi_map,
 };
 
-int ks_dw_pcie_msi_host_init(struct pcie_port *pp, struct msi_chip *chip)
+int ks_dw_pcie_msi_host_init(struct pcie_port *pp, struct msi_controller *ctrl)
 {
 	struct keystone_pcie *ks_pcie = to_keystone_pcie(pp);
 	int i;
@@ -213,7 +213,7 @@ int ks_dw_pcie_msi_host_init(struct pcie_port *pp, struct msi_chip *chip)
 	pp->irq_domain = irq_domain_add_linear(ks_pcie->msi_intc_np,
 					MAX_MSI_IRQS,
 					&ks_dw_pcie_msi_domain_ops,
-					chip);
+					ctrl);
 	if (!pp->irq_domain) {
 		dev_err(pp->dev, "irq domain init failed\n");
 		return -ENXIO;
diff --git a/drivers/pci/host/pci-keystone.h b/drivers/pci/host/pci-keystone.h
index 1fc1fce..4484001 100644
--- a/drivers/pci/host/pci-keystone.h
+++ b/drivers/pci/host/pci-keystone.h
@@ -55,4 +55,4 @@ void ks_dw_pcie_msi_set_irq(struct pcie_port *pp, int irq);
 void ks_dw_pcie_msi_clear_irq(struct pcie_port *pp, int irq);
 void ks_dw_pcie_v3_65_scan_bus(struct pcie_port *pp);
 int ks_dw_pcie_msi_host_init(struct pcie_port *pp,
-		struct msi_chip *chip);
+		struct msi_controller *ctrl);
diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c
index b1315e1..5ab7d16 100644
--- a/drivers/pci/host/pci-mvebu.c
+++ b/drivers/pci/host/pci-mvebu.c
@@ -99,7 +99,7 @@ struct mvebu_pcie_port;
 struct mvebu_pcie {
 	struct platform_device *pdev;
 	struct mvebu_pcie_port *ports;
-	struct msi_chip *msi;
+	struct msi_controller *msi;
 	struct resource io;
 	char io_name[30];
 	struct resource realio;
@@ -905,7 +905,7 @@ static void mvebu_pcie_msi_enable(struct mvebu_pcie *pcie)
 	if (!msi_node)
 		return;
 
-	pcie->msi = of_pci_find_msi_chip_by_node(msi_node);
+	pcie->msi = of_pci_find_msi_controller_by_node(msi_node);
 
 	if (pcie->msi)
 		pcie->msi->dev = &pcie->pdev->dev;
diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
index 3d43874..7c3d354 100644
--- a/drivers/pci/host/pci-tegra.c
+++ b/drivers/pci/host/pci-tegra.c
@@ -238,7 +238,7 @@
 	)
 
 struct tegra_msi {
-	struct msi_chip chip;
+	struct msi_controller ctrl;
 	DECLARE_BITMAP(used, INT_PCI_MSI_NR);
 	struct irq_domain *domain;
 	unsigned long pages;
@@ -259,9 +259,9 @@ struct tegra_pcie_soc_data {
 	bool has_gen2;
 };
 
-static inline struct tegra_msi *to_tegra_msi(struct msi_chip *chip)
+static inline struct tegra_msi *to_tegra_msi(struct msi_controller *ctrl)
 {
-	return container_of(chip, struct tegra_msi, chip);
+	return container_of(ctrl, struct tegra_msi, ctrl);
 }
 
 struct tegra_pcie {
@@ -699,7 +699,7 @@ static void tegra_pcie_add_bus(struct pci_bus *bus)
 	if (IS_ENABLED(CONFIG_PCI_MSI)) {
 		struct tegra_pcie *pcie = sys_to_pcie(bus->sysdata);
 
-		bus->msi = &pcie->msi.chip;
+		bus->msi = &pcie->msi.ctrl;
 	}
 }
 
@@ -1230,7 +1230,7 @@ static int tegra_msi_alloc(struct tegra_msi *chip)
 
 static void tegra_msi_free(struct tegra_msi *chip, unsigned long irq)
 {
-	struct device *dev = chip->chip.dev;
+	struct device *dev = chip->ctrl.dev;
 
 	mutex_lock(&chip->lock);
 
@@ -1283,10 +1283,10 @@ static irqreturn_t tegra_pcie_msi_irq(int irq, void *data)
 	return processed > 0 ? IRQ_HANDLED : IRQ_NONE;
 }
 
-static int tegra_msi_setup_irq(struct msi_chip *chip, struct pci_dev *pdev,
+static int tegra_msi_setup_irq(struct msi_controller *ctrl, struct pci_dev *pdev,
 			       struct msi_desc *desc)
 {
-	struct tegra_msi *msi = to_tegra_msi(chip);
+	struct tegra_msi *msi = to_tegra_msi(ctrl);
 	struct msi_msg msg;
 	unsigned int irq;
 	int hwirq;
@@ -1313,9 +1313,9 @@ static int tegra_msi_setup_irq(struct msi_chip *chip, struct pci_dev *pdev,
 	return 0;
 }
 
-static void tegra_msi_teardown_irq(struct msi_chip *chip, unsigned int irq)
+static void tegra_msi_teardown_irq(struct msi_controller *ctrl, unsigned int irq)
 {
-	struct tegra_msi *msi = to_tegra_msi(chip);
+	struct tegra_msi *msi = to_tegra_msi(ctrl);
 	struct irq_data *d = irq_get_irq_data(irq);
 	irq_hw_number_t hwirq = irqd_to_hwirq(d);
 
@@ -1358,12 +1358,12 @@ static int tegra_pcie_enable_msi(struct tegra_pcie *pcie)
 
 	mutex_init(&msi->lock);
 
-	msi->chip.dev = pcie->dev;
-	msi->chip.setup_irq = tegra_msi_setup_irq;
-	msi->chip.teardown_irq = tegra_msi_teardown_irq;
+	msi->ctrl.dev = pcie->dev;
+	msi->ctrl.setup_irq = tegra_msi_setup_irq;
+	msi->ctrl.teardown_irq = tegra_msi_teardown_irq;
 
 	msi->domain = irq_domain_add_linear(pcie->dev->of_node, INT_PCI_MSI_NR,
-					    &msi_domain_ops, &msi->chip);
+					    &msi_domain_ops, &msi->ctrl);
 	if (!msi->domain) {
 		dev_err(&pdev->dev, "failed to create IRQ domain\n");
 		return -ENOMEM;
diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
index dfed00a..0839b92 100644
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -276,7 +276,7 @@ no_valid_irq:
 	return -ENOSPC;
 }
 
-static int dw_msi_setup_irq(struct msi_chip *chip, struct pci_dev *pdev,
+static int dw_msi_setup_irq(struct msi_controller *ctrl, struct pci_dev *pdev,
 			struct msi_desc *desc)
 {
 	int irq, pos;
@@ -303,7 +303,7 @@ static int dw_msi_setup_irq(struct msi_chip *chip, struct pci_dev *pdev,
 	return 0;
 }
 
-static void dw_msi_teardown_irq(struct msi_chip *chip, unsigned int irq)
+static void dw_msi_teardown_irq(struct msi_controller *ctrl, unsigned int irq)
 {
 	struct irq_data *data = irq_get_irq_data(irq);
 	struct msi_desc *msi = irq_data_get_msi(data);
@@ -312,7 +312,7 @@ static void dw_msi_teardown_irq(struct msi_chip *chip, unsigned int irq)
 	clear_irq_range(pp, irq, 1, data->hwirq);
 }
 
-static struct msi_chip dw_pcie_msi_chip = {
+static struct msi_controller dw_pcie_msi_controller = {
 	.setup_irq = dw_msi_setup_irq,
 	.teardown_irq = dw_msi_teardown_irq,
 };
@@ -471,7 +471,7 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
 		if (!pp->ops->msi_host_init) {
 			pp->irq_domain = irq_domain_add_linear(pp->dev->of_node,
 						MAX_MSI_IRQS, &msi_domain_ops,
-						&dw_pcie_msi_chip);
+						&dw_pcie_msi_controller);
 			if (!pp->irq_domain) {
 				dev_err(pp->dev, "irq domain init failed\n");
 				return -ENXIO;
@@ -480,7 +480,7 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
 			for (i = 0; i < MAX_MSI_IRQS; i++)
 				irq_create_mapping(pp->irq_domain, i);
 		} else {
-			ret = pp->ops->msi_host_init(pp, &dw_pcie_msi_chip);
+			ret = pp->ops->msi_host_init(pp, &dw_pcie_msi_controller);
 			if (ret < 0)
 				return ret;
 		}
@@ -752,8 +752,8 @@ static void dw_pcie_add_bus(struct pci_bus *bus)
 	if (IS_ENABLED(CONFIG_PCI_MSI)) {
 		struct pcie_port *pp = sys_to_pcie(bus->sysdata);
 
-		dw_pcie_msi_chip.dev = pp->dev;
-		bus->msi = &dw_pcie_msi_chip;
+		dw_pcie_msi_controller.dev = pp->dev;
+		bus->msi = &dw_pcie_msi_controller;
 	}
 }
 
diff --git a/drivers/pci/host/pcie-designware.h b/drivers/pci/host/pcie-designware.h
index c625675..d39912d 100644
--- a/drivers/pci/host/pcie-designware.h
+++ b/drivers/pci/host/pcie-designware.h
@@ -73,7 +73,7 @@ struct pcie_host_ops {
 	u32 (*get_msi_addr)(struct pcie_port *pp);
 	u32 (*get_msi_data)(struct pcie_port *pp, int pos);
 	void (*scan_bus)(struct pcie_port *pp);
-	int (*msi_host_init)(struct pcie_port *pp, struct msi_chip *chip);
+	int (*msi_host_init)(struct pcie_port *pp, struct msi_controller *ctrl);
 };
 
 int dw_pcie_cfg_read(void __iomem *addr, int where, int size, u32 *val);
diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
index 61158e0..48221aa 100644
--- a/drivers/pci/host/pcie-rcar.c
+++ b/drivers/pci/host/pcie-rcar.c
@@ -111,16 +111,16 @@
 struct rcar_msi {
 	DECLARE_BITMAP(used, INT_PCI_MSI_NR);
 	struct irq_domain *domain;
-	struct msi_chip chip;
+	struct msi_controller ctrl;
 	unsigned long pages;
 	struct mutex lock;
 	int irq1;
 	int irq2;
 };
 
-static inline struct rcar_msi *to_rcar_msi(struct msi_chip *chip)
+static inline struct rcar_msi *to_rcar_msi(struct msi_controller *ctrl)
 {
-	return container_of(chip, struct rcar_msi, chip);
+	return container_of(ctrl, struct rcar_msi, ctrl);
 }
 
 /* Structure representing the PCIe interface */
@@ -385,7 +385,7 @@ static void rcar_pcie_add_bus(struct pci_bus *bus)
 	if (IS_ENABLED(CONFIG_PCI_MSI)) {
 		struct rcar_pcie *pcie = sys_to_pcie(bus->sysdata);
 
-		bus->msi = &pcie->msi.chip;
+		bus->msi = &pcie->msi.ctrl;
 	}
 }
 
@@ -622,11 +622,11 @@ static irqreturn_t rcar_pcie_msi_irq(int irq, void *data)
 	return IRQ_HANDLED;
 }
 
-static int rcar_msi_setup_irq(struct msi_chip *chip, struct pci_dev *pdev,
+static int rcar_msi_setup_irq(struct msi_controller *ctrl, struct pci_dev *pdev,
 			      struct msi_desc *desc)
 {
-	struct rcar_msi *msi = to_rcar_msi(chip);
-	struct rcar_pcie *pcie = container_of(chip, struct rcar_pcie, msi.chip);
+	struct rcar_msi *msi = to_rcar_msi(ctrl);
+	struct rcar_pcie *pcie = container_of(ctrl, struct rcar_pcie, msi.ctrl);
 	struct msi_msg msg;
 	unsigned int irq;
 	int hwirq;
@@ -652,9 +652,9 @@ static int rcar_msi_setup_irq(struct msi_chip *chip, struct pci_dev *pdev,
 	return 0;
 }
 
-static void rcar_msi_teardown_irq(struct msi_chip *chip, unsigned int irq)
+static void rcar_msi_teardown_irq(struct msi_controller *ctrl, unsigned int irq)
 {
-	struct rcar_msi *msi = to_rcar_msi(chip);
+	struct rcar_msi *msi = to_rcar_msi(ctrl);
 	struct irq_data *d = irq_get_irq_data(irq);
 
 	rcar_msi_free(msi, d->hwirq);
@@ -691,12 +691,12 @@ static int rcar_pcie_enable_msi(struct rcar_pcie *pcie)
 
 	mutex_init(&msi->lock);
 
-	msi->chip.dev = pcie->dev;
-	msi->chip.setup_irq = rcar_msi_setup_irq;
-	msi->chip.teardown_irq = rcar_msi_teardown_irq;
+	msi->ctrl.dev = pcie->dev;
+	msi->ctrl.setup_irq = rcar_msi_setup_irq;
+	msi->ctrl.teardown_irq = rcar_msi_teardown_irq;
 
 	msi->domain = irq_domain_add_linear(pcie->dev->of_node, INT_PCI_MSI_NR,
-					    &msi_domain_ops, &msi->chip);
+					    &msi_domain_ops, &msi->ctrl);
 	if (!msi->domain) {
 		dev_err(&pdev->dev, "failed to create IRQ domain\n");
 		return -ENOMEM;
diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c
index ccc496b..ce19133 100644
--- a/drivers/pci/host/pcie-xilinx.c
+++ b/drivers/pci/host/pcie-xilinx.c
@@ -335,7 +335,7 @@ static int xilinx_pcie_assign_msi(struct xilinx_pcie_port *port)
  * @chip: MSI Chip descriptor
  * @irq: MSI IRQ to destroy
  */
-static void xilinx_msi_teardown_irq(struct msi_chip *chip, unsigned int irq)
+static void xilinx_msi_teardown_irq(struct msi_controller *chip, unsigned int irq)
 {
 	xilinx_pcie_destroy_msi(irq);
 }
@@ -348,7 +348,7 @@ static void xilinx_msi_teardown_irq(struct msi_chip *chip, unsigned int irq)
  *
  * Return: '0' on success and error value on failure
  */
-static int xilinx_pcie_msi_setup_irq(struct msi_chip *chip,
+static int xilinx_pcie_msi_setup_irq(struct msi_controller *chip,
 				     struct pci_dev *pdev,
 				     struct msi_desc *desc)
 {
@@ -380,7 +380,7 @@ static int xilinx_pcie_msi_setup_irq(struct msi_chip *chip,
 }
 
 /* MSI Chip Descriptor */
-static struct msi_chip xilinx_pcie_msi_chip = {
+static struct msi_controller xilinx_pcie_msi_controller = {
 	.setup_irq = xilinx_pcie_msi_setup_irq,
 	.teardown_irq = xilinx_msi_teardown_irq,
 };
@@ -440,8 +440,8 @@ static void xilinx_pcie_add_bus(struct pci_bus *bus)
 	if (IS_ENABLED(CONFIG_PCI_MSI)) {
 		struct xilinx_pcie_port *port = sys_to_pcie(bus->sysdata);
 
-		xilinx_pcie_msi_chip.dev = port->dev;
-		bus->msi = &xilinx_pcie_msi_chip;
+		xilinx_pcie_msi_controller.dev = port->dev;
+		bus->msi = &xilinx_pcie_msi_controller;
 	}
 }
 
@@ -660,7 +660,7 @@ static int xilinx_pcie_init_irq_domain(struct xilinx_pcie_port *port)
 		port->irq_domain = irq_domain_add_linear(node,
 							 XILINX_NUM_MSI_IRQS,
 							 &msi_domain_ops,
-							 &xilinx_pcie_msi_chip);
+							 &xilinx_pcie_msi_controller);
 		if (!port->irq_domain) {
 			dev_err(dev, "Failed to get a MSI IRQ domain\n");
 			return PTR_ERR(port->irq_domain);
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 805c7d8..1c7ca4a 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -32,13 +32,13 @@ int pci_msi_ignore_mask;
 
 int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
 {
-	struct msi_chip *chip = dev->bus->msi;
+	struct msi_controller *ctrl = dev->bus->msi;
 	int err;
 
-	if (!chip || !chip->setup_irq)
+	if (!ctrl || !ctrl->setup_irq)
 		return -EINVAL;
 
-	err = chip->setup_irq(chip, dev, desc);
+	err = ctrl->setup_irq(ctrl, dev, desc);
 	if (err < 0)
 		return err;
 
@@ -48,12 +48,12 @@ int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
 void __weak arch_teardown_msi_irq(unsigned int irq)
 {
 	struct msi_desc *entry = irq_get_msi_desc(irq);
-	struct msi_chip *chip = entry->dev->bus->msi;
+	struct msi_controller *ctrl = entry->dev->bus->msi;
 
-	if (!chip || !chip->teardown_irq)
+	if (!ctrl || !ctrl->teardown_irq)
 		return;
 
-	chip->teardown_irq(chip, irq);
+	ctrl->teardown_irq(ctrl, irq);
 }
 
 int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
diff --git a/include/linux/msi.h b/include/linux/msi.h
index efad127..6704991 100644
--- a/include/linux/msi.h
+++ b/include/linux/msi.h
@@ -65,15 +65,15 @@ void arch_restore_msi_irqs(struct pci_dev *dev);
 void default_teardown_msi_irqs(struct pci_dev *dev);
 void default_restore_msi_irqs(struct pci_dev *dev);
 
-struct msi_chip {
+struct msi_controller {
 	struct module *owner;
 	struct device *dev;
 	struct device_node *of_node;
 	struct list_head list;
 
-	int (*setup_irq)(struct msi_chip *chip, struct pci_dev *dev,
+	int (*setup_irq)(struct msi_controller *chip, struct pci_dev *dev,
 			 struct msi_desc *desc);
-	void (*teardown_irq)(struct msi_chip *chip, unsigned int irq);
+	void (*teardown_irq)(struct msi_controller *chip, unsigned int irq);
 };
 
 #endif /* LINUX_MSI_H */
diff --git a/include/linux/of_pci.h b/include/linux/of_pci.h
index 1fd207e..8d9d068 100644
--- a/include/linux/of_pci.h
+++ b/include/linux/of_pci.h
@@ -59,14 +59,14 @@ int of_pci_get_host_bridge_resources(struct device_node *dev,
 #endif
 
 #if defined(CONFIG_OF) && defined(CONFIG_PCI_MSI)
-int of_pci_msi_chip_add(struct msi_chip *chip);
-void of_pci_msi_chip_remove(struct msi_chip *chip);
-struct msi_chip *of_pci_find_msi_chip_by_node(struct device_node *of_node);
+int of_pci_msi_controller_add(struct msi_controller *chip);
+void of_pci_msi_controller_remove(struct msi_controller *chip);
+struct msi_controller *of_pci_find_msi_controller_by_node(struct device_node *of_node);
 #else
-static inline int of_pci_msi_chip_add(struct msi_chip *chip) { return -EINVAL; }
-static inline void of_pci_msi_chip_remove(struct msi_chip *chip) { }
-static inline struct msi_chip *
-of_pci_find_msi_chip_by_node(struct device_node *of_node) { return NULL; }
+static inline int of_pci_msi_controller_add(struct msi_controller *chip) { return -EINVAL; }
+static inline void of_pci_msi_controller_remove(struct msi_controller *chip) { }
+static inline struct msi_controller *
+of_pci_find_msi_controller_by_node(struct device_node *of_node) { return NULL; }
 #endif
 
 #endif
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 5be8db4..f9e039f 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -449,7 +449,7 @@ struct pci_bus {
 	struct resource busn_res;	/* bus numbers routed to this bus */
 
 	struct pci_ops	*ops;		/* configuration access functions */
-	struct msi_chip	*msi;		/* MSI controller */
+	struct msi_controller *msi;		/* MSI controller */
 	void		*sysdata;	/* hook for sys-specific extension */
 	struct proc_dir_entry *procdir;	/* directory entry in /proc/bus/pci */
 
-- 
1.7.1

[PATCH 02/10] PCI/MSI: Introduce weak pcibios_msi_controller()

[Yijing Wang]

Introduce a new weak pcibios_msi_controller() to
get the associate msi_chip for PCI bus. This is
preparation for save msi_chip in arch PCI sysdata.
This weak function will be removed after we save
msi_chip in generic pci_host_bridge.

Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
 drivers/pci/msi.c |   19 +++++++++++++++++--
 1 files changed, 17 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 1c7ca4a..f085f7f 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -30,9 +30,24 @@ int pci_msi_ignore_mask;
 
 /* Arch hooks */
 
+struct msi_controller * __weak pcibios_msi_controller(struct pci_bus *bus)
+{
+	return NULL;
+}
+
+struct msi_controller *pci_msi_controller(struct pci_bus *bus)
+{
+	struct msi_controller *ctrl = bus->msi;
+
+	if (ctrl)
+		return ctrl;
+
+	return pcibios_msi_controller(bus);
+}
+
 int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
 {
-	struct msi_controller *ctrl = dev->bus->msi;
+	struct msi_controller *ctrl = pci_msi_controller(dev->bus);
 	int err;
 
 	if (!ctrl || !ctrl->setup_irq)
@@ -48,7 +63,7 @@ int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
 void __weak arch_teardown_msi_irq(unsigned int irq)
 {
 	struct msi_desc *entry = irq_get_msi_desc(irq);
-	struct msi_controller *ctrl = entry->dev->bus->msi;
+	struct msi_controller *ctrl = pci_msi_controller(entry->dev->bus);
 
 	if (!ctrl || !ctrl->teardown_irq)
 		return;
-- 
1.7.1

[PATCH 03/10] arm/MSI: Save MSI controller in pci_sys_data

[Yijing Wang]

Saving msi controller in pci_sys_data make PCI bus and
devices don't need to know msi controller details. It also
make PCI enumeration code be decoupled from msi controller.
Currently, we associate msi controller and PCI bus by adding
.add_bus() in PCI host drivers, and assign parent PCI bus's
msi controller to child bus in pci_alloc_child_bus().
In fact, all PCI devices under the same PCI host bridge
share same msi controller. So msi controller should be seen
as one of resources or attributes to be initialized in pci host
bridge driver. Currently, pci hostbridge drivers create
pci_host_bridge in pci_create_root_bus(), and pass arch
specific pci sysdata to core pci scan functions. So pci
arch sysdata is good place to save msi controller. But this
is not the best solution, because we have to add arch spec
pcibios_msi_controller() to extract out msi_controller from
PCI sysdata.
A better approach is to make a generic pci_host_bridge,
save common info like msi controller, PCI domain, PCI hostbridge
resources into it, and pass the generic pci_host_bridge to PCI
scan functions. Then we can remove lots of arch spec functions.
But these changes are huge, so we plan to do it in another series.

Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
 arch/arm/include/asm/mach/pci.h |    6 ++++++
 arch/arm/kernel/bios32.c        |   12 ++++++++++++
 2 files changed, 18 insertions(+), 0 deletions(-)

diff --git a/arch/arm/include/asm/mach/pci.h b/arch/arm/include/asm/mach/pci.h
index 7fc4278..8144d61 100644
--- a/arch/arm/include/asm/mach/pci.h
+++ b/arch/arm/include/asm/mach/pci.h
@@ -22,6 +22,9 @@ struct hw_pci {
 #ifdef CONFIG_PCI_DOMAINS
 	int		domain;
 #endif
+#ifdef CONFIG_PCI_MSI
+	struct msi_controller *msi_ctrl;
+#endif
 	struct pci_ops	*ops;
 	int		nr_controllers;
 	void		**private_data;
@@ -47,6 +50,9 @@ struct pci_sys_data {
 #ifdef CONFIG_PCI_DOMAINS
 	int		domain;
 #endif
+#ifdef CONFIG_PCI_MSI
+	struct msi_controller *msi_ctrl;
+#endif
 	struct list_head node;
 	int		busnr;		/* primary bus number			*/
 	u64		mem_offset;	/* bus->cpu memory mapping offset	*/
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index 17a26c1..073229f 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -18,6 +18,15 @@
 
 static int debug_pci;
 
+#ifdef CONFIG_PCI_MSI
+struct msi_controller *pcibios_msi_controller(struct pci_bus *bus)
+{
+	struct pci_sys_data *sysdata = bus->sysdata;
+
+	return sysdata->msi_ctrl;
+}
+#endif
+
 /*
  * We can't use pci_get_device() here since we are
  * called from interrupt context.
@@ -471,6 +480,9 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
 #ifdef CONFIG_PCI_DOMAINS
 		sys->domain  = hw->domain;
 #endif
+#ifdef CONFIG_PCI_MSI
+		sys->msi_ctrl = hw->msi_ctrl;
+#endif
 		sys->busnr   = busnr;
 		sys->swizzle = hw->swizzle;
 		sys->map_irq = hw->map_irq;
-- 
1.7.1

[PATCH 04/10] PCI: tegra: Save MSI controller in pci_sys_data

[Yijing Wang]

Save MSI controller in pci_sys_data instead of
assigning MSI controller pointer to every pci bus
in .add_bus().

Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
 drivers/pci/host/pci-tegra.c |   13 +++----------
 1 files changed, 3 insertions(+), 10 deletions(-)

diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
index 7c3d354..89fb943 100644
--- a/drivers/pci/host/pci-tegra.c
+++ b/drivers/pci/host/pci-tegra.c
@@ -694,15 +694,6 @@ static int tegra_pcie_map_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
 	return irq;
 }
 
-static void tegra_pcie_add_bus(struct pci_bus *bus)
-{
-	if (IS_ENABLED(CONFIG_PCI_MSI)) {
-		struct tegra_pcie *pcie = sys_to_pcie(bus->sysdata);
-
-		bus->msi = &pcie->msi.ctrl;
-	}
-}
-
 static struct pci_bus *tegra_pcie_scan_bus(int nr, struct pci_sys_data *sys)
 {
 	struct tegra_pcie *pcie = sys_to_pcie(sys);
@@ -1881,11 +1872,13 @@ static int tegra_pcie_enable(struct tegra_pcie *pcie)
 
 	memset(&hw, 0, sizeof(hw));
 
+#ifdef CONFIG_PCI_MSI
+	hw.msi_ctrl = &pcie->msi.ctrl;
+#endif
 	hw.nr_controllers = 1;
 	hw.private_data = (void **)&pcie;
 	hw.setup = tegra_pcie_setup;
 	hw.map_irq = tegra_pcie_map_irq;
-	hw.add_bus = tegra_pcie_add_bus;
 	hw.scan = tegra_pcie_scan_bus;
 	hw.ops = &tegra_pcie_ops;
 
-- 
1.7.1

[PATCH 05/10] PCI: designware: Save MSI controller in pci_sys_data

[Yijing Wang]

Save MSI controller in pci_sys_data instead of
assigning MSI controller pointer to every pci bus
in .add_bus().

Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
 drivers/pci/host/pcie-designware.c |   15 ++++-----------
 1 files changed, 4 insertions(+), 11 deletions(-)

diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
index 0839b92..dd85b41 100644
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -498,6 +498,10 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
 	val |= PORT_LOGIC_SPEED_CHANGE;
 	dw_pcie_wr_own_conf(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, 4, val);
 
+#ifdef CONFIG_PCI_MSI
+	dw_pcie_msi_controller.dev = pp->dev;
+	dw_pci.msi_ctrl = &dw_pcie_msi_controller;
+#endif
 	dw_pci.nr_controllers = 1;
 	dw_pci.private_data = (void **)&pp;
 
@@ -747,21 +751,10 @@ static int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 	return irq;
 }
 
-static void dw_pcie_add_bus(struct pci_bus *bus)
-{
-	if (IS_ENABLED(CONFIG_PCI_MSI)) {
-		struct pcie_port *pp = sys_to_pcie(bus->sysdata);
-
-		dw_pcie_msi_controller.dev = pp->dev;
-		bus->msi = &dw_pcie_msi_controller;
-	}
-}
-
 static struct hw_pci dw_pci = {
 	.setup		= dw_pcie_setup,
 	.scan		= dw_pcie_scan_bus,
 	.map_irq	= dw_pcie_map_irq,
-	.add_bus	= dw_pcie_add_bus,
 };
 
 void dw_pcie_setup_rc(struct pcie_port *pp)
-- 
1.7.1

[PATCH 06/10] PCI: rcar: Save MSI controller in pci_sys_data

[Yijing Wang]

Save MSI controller in pci_sys_data instead of
assigning MSI controller pointer to every pci bus
in .add_bus().

Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
 drivers/pci/host/pcie-rcar.c |   13 +++----------
 1 files changed, 3 insertions(+), 10 deletions(-)

diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
index 48221aa..0dd9c75 100644
--- a/drivers/pci/host/pcie-rcar.c
+++ b/drivers/pci/host/pcie-rcar.c
@@ -380,20 +380,10 @@ static int rcar_pcie_setup(int nr, struct pci_sys_data *sys)
 	return 1;
 }
 
-static void rcar_pcie_add_bus(struct pci_bus *bus)
-{
-	if (IS_ENABLED(CONFIG_PCI_MSI)) {
-		struct rcar_pcie *pcie = sys_to_pcie(bus->sysdata);
-
-		bus->msi = &pcie->msi.ctrl;
-	}
-}
-
 struct hw_pci rcar_pci = {
 	.setup          = rcar_pcie_setup,
 	.map_irq        = of_irq_parse_and_map_pci,
 	.ops            = &rcar_pcie_ops,
-	.add_bus        = rcar_pcie_add_bus,
 };
 
 static void rcar_pcie_enable(struct rcar_pcie *pcie)
@@ -402,6 +392,9 @@ static void rcar_pcie_enable(struct rcar_pcie *pcie)
 
 	rcar_pci.nr_controllers = 1;
 	rcar_pci.private_data = (void **)&pcie;
+#ifdef CONFIG_PCI_MSI
+	rcar_pci.msi_ctrl = &pcie->msi.ctrl;
+#endif
 
 	pci_common_init_dev(&pdev->dev, &rcar_pci);
 #ifdef CONFIG_PCI_DOMAINS
-- 
1.7.1

[PATCH 07/10] PCI: mvebu: Save MSI controller in pci_sys_data

[Yijing Wang]

Save MSI controller in pci_sys_data instead of
assigning MSI controller pointer to every pci bus
in .add_bus().

Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
 drivers/pci/host/pci-mvebu.c |   10 +++-------
 1 files changed, 3 insertions(+), 7 deletions(-)

diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c
index 5ab7d16..e2db57e 100644
--- a/drivers/pci/host/pci-mvebu.c
+++ b/drivers/pci/host/pci-mvebu.c
@@ -774,12 +774,6 @@ static struct pci_bus *mvebu_pcie_scan_bus(int nr, struct pci_sys_data *sys)
 	return bus;
 }
 
-static void mvebu_pcie_add_bus(struct pci_bus *bus)
-{
-	struct mvebu_pcie *pcie = sys_to_pcie(bus->sysdata);
-	bus->msi = pcie->msi;
-}
-
 static resource_size_t mvebu_pcie_align_resource(struct pci_dev *dev,
 						 const struct resource *res,
 						 resource_size_t start,
@@ -816,6 +810,9 @@ static void mvebu_pcie_enable(struct mvebu_pcie *pcie)
 
 	memset(&hw, 0, sizeof(hw));
 
+#ifdef CONFIG_PCI_MSI
+	hw.msi_ctrl = pcie->msi;
+#endif
 	hw.nr_controllers = 1;
 	hw.private_data   = (void **)&pcie;
 	hw.setup          = mvebu_pcie_setup;
@@ -823,7 +820,6 @@ static void mvebu_pcie_enable(struct mvebu_pcie *pcie)
 	hw.map_irq        = of_irq_parse_and_map_pci;
 	hw.ops            = &mvebu_pcie_ops;
 	hw.align_resource = mvebu_pcie_align_resource;
-	hw.add_bus        = mvebu_pcie_add_bus;
 
 	pci_common_init(&hw);
 }
-- 
1.7.1

[PATCH 08/10] PCI: xilinx: Save MSI controller in pci_sys_data

[Yijing Wang]

Save MSI controller in pci_sys_data instead of
assigning MSI controller pointer to every pci bus
in .add_bus().

Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
 drivers/pci/host/pcie-xilinx.c |   19 ++++---------------
 1 files changed, 4 insertions(+), 15 deletions(-)

diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c
index ce19133..5a3e5a0 100644
--- a/drivers/pci/host/pcie-xilinx.c
+++ b/drivers/pci/host/pcie-xilinx.c
@@ -431,20 +431,6 @@ static void xilinx_pcie_enable_msi(struct xilinx_pcie_port *port)
 	pcie_write(port, msg_addr, XILINX_PCIE_REG_MSIBASE2);
 }
 
-/**
- * xilinx_pcie_add_bus - Add MSI chip info to PCIe bus
- * @bus: PCIe bus
- */
-static void xilinx_pcie_add_bus(struct pci_bus *bus)
-{
-	if (IS_ENABLED(CONFIG_PCI_MSI)) {
-		struct xilinx_pcie_port *port = sys_to_pcie(bus->sysdata);
-
-		xilinx_pcie_msi_controller.dev = port->dev;
-		bus->msi = &xilinx_pcie_msi_controller;
-	}
-}
-
 /* INTx Functions */
 
 /**
@@ -924,10 +910,13 @@ static int xilinx_pcie_probe(struct platform_device *pdev)
 		.private_data	= (void **)&port,
 		.setup		= xilinx_pcie_setup,
 		.map_irq	= of_irq_parse_and_map_pci,
-		.add_bus	= xilinx_pcie_add_bus,
 		.scan		= xilinx_pcie_scan_bus,
 		.ops		= &xilinx_pcie_ops,
 	};
+#ifdef CONFIG_PCI_MSI
+	xilinx_pcie_msi_controller.dev = port->dev;
+	hw.msi_ctrl = &xilinx_pcie_msi_controller;
+#endif
 	pci_common_init_dev(dev, &hw);
 
 	return 0;
-- 
1.7.1

[PATCH 09/10] arm/PCI: Clean unused pcibios_add_bus() and pcibios_remove_bus()

[Yijing Wang]

MSI controller has been saved in pci_sys_data, now we can
clean up pcibios_add_bus() and pcibios_remove_bus()
in arm, and use pcibios_msi_controller() to get MSI controller
pointer.

Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
 arch/arm/include/asm/mach/pci.h |    4 ----
 arch/arm/kernel/bios32.c        |   16 ----------------
 2 files changed, 0 insertions(+), 20 deletions(-)

diff --git a/arch/arm/include/asm/mach/pci.h b/arch/arm/include/asm/mach/pci.h
index 8144d61..8292b5f 100644
--- a/arch/arm/include/asm/mach/pci.h
+++ b/arch/arm/include/asm/mach/pci.h
@@ -39,8 +39,6 @@ struct hw_pci {
 					  resource_size_t start,
 					  resource_size_t size,
 					  resource_size_t align);
-	void		(*add_bus)(struct pci_bus *bus);
-	void		(*remove_bus)(struct pci_bus *bus);
 };
 
 /*
@@ -71,8 +69,6 @@ struct pci_sys_data {
 					  resource_size_t start,
 					  resource_size_t size,
 					  resource_size_t align);
-	void		(*add_bus)(struct pci_bus *bus);
-	void		(*remove_bus)(struct pci_bus *bus);
 	void		*private_data;	/* platform controller private data	*/
 };
 
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index 073229f..32301fc 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -369,20 +369,6 @@ void pcibios_fixup_bus(struct pci_bus *bus)
 }
 EXPORT_SYMBOL(pcibios_fixup_bus);
 
-void pcibios_add_bus(struct pci_bus *bus)
-{
-	struct pci_sys_data *sys = bus->sysdata;
-	if (sys->add_bus)
-		sys->add_bus(bus);
-}
-
-void pcibios_remove_bus(struct pci_bus *bus)
-{
-	struct pci_sys_data *sys = bus->sysdata;
-	if (sys->remove_bus)
-		sys->remove_bus(bus);
-}
-
 /*
  * Swizzle the device pin each time we cross a bridge.  If a platform does
  * not provide a swizzle function, we perform the standard PCI swizzling.
@@ -487,8 +473,6 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
 		sys->swizzle = hw->swizzle;
 		sys->map_irq = hw->map_irq;
 		sys->align_resource = hw->align_resource;
-		sys->add_bus = hw->add_bus;
-		sys->remove_bus = hw->remove_bus;
 		INIT_LIST_HEAD(&sys->resources);
 
 		if (hw->private_data)
-- 
1.7.1

[PATCH 10/10] PCI/MSI: Remove useless bus->msi assignment

[Yijing Wang]

Thierry introduced MSI chip(now renamed to MSI controller)
framework to associate MSI chip and PCI bus in arm.
Other platforms still use its own arch MSI functions to
support MSI capability. Thierry introduced the bus->msi
assignment to make child bus can inherit bus->msi from the parent.
But in fact, drivers which used MSI chip always associate
MSI chip and PCI bus by add .add_bus() in arm PCI host bridge
drivers. Now we have saved MSI chip in pci_sys_data.
We can remove this bus->msi assignment safely.

Signed-off-by: Yijing Wang <wangyijing@huawei.com>
CC: Thierry Reding <thierry.reding@gmail.com>
CC: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
 drivers/pci/msi.c   |    5 -----
 drivers/pci/probe.c |    1 -
 2 files changed, 0 insertions(+), 6 deletions(-)

diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index f085f7f..27b6a54 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -37,11 +37,6 @@ struct msi_controller * __weak pcibios_msi_controller(struct pci_bus *bus)
 
 struct msi_controller *pci_msi_controller(struct pci_bus *bus)
 {
-	struct msi_controller *ctrl = bus->msi;
-
-	if (ctrl)
-		return ctrl;
-
 	return pcibios_msi_controller(bus);
 }
 
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 5ed9930..4b18bf2 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -682,7 +682,6 @@ static struct pci_bus *pci_alloc_child_bus(struct pci_bus *parent,
 
 	child->parent = parent;
 	child->ops = parent->ops;
-	child->msi = parent->msi;
 	child->sysdata = parent->sysdata;
 	child->bus_flags = parent->bus_flags;
 
-- 
1.7.1

Re: [PATCH 00/10] Save MSI chip in pci_sys_data

[Bjorn Helgaas]

On Mon, Oct 27, 2014 at 03:48:37PM +0800, Yijing Wang wrote:
> Now PCI host bridge drivers in arm associate MSI chip and
> PCI bus by adding .add_bus(), and assign MSI chip pointer
> to every PCI bus. Associating MSI chip and every PCI bus
> is not necessary. All PCI busses under same PCI host brdige
> share the same MSI chip. So saving MSI chip in pci_sys_data
> is a better solution, it make PCI host bridge drivers clean.
> Because we still need to provide arch spec pcibios_msi_controller()
> to extract MSI controller pointer, a better solution is to
> refactor PCI host bridge, make a generic pci_host_bridge, and
> save common info like PCI domain number, MSI chip, resources
> in it. We will do that work in another series as soon.
> 
> To Bjorn: Because struct msi_chip defined in struct hw_pci and pci_sys_data
> is under the #ifdef CONFIG_PCI_MSI, if we use if(IS_ENABLED(CONFIG_PCI_MSI))
> in PCI host bridge drivers, it will cause build errors when the CONFIG_PCI_MSI
> is off. So I keep #ifdef CONFIG_PCI_MSI in this series.
> 
> Yijing Wang (10):
>   MSI: Rename msi_chip to msi_controller for better readability
>   PCI/MSI: Introduce weak pcibios_msi_controller()
>   arm/MSI: Save MSI controller in pci_sys_data
>   PCI: tegra: Save MSI controller in pci_sys_data
>   PCI: designware: Save MSI controller in pci_sys_data
>   PCI: rcar: Save MSI controller in pci_sys_data
>   PCI: mvebu: Save MSI controller in pci_sys_data
>   PCI: xilinx: Save MSI controller in pci_sys_data
>   arm/PCI: Clean unused pcibios_add_bus() and pcibios_remove_bus()
>   PCI/MSI: Remove useless bus->msi assignment
> 
>  arch/arm/include/asm/mach/pci.h     |   10 +++++---
>  arch/arm/kernel/bios32.c            |   28 ++++++++++--------------
>  drivers/irqchip/irq-armada-370-xp.c |   22 +++++++++---------
>  drivers/of/of_pci.c                 |   40 +++++++++++++++++-----------------
>  drivers/pci/host/pci-keystone-dw.c  |    4 +-
>  drivers/pci/host/pci-keystone.h     |    2 +-
>  drivers/pci/host/pci-mvebu.c        |   14 ++++-------
>  drivers/pci/host/pci-tegra.c        |   37 +++++++++++++-------------------
>  drivers/pci/host/pcie-designware.c  |   25 +++++++--------------
>  drivers/pci/host/pcie-designware.h  |    2 +-
>  drivers/pci/host/pcie-rcar.c        |   37 +++++++++++++-------------------
>  drivers/pci/host/pcie-xilinx.c      |   27 +++++++----------------
>  drivers/pci/msi.c                   |   22 ++++++++++++++-----
>  drivers/pci/probe.c                 |    1 -
>  include/linux/msi.h                 |    6 ++--
>  include/linux/of_pci.h              |   14 ++++++------
>  include/linux/pci.h                 |    2 +-
>  17 files changed, 132 insertions(+), 161 deletions(-)
> 

Applied to pci/msi for v3.19, thanks.

Re: [PATCH 10/10] PCI/MSI: Remove useless bus->msi assignment

[Bjorn Helgaas]

On Mon, Oct 27, 2014 at 03:48:47PM +0800, Yijing Wang wrote:
> Thierry introduced MSI chip(now renamed to MSI controller)
> framework to associate MSI chip and PCI bus in arm.
> Other platforms still use its own arch MSI functions to
> support MSI capability. Thierry introduced the bus->msi
> assignment to make child bus can inherit bus->msi from the parent.
> But in fact, drivers which used MSI chip always associate
> MSI chip and PCI bus by add .add_bus() in arm PCI host bridge
> drivers. Now we have saved MSI chip in pci_sys_data.
> We can remove this bus->msi assignment safely.
> 
> Signed-off-by: Yijing Wang <wangyijing@huawei.com>
> CC: Thierry Reding <thierry.reding@gmail.com>
> CC: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> ---
>  drivers/pci/msi.c   |    5 -----
>  drivers/pci/probe.c |    1 -
>  2 files changed, 0 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
> index f085f7f..27b6a54 100644
> --- a/drivers/pci/msi.c
> +++ b/drivers/pci/msi.c
> @@ -37,11 +37,6 @@ struct msi_controller * __weak pcibios_msi_controller(struct pci_bus *bus)
>  
>  struct msi_controller *pci_msi_controller(struct pci_bus *bus)
>  {
> -	struct msi_controller *ctrl = bus->msi;
> -
> -	if (ctrl)
> -		return ctrl;
> -
>  	return pcibios_msi_controller(bus);
>  }
>  
> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> index 5ed9930..4b18bf2 100644
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -682,7 +682,6 @@ static struct pci_bus *pci_alloc_child_bus(struct pci_bus *parent,
>  
>  	child->parent = parent;
>  	child->ops = parent->ops;
> -	child->msi = parent->msi;

Does this mean that struct pci_bus.msi is now unused?  If not, where is it
still used?

>  	child->sysdata = parent->sysdata;
>  	child->bus_flags = parent->bus_flags;
>  
> -- 
> 1.7.1
> 

Re: [PATCH 10/10] PCI/MSI: Remove useless bus->msi assignment

[Yijing Wang]

On 2014/11/12 12:24, Bjorn Helgaas wrote:
> On Mon, Oct 27, 2014 at 03:48:47PM +0800, Yijing Wang wrote:
>> Thierry introduced MSI chip(now renamed to MSI controller)
>> framework to associate MSI chip and PCI bus in arm.
>> Other platforms still use its own arch MSI functions to
>> support MSI capability. Thierry introduced the bus->msi
>> assignment to make child bus can inherit bus->msi from the parent.
>> But in fact, drivers which used MSI chip always associate
>> MSI chip and PCI bus by add .add_bus() in arm PCI host bridge
>> drivers. Now we have saved MSI chip in pci_sys_data.
>> We can remove this bus->msi assignment safely.
>>
>> Signed-off-by: Yijing Wang <wangyijing@huawei.com>
>> CC: Thierry Reding <thierry.reding@gmail.com>
>> CC: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
>> ---
>>  drivers/pci/msi.c   |    5 -----
>>  drivers/pci/probe.c |    1 -
>>  2 files changed, 0 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
>> index f085f7f..27b6a54 100644
>> --- a/drivers/pci/msi.c
>> +++ b/drivers/pci/msi.c
>> @@ -37,11 +37,6 @@ struct msi_controller * __weak pcibios_msi_controller(struct pci_bus *bus)
>>  
>>  struct msi_controller *pci_msi_controller(struct pci_bus *bus)
>>  {
>> -	struct msi_controller *ctrl = bus->msi;
>> -
>> -	if (ctrl)
>> -		return ctrl;
>> -
>>  	return pcibios_msi_controller(bus);
>>  }
>>  
>> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
>> index 5ed9930..4b18bf2 100644
>> --- a/drivers/pci/probe.c
>> +++ b/drivers/pci/probe.c
>> @@ -682,7 +682,6 @@ static struct pci_bus *pci_alloc_child_bus(struct pci_bus *parent,
>>  
>>  	child->parent = parent;
>>  	child->ops = parent->ops;
>> -	child->msi = parent->msi;
> 
> Does this mean that struct pci_bus.msi is now unused?  If not, where is it
> still used?

Yes, now all arm platforms save msi_chip in pci_sys_data, no one uses it again,
actually, no platform/pcihost never use it, because all arm pci host drivers use
pcibios_add_bus() to associate it and pci bus before. Remove it is safety.

Thanks!
Yijing.

> 
>>  	child->sysdata = parent->sysdata;
>>  	child->bus_flags = parent->bus_flags;
>>  
>> -- 
>> 1.7.1
>>
> 
> .
> 


-- 
Thanks!
Yijing

Re: [PATCH 00/10] Save MSI chip in pci_sys_data

[Bjorn Helgaas]

[+cc Marc, Yingjoe]

On Tue, Nov 11, 2014 at 09:23:59PM -0700, Bjorn Helgaas wrote:
> On Mon, Oct 27, 2014 at 03:48:37PM +0800, Yijing Wang wrote:
> > Now PCI host bridge drivers in arm associate MSI chip and
> > PCI bus by adding .add_bus(), and assign MSI chip pointer
> > to every PCI bus. Associating MSI chip and every PCI bus
> > is not necessary. All PCI busses under same PCI host brdige
> > share the same MSI chip. So saving MSI chip in pci_sys_data
> > is a better solution, it make PCI host bridge drivers clean.
> > Because we still need to provide arch spec pcibios_msi_controller()
> > to extract MSI controller pointer, a better solution is to
> > refactor PCI host bridge, make a generic pci_host_bridge, and
> > save common info like PCI domain number, MSI chip, resources
> > in it. We will do that work in another series as soon.
> > 
> > To Bjorn: Because struct msi_chip defined in struct hw_pci and pci_sys_data
> > is under the #ifdef CONFIG_PCI_MSI, if we use if(IS_ENABLED(CONFIG_PCI_MSI))
> > in PCI host bridge drivers, it will cause build errors when the CONFIG_PCI_MSI
> > is off. So I keep #ifdef CONFIG_PCI_MSI in this series.
> > 
> > Yijing Wang (10):
> >   MSI: Rename msi_chip to msi_controller for better readability
> >   PCI/MSI: Introduce weak pcibios_msi_controller()
> >   arm/MSI: Save MSI controller in pci_sys_data
> >   PCI: tegra: Save MSI controller in pci_sys_data
> >   PCI: designware: Save MSI controller in pci_sys_data
> >   PCI: rcar: Save MSI controller in pci_sys_data
> >   PCI: mvebu: Save MSI controller in pci_sys_data
> >   PCI: xilinx: Save MSI controller in pci_sys_data
> >   arm/PCI: Clean unused pcibios_add_bus() and pcibios_remove_bus()
> >   PCI/MSI: Remove useless bus->msi assignment
> > 
> >  arch/arm/include/asm/mach/pci.h     |   10 +++++---
> >  arch/arm/kernel/bios32.c            |   28 ++++++++++--------------
> >  drivers/irqchip/irq-armada-370-xp.c |   22 +++++++++---------
> >  drivers/of/of_pci.c                 |   40 +++++++++++++++++-----------------
> >  drivers/pci/host/pci-keystone-dw.c  |    4 +-
> >  drivers/pci/host/pci-keystone.h     |    2 +-
> >  drivers/pci/host/pci-mvebu.c        |   14 ++++-------
> >  drivers/pci/host/pci-tegra.c        |   37 +++++++++++++-------------------
> >  drivers/pci/host/pcie-designware.c  |   25 +++++++--------------
> >  drivers/pci/host/pcie-designware.h  |    2 +-
> >  drivers/pci/host/pcie-rcar.c        |   37 +++++++++++++-------------------
> >  drivers/pci/host/pcie-xilinx.c      |   27 +++++++----------------
> >  drivers/pci/msi.c                   |   22 ++++++++++++++-----
> >  drivers/pci/probe.c                 |    1 -
> >  include/linux/msi.h                 |    6 ++--
> >  include/linux/of_pci.h              |   14 ++++++------
> >  include/linux/pci.h                 |    2 +-
> >  17 files changed, 132 insertions(+), 161 deletions(-)
> > 
> 
> Applied to pci/msi for v3.19, thanks.

This series is currently in the pci "next" branch, but the fact that there
are so many MSI-related changes from so many people makes me worry that
we're heading for a merge problem.

Here are the outstanding IRQ- and MSI-related things I've seen:

  Marc   10/25 [00/03] genirq: Add support for "split-EOI" irqchips
  Yijing 10/27 [00/10] Save MSI chip in pci_sys_data
  Yijing 10/27 [00/16] Use MSI controller framework to configure MSI/MSI-X
  Jiang  10/27 [Part1 v3 00/20] Prepare for enabling hierarchy irqdomain on x86
  Jiang  11/02 [v8 00/18] Enable support of IOAPIC hotplug on x86 platforms
  Jiang  11/06 [Part2 v5 00/31] Enable hierarchy irqdomian on x86 platforms
  Jiang  11/09 [Part3 v3 00/38] Enable hierarchy irqdomian on x86 platforms
  Marc   11/11 [00/15] arm64: PCI/MSI: GICv3 ITS support (stacked domain edition)
  Thomas 11/12 [00/16] genirq: Hierarchical irq domains and generic MSI interrupt code
  Jiang  11/15 [V2 00/09] Refine generic/PCI MSI irqodmian interfaces
  Marc   11/15 [00/02] Stacked domains and MSI improvements

PCI is only a minor participant, and I certainly don't have the expertise
to deal with all this, so I suspect that I should just drop these from the
PCI tree and let Thomas deal with them.  It seems like it would make more
sense to get all this stuff merged together in a single tree rather than
having some come via PCI and others come from via other trees.

Bjorn

Re: [PATCH 00/10] Save MSI chip in pci_sys_data

[Thomas Gleixner]

On Sun, 16 Nov 2014, Bjorn Helgaas wrote:
> On Tue, Nov 11, 2014 at 09:23:59PM -0700, Bjorn Helgaas wrote:
> > On Mon, Oct 27, 2014 at 03:48:37PM +0800, Yijing Wang wrote:
> > > Yijing Wang (10):
> > >   MSI: Rename msi_chip to msi_controller for better readability
> > >   PCI/MSI: Introduce weak pcibios_msi_controller()
> > >   arm/MSI: Save MSI controller in pci_sys_data
> > >   PCI: tegra: Save MSI controller in pci_sys_data
> > >   PCI: designware: Save MSI controller in pci_sys_data
> > >   PCI: rcar: Save MSI controller in pci_sys_data
> > >   PCI: mvebu: Save MSI controller in pci_sys_data
> > >   PCI: xilinx: Save MSI controller in pci_sys_data
> > >   arm/PCI: Clean unused pcibios_add_bus() and pcibios_remove_bus()
> > >   PCI/MSI: Remove useless bus->msi assignment
> > 
> > Applied to pci/msi for v3.19, thanks.
> 
> This series is currently in the pci "next" branch, but the fact that there
> are so many MSI-related changes from so many people makes me worry that
> we're heading for a merge problem.
> 
> Here are the outstanding IRQ- and MSI-related things I've seen:
> 
>   Marc   10/25 [00/03] genirq: Add support for "split-EOI" irqchips
>   Yijing 10/27 [00/10] Save MSI chip in pci_sys_data
>   Yijing 10/27 [00/16] Use MSI controller framework to configure MSI/MSI-X
>   Jiang  10/27 [Part1 v3 00/20] Prepare for enabling hierarchy irqdomain on x86
>   Jiang  11/02 [v8 00/18] Enable support of IOAPIC hotplug on x86 platforms
>   Jiang  11/06 [Part2 v5 00/31] Enable hierarchy irqdomian on x86 platforms
>   Jiang  11/09 [Part3 v3 00/38] Enable hierarchy irqdomian on x86 platforms
>   Marc   11/11 [00/15] arm64: PCI/MSI: GICv3 ITS support (stacked domain edition)
>   Thomas 11/12 [00/16] genirq: Hierarchical irq domains and generic MSI interrupt code
>   Jiang  11/15 [V2 00/09] Refine generic/PCI MSI irqodmian interfaces
>   Marc   11/15 [00/02] Stacked domains and MSI improvements
> 
> PCI is only a minor participant, and I certainly don't have the expertise
> to deal with all this, so I suspect that I should just drop these from the
> PCI tree and let Thomas deal with them.  It seems like it would make more
> sense to get all this stuff merged together in a single tree rather than
> having some come via PCI and others come from via other trees.

The simplest way to dead with it is that I pull in pci/msi (assuming
that it contains only the above) and base the rest of it on top, so I
can deal with the resulting conflicts. So you still can keep that in
your pile and no matter who sends the pull request first everything
will just fall in place.

Thanks,

	tglx

Re: [PATCH 00/10] Save MSI chip in pci_sys_data

[Bjorn Helgaas]

On Mon, Nov 17, 2014 at 2:38 AM, Thomas Gleixner <tglx@linutronix.de> wrote:
> On Sun, 16 Nov 2014, Bjorn Helgaas wrote:
>> On Tue, Nov 11, 2014 at 09:23:59PM -0700, Bjorn Helgaas wrote:
>> > On Mon, Oct 27, 2014 at 03:48:37PM +0800, Yijing Wang wrote:
>> > > Yijing Wang (10):
>> > >   MSI: Rename msi_chip to msi_controller for better readability
>> > >   PCI/MSI: Introduce weak pcibios_msi_controller()
>> > >   arm/MSI: Save MSI controller in pci_sys_data
>> > >   PCI: tegra: Save MSI controller in pci_sys_data
>> > >   PCI: designware: Save MSI controller in pci_sys_data
>> > >   PCI: rcar: Save MSI controller in pci_sys_data
>> > >   PCI: mvebu: Save MSI controller in pci_sys_data
>> > >   PCI: xilinx: Save MSI controller in pci_sys_data
>> > >   arm/PCI: Clean unused pcibios_add_bus() and pcibios_remove_bus()
>> > >   PCI/MSI: Remove useless bus->msi assignment
>> >
>> > Applied to pci/msi for v3.19, thanks.
>>
>> This series is currently in the pci "next" branch, but the fact that there
>> are so many MSI-related changes from so many people makes me worry that
>> we're heading for a merge problem.
>>
>> Here are the outstanding IRQ- and MSI-related things I've seen:
>>
>>   Marc   10/25 [00/03] genirq: Add support for "split-EOI" irqchips
>>   Yijing 10/27 [00/10] Save MSI chip in pci_sys_data
>>   Yijing 10/27 [00/16] Use MSI controller framework to configure MSI/MSI-X
>>   Jiang  10/27 [Part1 v3 00/20] Prepare for enabling hierarchy irqdomain on x86
>>   Jiang  11/02 [v8 00/18] Enable support of IOAPIC hotplug on x86 platforms
>>   Jiang  11/06 [Part2 v5 00/31] Enable hierarchy irqdomian on x86 platforms
>>   Jiang  11/09 [Part3 v3 00/38] Enable hierarchy irqdomian on x86 platforms
>>   Marc   11/11 [00/15] arm64: PCI/MSI: GICv3 ITS support (stacked domain edition)
>>   Thomas 11/12 [00/16] genirq: Hierarchical irq domains and generic MSI interrupt code
>>   Jiang  11/15 [V2 00/09] Refine generic/PCI MSI irqodmian interfaces
>>   Marc   11/15 [00/02] Stacked domains and MSI improvements
>>
>> PCI is only a minor participant, and I certainly don't have the expertise
>> to deal with all this, so I suspect that I should just drop these from the
>> PCI tree and let Thomas deal with them.  It seems like it would make more
>> sense to get all this stuff merged together in a single tree rather than
>> having some come via PCI and others come from via other trees.
>
> The simplest way to dead with it is that I pull in pci/msi (assuming
> that it contains only the above) and base the rest of it on top, so I
> can deal with the resulting conflicts. So you still can keep that in
> your pile and no matter who sends the pull request first everything
> will just fall in place.

In addition to the ("Save MSI chip in pci_sys_data") series, my
pci/msi branch contains these:

  f83386942702 s390/MSI: Use __msi_mask_irq() instead of default_msi_mask_irq()
  03f56e42d03e Revert "PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq()"
  38737d82f9f0 PCI/MSI: Add pci_msi_ignore_mask to prevent writes to
MSI/MSI-X Mask Bits

but I don't think it will hurt if you pull in those as well.

The bigger problem might be the first patch of the "Save MSI chip in
pci_sys_data", which renames "struct msi_chip" to "struct
msi_controller".  I asked Yijing to do that because I didn't think
"_chip" really conveyed any information.  I didn't know we were going
to have quite this many MSI-related patches to fix up.

So I'll just leave my pci/msi branch as-is for now.  If the rename is
too painful, let me know and I'll drop the branch and we can rework
the rest of the "Save MSI chip in pci_sys_data" series to match.

Bjorn

Re: [PATCH 00/10] Save MSI chip in pci_sys_data

[Thomas Gleixner]

On Mon, 17 Nov 2014, Bjorn Helgaas wrote:
> On Mon, Nov 17, 2014 at 2:38 AM, Thomas Gleixner <tglx@linutronix.de> wrote:
> > The simplest way to dead with it is that I pull in pci/msi (assuming
> > that it contains only the above) and base the rest of it on top, so I
> > can deal with the resulting conflicts. So you still can keep that in
> > your pile and no matter who sends the pull request first everything
> > will just fall in place.
> 
> In addition to the ("Save MSI chip in pci_sys_data") series, my
> pci/msi branch contains these:
> 
>   f83386942702 s390/MSI: Use __msi_mask_irq() instead of default_msi_mask_irq()
>   03f56e42d03e Revert "PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq()"
>   38737d82f9f0 PCI/MSI: Add pci_msi_ignore_mask to prevent writes to
> MSI/MSI-X Mask Bits
> 
> but I don't think it will hurt if you pull in those as well.

They are blessed by you, so I don't worry :)
 
> The bigger problem might be the first patch of the "Save MSI chip in
> pci_sys_data", which renames "struct msi_chip" to "struct
> msi_controller".  I asked Yijing to do that because I didn't think
> "_chip" really conveyed any information.  I didn't know we were going
> to have quite this many MSI-related patches to fix up.

Not a big deal at all. I pulled your branch and fixed up the pending
mess on top of it. Not a really big deal.
 
> So I'll just leave my pci/msi branch as-is for now.  If the rename is
> too painful, let me know and I'll drop the branch and we can rework
> the rest of the "Save MSI chip in pci_sys_data" series to match.

No, not a problem at all. If I can carry your branch and it is
immutable then I think we are fine.

The changes we have stashed on top of this which touch linux/msi.h and
pci/msi.c are at the end of this mail. But most of this is
selfcontained and wont hurt anything which does not enable the
required config options. The diffstat is:

 drivers/pci/msi.c   |  334 +++++++++++++++++++++++++++++++++++++++++-----------
 include/linux/msi.h |  158 +++++++++++++++++++++++-
 2 files changed, 422 insertions(+), 70 deletions(-)

Looks large, but it provides common infrastructure which allows ARM64
to implement MSI support w/o any of the gazillion weak arch
callbacks. Jiangs x86 work distangles the convoluted mess we have with
irq remapping etc. and we can have non PCI based MSI interrupts as a
bonus.

So I'm pretty happy with the outcome now. The stacked irqdomains
really worked out well so far. I don't think that the pci/msi.c side
will see much updates on that in the next weeks. Though based on that
we'll try to get rid of the whole weak arch_xxx in the long run, but
that's a different issue and nothing we need to worry about now.

I'm going to push out the current state of affairs soon and will ask
all involved folks to have a look on that. If I don't hear someone
crying murder I'm going to make the branch immutable and push it into
next so that ARM and x86 can follow up with their stuff which depends
on that whole endavour.

If you have updates to your pci/msi stuff before the merge window then
please let me know, so we can coordinate on the procedure.

Thanks,

	tglx
----
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 6e2ebe6efca5..d5fea9b18fef 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -19,6 +19,7 @@
 #include <linux/errno.h>
 #include <linux/io.h>
 #include <linux/slab.h>
+#include <linux/irqdomain.h>
 
 #include "pci.h"
 
@@ -27,6 +28,52 @@ int pci_msi_ignore_mask;
 
 #define msix_table_size(flags)	((flags & PCI_MSIX_FLAGS_QSIZE) + 1)
 
+#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
+static struct irq_domain *pci_msi_default_domain;
+static DEFINE_MUTEX(pci_msi_domain_lock);
+
+struct irq_domain * __weak arch_get_pci_msi_domain(struct pci_dev *dev)
+{
+	return pci_msi_default_domain;
+}
+
+static struct irq_domain *pci_msi_get_domain(struct pci_dev *dev)
+{
+	struct irq_domain *domain = NULL;
+
+	if (dev->bus->msi)
+		domain = dev->bus->msi->domain;
+	if (!domain)
+		domain = arch_get_pci_msi_domain(dev);
+
+	return domain;
+}
+
+static int pci_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+{
+	struct irq_domain *domain;
+
+	domain = pci_msi_get_domain(dev);
+	if (domain)
+		return pci_msi_domain_alloc_irqs(domain, dev, nvec, type);
+
+	return arch_setup_msi_irqs(dev, nvec, type);
+}
+
+static void pci_msi_teardown_msi_irqs(struct pci_dev *dev)
+{
+	struct irq_domain *domain;
+
+	domain = pci_msi_get_domain(dev);
+	if (domain)
+		pci_msi_domain_free_irqs(domain, dev);
+	else
+		arch_teardown_msi_irqs(dev);
+}
+#else
+#define pci_msi_setup_msi_irqs		arch_setup_msi_irqs
+#define pci_msi_teardown_msi_irqs	arch_teardown_msi_irqs
+#endif
 
 /* Arch hooks */
 
@@ -96,19 +143,13 @@ int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
  */
 void default_teardown_msi_irqs(struct pci_dev *dev)
 {
+	int i;
 	struct msi_desc *entry;
 
-	list_for_each_entry(entry, &dev->msi_list, list) {
-		int i, nvec;
-		if (entry->irq == 0)
-			continue;
-		if (entry->nvec_used)
-			nvec = entry->nvec_used;
-		else
-			nvec = 1 << entry->msi_attrib.multiple;
-		for (i = 0; i < nvec; i++)
-			arch_teardown_msi_irq(entry->irq + i);
-	}
+	list_for_each_entry(entry, &dev->msi_list, list)
+		if (entry->irq)
+			for (i = 0; i < entry->nvec_used; i++)
+				arch_teardown_msi_irq(entry->irq + i);
 }
 
 void __weak arch_teardown_msi_irqs(struct pci_dev *dev)
@@ -131,7 +172,7 @@ static void default_restore_msi_irq(struct pci_dev *dev, int irq)
 	}
 
 	if (entry)
-		__write_msi_msg(entry, &entry->msg);
+		__pci_write_msi_msg(entry, &entry->msg);
 }
 
 void __weak arch_restore_msi_irqs(struct pci_dev *dev)
@@ -249,12 +290,11 @@ void default_restore_msi_irqs(struct pci_dev *dev)
 {
 	struct msi_desc *entry;
 
-	list_for_each_entry(entry, &dev->msi_list, list) {
+	list_for_each_entry(entry, &dev->msi_list, list)
 		default_restore_msi_irq(dev, entry->irq);
-	}
 }
 
-void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
+void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
 {
 	BUG_ON(entry->dev->current_state != PCI_D0);
 
@@ -284,32 +324,7 @@ void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
 	}
 }
 
-void read_msi_msg(unsigned int irq, struct msi_msg *msg)
-{
-	struct msi_desc *entry = irq_get_msi_desc(irq);
-
-	__read_msi_msg(entry, msg);
-}
-
-void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
-{
-	/* Assert that the cache is valid, assuming that
-	 * valid messages are not all-zeroes. */
-	BUG_ON(!(entry->msg.address_hi | entry->msg.address_lo |
-		 entry->msg.data));
-
-	*msg = entry->msg;
-}
-
-void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
-{
-	struct msi_desc *entry = irq_get_msi_desc(irq);
-
-	__get_cached_msi_msg(entry, msg);
-}
-EXPORT_SYMBOL_GPL(get_cached_msi_msg);
-
-void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
+void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
 {
 	if (entry->dev->current_state != PCI_D0) {
 		/* Don't touch the hardware now */
@@ -346,34 +361,27 @@ void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
 	entry->msg = *msg;
 }
 
-void write_msi_msg(unsigned int irq, struct msi_msg *msg)
+void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg)
 {
 	struct msi_desc *entry = irq_get_msi_desc(irq);
 
-	__write_msi_msg(entry, msg);
+	__pci_write_msi_msg(entry, msg);
 }
-EXPORT_SYMBOL_GPL(write_msi_msg);
+EXPORT_SYMBOL_GPL(pci_write_msi_msg);
 
 static void free_msi_irqs(struct pci_dev *dev)
 {
 	struct msi_desc *entry, *tmp;
 	struct attribute **msi_attrs;
 	struct device_attribute *dev_attr;
-	int count = 0;
+	int i, count = 0;
 
-	list_for_each_entry(entry, &dev->msi_list, list) {
-		int i, nvec;
-		if (!entry->irq)
-			continue;
-		if (entry->nvec_used)
-			nvec = entry->nvec_used;
-		else
-			nvec = 1 << entry->msi_attrib.multiple;
-		for (i = 0; i < nvec; i++)
-			BUG_ON(irq_has_action(entry->irq + i));
-	}
+	list_for_each_entry(entry, &dev->msi_list, list)
+		if (entry->irq)
+			for (i = 0; i < entry->nvec_used; i++)
+				BUG_ON(irq_has_action(entry->irq + i));
 
-	arch_teardown_msi_irqs(dev);
+	pci_msi_teardown_msi_irqs(dev);
 
 	list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) {
 		if (entry->msi_attrib.is_msix) {
@@ -456,9 +464,8 @@ static void __pci_restore_msix_state(struct pci_dev *dev)
 				PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL);
 
 	arch_restore_msi_irqs(dev);
-	list_for_each_entry(entry, &dev->msi_list, list) {
+	list_for_each_entry(entry, &dev->msi_list, list)
 		msix_mask_irq(entry, entry->masked);
-	}
 
 	msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0);
 }
@@ -502,9 +509,8 @@ static int populate_msi_sysfs(struct pci_dev *pdev)
 	int count = 0;
 
 	/* Determine how many msi entries we have */
-	list_for_each_entry(entry, &pdev->msi_list, list) {
+	list_for_each_entry(entry, &pdev->msi_list, list)
 		++num_msi;
-	}
 	if (!num_msi)
 		return 0;
 
@@ -564,7 +570,7 @@ error_attrs:
 	return ret;
 }
 
-static struct msi_desc *msi_setup_entry(struct pci_dev *dev)
+static struct msi_desc *msi_setup_entry(struct pci_dev *dev, int nvec)
 {
 	u16 control;
 	struct msi_desc *entry;
@@ -582,6 +588,8 @@ static struct msi_desc *msi_setup_entry(struct pci_dev *dev)
 	entry->msi_attrib.maskbit	= !!(control & PCI_MSI_FLAGS_MASKBIT);
 	entry->msi_attrib.default_irq	= dev->irq;	/* Save IOAPIC IRQ */
 	entry->msi_attrib.multi_cap	= (control & PCI_MSI_FLAGS_QMASK) >> 1;
+	entry->msi_attrib.multiple	= ilog2(__roundup_pow_of_two(nvec));
+	entry->nvec_used		= nvec;
 
 	if (control & PCI_MSI_FLAGS_64BIT)
 		entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
@@ -614,7 +622,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec)
 
 	msi_set_enable(dev, 0);	/* Disable MSI during set up */
 
-	entry = msi_setup_entry(dev);
+	entry = msi_setup_entry(dev, nvec);
 	if (!entry)
 		return -ENOMEM;
 
@@ -625,7 +633,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec)
 	list_add_tail(&entry->list, &dev->msi_list);
 
 	/* Configure MSI capability structure */
-	ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI);
+	ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI);
 	if (ret) {
 		msi_mask_irq(entry, mask, ~mask);
 		free_msi_irqs(dev);
@@ -685,6 +693,7 @@ static int msix_setup_entries(struct pci_dev *dev, void __iomem *base,
 		entry->msi_attrib.entry_nr	= entries[i].entry;
 		entry->msi_attrib.default_irq	= dev->irq;
 		entry->mask_base		= base;
+		entry->nvec_used		= 1;
 
 		list_add_tail(&entry->list, &dev->msi_list);
 	}
@@ -703,7 +712,6 @@ static void msix_program_entries(struct pci_dev *dev,
 						PCI_MSIX_ENTRY_VECTOR_CTRL;
 
 		entries[i].vector = entry->irq;
-		irq_set_msi_desc(entry->irq, entry);
 		entry->masked = readl(entry->mask_base + offset);
 		msix_mask_irq(entry, 1);
 		i++;
@@ -740,7 +748,7 @@ static int msix_capability_init(struct pci_dev *dev,
 	if (ret)
 		return ret;
 
-	ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
+	ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
 	if (ret)
 		goto out_avail;
 
@@ -1117,3 +1125,197 @@ int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
 	return nvec;
 }
 EXPORT_SYMBOL(pci_enable_msix_range);
+
+#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
+/**
+ * pci_msi_domain_write_msg - Helper to write MSI message to PCI config space
+ * @irq_data:	Pointer to interrupt data of the MSI interrupt
+ * @msg:	Pointer to the message
+ */
+void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg)
+{
+	struct msi_desc *desc = irq_data->msi_desc;
+
+	/*
+	 * For MSI-X desc->irq is always equal to irq_data->irq. For
+	 * MSI only the first interrupt of MULTI MSI passes the test.
+	 */
+	if (desc->irq == irq_data->irq)
+		__pci_write_msi_msg(desc, msg);
+}
+
+/**
+ * pci_msi_domain_calc_hwirq - Generate a unique ID for an MSI source
+ * @dev:	Pointer to the PCI device
+ * @desc:	Pointer to the msi descriptor
+ *
+ * The ID number is only used within the irqdomain.
+ */
+irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
+					  struct msi_desc *desc)
+{
+	return (irq_hw_number_t)desc->msi_attrib.entry_nr |
+		PCI_DEVID(dev->bus->number, dev->devfn) << 11 |
+		(pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27;
+}
+
+static inline bool pci_msi_desc_is_multi_msi(struct msi_desc *desc)
+{
+	return !desc->msi_attrib.is_msix && desc->nvec_used > 1;
+}
+
+/**
+ * pci_msi_domain_check_cap - Verify that @domain supports the capabilities for @dev
+ * @domain:	The interrupt domain to check
+ * @info:	The domain info for verification
+ * @dev:	The device to check
+ *
+ * Returns:
+ *  0 if the functionality is supported
+ *  1 if Multi MSI is requested, but the domain does not support it
+ *  -ENOTSUPP otherwise
+ */
+int pci_msi_domain_check_cap(struct irq_domain *domain,
+			     struct msi_domain_info *info, struct device *dev)
+{
+	struct msi_desc *desc = first_pci_msi_entry(to_pci_dev(dev));
+
+	/* Special handling to support pci_enable_msi_range() */
+	if (pci_msi_desc_is_multi_msi(desc) &&
+	    !(info->flags & MSI_FLAG_MULTI_PCI_MSI))
+		return 1;
+	else if (desc->msi_attrib.is_msix && !(info->flags & MSI_FLAG_PCI_MSIX))
+		return -ENOTSUPP;
+
+	return 0;
+}
+
+static int pci_msi_domain_handle_error(struct irq_domain *domain,
+				       struct msi_desc *desc, int error)
+{
+	/* Special handling to support pci_enable_msi_range() */
+	if (pci_msi_desc_is_multi_msi(desc) && error == -ENOSPC)
+		return 1;
+
+	return error;
+}
+
+#ifdef GENERIC_MSI_DOMAIN_OPS
+static void pci_msi_domain_set_desc(msi_alloc_info_t *arg,
+				    struct msi_desc *desc)
+{
+	arg->desc = desc;
+	arg->hwirq = pci_msi_domain_calc_hwirq(msi_desc_to_pci_dev(desc),
+					       desc);
+}
+#else
+#define pci_msi_domain_set_desc		NULL
+#endif
+
+static struct msi_domain_ops pci_msi_domain_ops_default = {
+	.set_desc	= pci_msi_domain_set_desc,
+	.msi_check	= pci_msi_domain_check_cap,
+	.handle_error	= pci_msi_domain_handle_error,
+};
+
+static void pci_msi_domain_update_dom_ops(struct msi_domain_info *info)
+{
+	struct msi_domain_ops *ops = info->ops;
+
+	if (ops == NULL) {
+		info->ops = &pci_msi_domain_ops_default;
+	} else {
+		if (ops->set_desc == NULL)
+			ops->set_desc = pci_msi_domain_set_desc;
+		if (ops->msi_check == NULL)
+			ops->msi_check = pci_msi_domain_check_cap;
+		if (ops->handle_error == NULL)
+			ops->handle_error = pci_msi_domain_handle_error;
+	}
+}
+
+static void pci_msi_domain_update_chip_ops(struct msi_domain_info *info)
+{
+	struct irq_chip *chip = info->chip;
+
+	BUG_ON(!chip);
+	if (!chip->irq_write_msi_msg)
+		chip->irq_write_msi_msg = pci_msi_domain_write_msg;
+}
+
+/**
+ * pci_msi_create_irq_domain - Creat a MSI interrupt domain
+ * @node:	Optional device-tree node of the interrupt controller
+ * @info:	MSI domain info
+ * @parent:	Parent irq domain
+ *
+ * Updates the domain and chip ops and creates a MSI interrupt domain.
+ *
+ * Returns:
+ * A domain pointer or NULL in case of failure.
+ */
+struct irq_domain *pci_msi_create_irq_domain(struct device_node *node,
+					     struct msi_domain_info *info,
+					     struct irq_domain *parent)
+{
+	if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
+		pci_msi_domain_update_dom_ops(info);
+	if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
+		pci_msi_domain_update_chip_ops(info);
+
+	return msi_create_irq_domain(node, info, parent);
+}
+
+/**
+ * pci_msi_domain_alloc_irqs - Allocate interrupts for @dev in @domain
+ * @domain:	The interrupt domain to allocate from
+ * @dev:	The device for which to allocate
+ * @nvec:	The number of interrupts to allocate
+ * @type:	Unused to allow simpler migration from the arch_XXX interfaces
+ *
+ * Returns:
+ * A virtual interrupt number or an error code in case of failure
+ */
+int pci_msi_domain_alloc_irqs(struct irq_domain *domain, struct pci_dev *dev,
+			      int nvec, int type)
+{
+	return msi_domain_alloc_irqs(domain, &dev->dev, nvec);
+}
+
+/**
+ * pci_msi_domain_free_irqs - Free interrupts for @dev in @domain
+ * @domain:	The interrupt domain
+ * @dev:	The device for which to free interrupts
+ */
+void pci_msi_domain_free_irqs(struct irq_domain *domain, struct pci_dev *dev)
+{
+	msi_domain_free_irqs(domain, &dev->dev);
+}
+
+/**
+ * pci_msi_create_default_irq_domain - Create a default MSI interrupt domain
+ * @node:	Optional device-tree node of the interrupt controller
+ * @info:	MSI domain info
+ * @parent:	Parent irq domain
+ *
+ * Returns: A domain pointer or NULL in case of failure. If successful
+ * the default PCI/MSI irqdomain pointer is updated.
+ */
+struct irq_domain *pci_msi_create_default_irq_domain(struct device_node *node,
+		struct msi_domain_info *info, struct irq_domain *parent)
+{
+	struct irq_domain *domain;
+
+	mutex_lock(&pci_msi_domain_lock);
+	if (pci_msi_default_domain) {
+		pr_err("PCI: default irq domain for PCI MSI has already been created.\n");
+		domain = NULL;
+	} else {
+		domain = pci_msi_create_irq_domain(node, info, parent);
+		pci_msi_default_domain = domain;
+	}
+	mutex_unlock(&pci_msi_domain_lock);
+
+	return domain;
+}
+#endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */
diff --git a/include/linux/msi.h b/include/linux/msi.h
index 6704991b0174..ead5a791f065 100644
--- a/include/linux/msi.h
+++ b/include/linux/msi.h
@@ -16,12 +16,9 @@ struct irq_data;
 struct msi_desc;
 void mask_msi_irq(struct irq_data *data);
 void unmask_msi_irq(struct irq_data *data);
-void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
 void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
-void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
-void read_msi_msg(unsigned int irq, struct msi_msg *msg);
 void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
-void write_msi_msg(unsigned int irq, struct msi_msg *msg);
+
 u32 __msix_mask_irq(struct msi_desc *desc, u32 flag);
 u32 __msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag);
 
@@ -51,6 +48,33 @@ struct msi_desc {
 	struct msi_msg msg;
 };
 
+/* Helpers to hide struct msi_desc implementation details */
+#define msi_desc_to_dev(desc)		(&(desc)->dev.dev)
+#define dev_to_msi_list(dev)		(&to_pci_dev((dev))->msi_list)
+#define first_msi_entry(dev)		\
+	list_first_entry(dev_to_msi_list((dev)), struct msi_desc, list)
+#define for_each_msi_entry(desc, dev)	\
+	list_for_each_entry((desc), dev_to_msi_list((dev)), list)
+
+#ifdef CONFIG_PCI_MSI
+#define first_pci_msi_entry(pdev)	first_msi_entry(&(pdev)->dev)
+#define for_each_pci_msi_entry(desc, pdev)	\
+	for_each_msi_entry((desc), &(pdev)->dev)
+
+static inline struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc)
+{
+	return desc->dev;
+}
+#endif /* CONFIG_PCI_MSI */
+
+void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
+void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
+void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg);
+
+/* Conversion helpers. Should be removed after merging */
+#define __write_msi_msg __pci_write_msi_msg
+#define write_msi_msg pci_write_msi_msg
+
 /*
  * The arch hooks to setup up msi irqs. Those functions are
  * implemented as weak symbols so that they /can/ be overriden by
@@ -70,10 +94,136 @@ struct msi_controller {
 	struct device *dev;
 	struct device_node *of_node;
 	struct list_head list;
+#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
+	struct irq_domain *domain;
+#endif
 
 	int (*setup_irq)(struct msi_controller *chip, struct pci_dev *dev,
 			 struct msi_desc *desc);
 	void (*teardown_irq)(struct msi_controller *chip, unsigned int irq);
 };
 
+#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
+
+#include <linux/irqhandler.h>
+#include <asm/msi.h>
+
+struct irq_domain;
+struct irq_chip;
+struct device_node;
+struct msi_domain_info;
+
+/**
+ * struct msi_domain_ops - MSI interrupt domain callbacks
+ * @get_hwirq:		Retrieve the resulting hw irq number
+ * @msi_init:		Domain specific init function for MSI interrupts
+ * @msi_free:		Domain specific function to free a MSI interrupts
+ * @msi_check:		Callback for verification of the domain/info/dev data
+ * @msi_prepare:	Prepare the allocation of the interrupts in the domain
+ * @msi_finish:		Optional callbacl to finalize the allocation
+ * @set_desc:		Set the msi descriptor for an interrupt
+ * @handle_error:	Optional error handler if the allocation fails
+ *
+ * @get_hwirq, @msi_init and @msi_free are callbacks used by
+ * msi_create_irq_domain() and related interfaces
+ *
+ * @msi_check, @msi_prepare, @msi_finish, @set_desc and @handle_error
+ * are callbacks used by msi_irq_domain_alloc_irqs() and related
+ * interfaces which are based on msi_desc.
+ */
+struct msi_domain_ops {
+	irq_hw_number_t	(*get_hwirq)(struct msi_domain_info *info,
+				     msi_alloc_info_t *arg);
+	int		(*msi_init)(struct irq_domain *domain,
+				    struct msi_domain_info *info,
+				    unsigned int virq, irq_hw_number_t hwirq,
+				    msi_alloc_info_t *arg);
+	void		(*msi_free)(struct irq_domain *domain,
+				    struct msi_domain_info *info,
+				    unsigned int virq);
+	int		(*msi_check)(struct irq_domain *domain,
+				     struct msi_domain_info *info,
+				     struct device *dev);
+	int		(*msi_prepare)(struct irq_domain *domain,
+				       struct device *dev, int nvec,
+				       msi_alloc_info_t *arg);
+	void		(*msi_finish)(msi_alloc_info_t *arg, int retval);
+	void		(*set_desc)(msi_alloc_info_t *arg,
+				    struct msi_desc *desc);
+	int		(*handle_error)(struct irq_domain *domain,
+					struct msi_desc *desc, int error);
+};
+
+/**
+ * struct msi_domain_info - MSI interrupt domain data
+ * @flags:		Flags to decribe features and capabilities
+ * @ops:		The callback data structure
+ * @chip:		Optional: associated interrupt chip
+ * @chip_data:		Optional: associated interrupt chip data
+ * @handler:		Optional: associated interrupt flow handler
+ * @handler_data:	Optional: associated interrupt flow handler data
+ * @handler_name:	Optional: associated interrupt flow handler name
+ * @data:		Optional: domain specific data
+ */
+struct msi_domain_info {
+	u32			flags;
+	struct msi_domain_ops	*ops;
+	struct irq_chip		*chip;
+	void			*chip_data;
+	irq_flow_handler_t	handler;
+	void			*handler_data;
+	const char		*handler_name;
+	void			*data;
+};
+
+/* Flags for msi_domain_info */
+enum {
+	/*
+	 * Init non implemented ops callbacks with default MSI domain
+	 * callbacks.
+	 */
+	MSI_FLAG_USE_DEF_DOM_OPS	= (1 << 0),
+	/*
+	 * Init non implemented chip callbacks with default MSI chip
+	 * callbacks.
+	 */
+	MSI_FLAG_USE_DEF_CHIP_OPS	= (1 << 1),
+	/* Build identity map between hwirq and irq */
+	MSI_FLAG_IDENTITY_MAP		= (1 << 2),
+	/* Support multiple PCI MSI interrupts */
+	MSI_FLAG_MULTI_PCI_MSI		= (1 << 3),
+	/* Support PCI MSIX interrupts */
+	MSI_FLAG_PCI_MSIX		= (1 << 4),
+};
+
+int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask,
+			    bool force);
+
+struct irq_domain *msi_create_irq_domain(struct device_node *of_node,
+					 struct msi_domain_info *info,
+					 struct irq_domain *parent);
+int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
+			  int nvec);
+void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
+struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain);
+
+#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
+
+#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
+void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg);
+struct irq_domain *pci_msi_create_irq_domain(struct device_node *node,
+					     struct msi_domain_info *info,
+					     struct irq_domain *parent);
+int pci_msi_domain_alloc_irqs(struct irq_domain *domain, struct pci_dev *dev,
+			      int nvec, int type);
+void pci_msi_domain_free_irqs(struct irq_domain *domain, struct pci_dev *dev);
+struct irq_domain *pci_msi_create_default_irq_domain(struct device_node *node,
+		 struct msi_domain_info *info, struct irq_domain *parent);
+
+irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
+					  struct msi_desc *desc);
+int pci_msi_domain_check_cap(struct irq_domain *domain,
+			     struct msi_domain_info *info, struct device *dev);
+#endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */
+
 #endif /* LINUX_MSI_H */

Re: [PATCH 00/10] Save MSI chip in pci_sys_data

[Bjorn Helgaas]

On Mon, Nov 17, 2014 at 2:02 PM, Thomas Gleixner <tglx@linutronix.de> wrote:
> On Mon, 17 Nov 2014, Bjorn Helgaas wrote:
>> On Mon, Nov 17, 2014 at 2:38 AM, Thomas Gleixner <tglx@linutronix.de> wrote:
>> > The simplest way to dead with it is that I pull in pci/msi (assuming
>> > that it contains only the above) and base the rest of it on top, so I
>> > can deal with the resulting conflicts. So you still can keep that in
>> > your pile and no matter who sends the pull request first everything
>> > will just fall in place.
>>
>> In addition to the ("Save MSI chip in pci_sys_data") series, my
>> pci/msi branch contains these:
>>
>>   f83386942702 s390/MSI: Use __msi_mask_irq() instead of default_msi_mask_irq()
>>   03f56e42d03e Revert "PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq()"
>>   38737d82f9f0 PCI/MSI: Add pci_msi_ignore_mask to prevent writes to
>> MSI/MSI-X Mask Bits
>>
>> but I don't think it will hurt if you pull in those as well.
>
> They are blessed by you, so I don't worry :)
>
>> The bigger problem might be the first patch of the "Save MSI chip in
>> pci_sys_data", which renames "struct msi_chip" to "struct
>> msi_controller".  I asked Yijing to do that because I didn't think
>> "_chip" really conveyed any information.  I didn't know we were going
>> to have quite this many MSI-related patches to fix up.
>
> Not a big deal at all. I pulled your branch and fixed up the pending
> mess on top of it. Not a really big deal.
>
>> So I'll just leave my pci/msi branch as-is for now.  If the rename is
>> too painful, let me know and I'll drop the branch and we can rework
>> the rest of the "Save MSI chip in pci_sys_data" series to match.
>
> No, not a problem at all. If I can carry your branch and it is
> immutable then I think we are fine.
>
> The changes we have stashed on top of this which touch linux/msi.h and
> pci/msi.c are at the end of this mail. But most of this is
> selfcontained and wont hurt anything which does not enable the
> required config options. The diffstat is:
>
>  drivers/pci/msi.c   |  334 +++++++++++++++++++++++++++++++++++++++++-----------
>  include/linux/msi.h |  158 +++++++++++++++++++++++-
>  2 files changed, 422 insertions(+), 70 deletions(-)
>
> Looks large, but it provides common infrastructure which allows ARM64
> to implement MSI support w/o any of the gazillion weak arch
> callbacks. Jiangs x86 work distangles the convoluted mess we have with
> irq remapping etc. and we can have non PCI based MSI interrupts as a
> bonus.
>
> So I'm pretty happy with the outcome now. The stacked irqdomains
> really worked out well so far. I don't think that the pci/msi.c side
> will see much updates on that in the next weeks. Though based on that
> we'll try to get rid of the whole weak arch_xxx in the long run, but
> that's a different issue and nothing we need to worry about now.
>
> I'm going to push out the current state of affairs soon and will ask
> all involved folks to have a look on that. If I don't hear someone
> crying murder I'm going to make the branch immutable and push it into
> next so that ARM and x86 can follow up with their stuff which depends
> on that whole endavour.
>
> If you have updates to your pci/msi stuff before the merge window then
> please let me know, so we can coordinate on the procedure.

Super.  Thank you very much for taking care of this; it's a big weight
off my mind.

You can add my Acked-by to these patches if you want it.  I would
suggest a minor comment expansion here, just because the code *looks
like* it's setting up something to match a hardware device:

> +/**
> + * pci_msi_domain_calc_hwirq - Generate a unique ID for an MSI source
> + * @dev:       Pointer to the PCI device
> + * @desc:      Pointer to the msi descriptor
> + *
> + * The ID number is only used within the irqdomain.

Maybe include something like:

  This "irq_hw_number_t" is an opaque identifier used only by the
irqdomain code.
  It does not correspond to any hardware implementation or register encoding.

Bjorn

Re: [PATCH 00/10] Save MSI chip in pci_sys_data

[Thomas Gleixner]

On Mon, 17 Nov 2014, Bjorn Helgaas wrote:
> Super.  Thank you very much for taking care of this; it's a big weight
> off my mind.
> 
> You can add my Acked-by to these patches if you want it.  I would
> suggest a minor comment expansion here, just because the code *looks
> like* it's setting up something to match a hardware device:
> 
> > +/**
> > + * pci_msi_domain_calc_hwirq - Generate a unique ID for an MSI source
> > + * @dev:       Pointer to the PCI device
> > + * @desc:      Pointer to the msi descriptor
> > + *
> > + * The ID number is only used within the irqdomain.
> 
> Maybe include something like:
> 
>   This "irq_hw_number_t" is an opaque identifier used only by the
> irqdomain code.
>   It does not correspond to any hardware implementation or register encoding.

Yes, that's really a way better description of it.

Thanks for having a look!

       tglx

Re: [PATCH 00/10] Save MSI chip in pci_sys_data

[Marc Zyngier]

On Mon, Nov 17 2014 at  9:02:46 pm GMT, Thomas Gleixner <tglx@linutronix.de> wrote:
> On Mon, 17 Nov 2014, Bjorn Helgaas wrote:
>> On Mon, Nov 17, 2014 at 2:38 AM, Thomas Gleixner <tglx@linutronix.de> wrote:
>> > The simplest way to dead with it is that I pull in pci/msi (assuming
>> > that it contains only the above) and base the rest of it on top, so I
>> > can deal with the resulting conflicts. So you still can keep that in
>> > your pile and no matter who sends the pull request first everything
>> > will just fall in place.
>>
>> In addition to the ("Save MSI chip in pci_sys_data") series, my
>> pci/msi branch contains these:
>>
>>   f83386942702 s390/MSI: Use __msi_mask_irq() instead of default_msi_mask_irq()
>>   03f56e42d03e Revert "PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq()"
>>   38737d82f9f0 PCI/MSI: Add pci_msi_ignore_mask to prevent writes to
>> MSI/MSI-X Mask Bits
>>
>> but I don't think it will hurt if you pull in those as well.
>
> They are blessed by you, so I don't worry :)
>
>> The bigger problem might be the first patch of the "Save MSI chip in
>> pci_sys_data", which renames "struct msi_chip" to "struct
>> msi_controller".  I asked Yijing to do that because I didn't think
>> "_chip" really conveyed any information.  I didn't know we were going
>> to have quite this many MSI-related patches to fix up.
>
> Not a big deal at all. I pulled your branch and fixed up the pending
> mess on top of it. Not a really big deal.
>
>> So I'll just leave my pci/msi branch as-is for now.  If the rename is
>> too painful, let me know and I'll drop the branch and we can rework
>> the rest of the "Save MSI chip in pci_sys_data" series to match.
>
> No, not a problem at all. If I can carry your branch and it is
> immutable then I think we are fine.
>
> The changes we have stashed on top of this which touch linux/msi.h and
> pci/msi.c are at the end of this mail. But most of this is
> selfcontained and wont hurt anything which does not enable the
> required config options. The diffstat is:
>
>  drivers/pci/msi.c   |  334 +++++++++++++++++++++++++++++++++++++++++-----------
>  include/linux/msi.h |  158 +++++++++++++++++++++++-
>  2 files changed, 422 insertions(+), 70 deletions(-)
>
> Looks large, but it provides common infrastructure which allows ARM64
> to implement MSI support w/o any of the gazillion weak arch
> callbacks. Jiangs x86 work distangles the convoluted mess we have with
> irq remapping etc. and we can have non PCI based MSI interrupts as a
> bonus.
>
> So I'm pretty happy with the outcome now. The stacked irqdomains
> really worked out well so far. I don't think that the pci/msi.c side
> will see much updates on that in the next weeks. Though based on that
> we'll try to get rid of the whole weak arch_xxx in the long run, but
> that's a different issue and nothing we need to worry about now.
>
> I'm going to push out the current state of affairs soon and will ask
> all involved folks to have a look on that. If I don't hear someone
> crying murder I'm going to make the branch immutable and push it into
> next so that ARM and x86 can follow up with their stuff which depends
> on that whole endavour.

I rebased my ITS series on top of this, and gave it a good
shake. Nothing fell out, so I'm inclined to say it is perfect.

I'll post the updated series for everyone's enjoyment...

Thanks for having put all that together!

	M.
-- 
Jazz is not dead. It just smells funny.

Re: [PATCH 00/10] Save MSI chip in pci_sys_data

[Bjorn Helgaas]

[+cc Marc]

On Tue, Nov 11, 2014 at 09:23:59PM -0700, Bjorn Helgaas wrote:
> On Mon, Oct 27, 2014 at 03:48:37PM +0800, Yijing Wang wrote:
> > Now PCI host bridge drivers in arm associate MSI chip and
> > PCI bus by adding .add_bus(), and assign MSI chip pointer
> > to every PCI bus. Associating MSI chip and every PCI bus
> > is not necessary. All PCI busses under same PCI host brdige
> > share the same MSI chip. So saving MSI chip in pci_sys_data
> > is a better solution, it make PCI host bridge drivers clean.
> > Because we still need to provide arch spec pcibios_msi_controller()
> > to extract MSI controller pointer, a better solution is to
> > refactor PCI host bridge, make a generic pci_host_bridge, and
> > save common info like PCI domain number, MSI chip, resources
> > in it. We will do that work in another series as soon.
> > 
> > To Bjorn: Because struct msi_chip defined in struct hw_pci and pci_sys_data
> > is under the #ifdef CONFIG_PCI_MSI, if we use if(IS_ENABLED(CONFIG_PCI_MSI))
> > in PCI host bridge drivers, it will cause build errors when the CONFIG_PCI_MSI
> > is off. So I keep #ifdef CONFIG_PCI_MSI in this series.
> > 
> > Yijing Wang (10):
> >   MSI: Rename msi_chip to msi_controller for better readability
> >   PCI/MSI: Introduce weak pcibios_msi_controller()
> >   arm/MSI: Save MSI controller in pci_sys_data
> >   PCI: tegra: Save MSI controller in pci_sys_data
> >   PCI: designware: Save MSI controller in pci_sys_data
> >   PCI: rcar: Save MSI controller in pci_sys_data
> >   PCI: mvebu: Save MSI controller in pci_sys_data
> >   PCI: xilinx: Save MSI controller in pci_sys_data
> >   arm/PCI: Clean unused pcibios_add_bus() and pcibios_remove_bus()
> >   PCI/MSI: Remove useless bus->msi assignment
> > 
> >  arch/arm/include/asm/mach/pci.h     |   10 +++++---
> >  arch/arm/kernel/bios32.c            |   28 ++++++++++--------------
> >  drivers/irqchip/irq-armada-370-xp.c |   22 +++++++++---------
> >  drivers/of/of_pci.c                 |   40 +++++++++++++++++-----------------
> >  drivers/pci/host/pci-keystone-dw.c  |    4 +-
> >  drivers/pci/host/pci-keystone.h     |    2 +-
> >  drivers/pci/host/pci-mvebu.c        |   14 ++++-------
> >  drivers/pci/host/pci-tegra.c        |   37 +++++++++++++-------------------
> >  drivers/pci/host/pcie-designware.c  |   25 +++++++--------------
> >  drivers/pci/host/pcie-designware.h  |    2 +-
> >  drivers/pci/host/pcie-rcar.c        |   37 +++++++++++++-------------------
> >  drivers/pci/host/pcie-xilinx.c      |   27 +++++++----------------
> >  drivers/pci/msi.c                   |   22 ++++++++++++++-----
> >  drivers/pci/probe.c                 |    1 -
> >  include/linux/msi.h                 |    6 ++--
> >  include/linux/of_pci.h              |   14 ++++++------
> >  include/linux/pci.h                 |    2 +-
> >  17 files changed, 132 insertions(+), 161 deletions(-)
> > 
> 
> Applied to pci/msi for v3.19, thanks.

I reworked this series slightly to:

  - Change pci_msi_controller() and pcibios_msi_controller() from taking a
    pci_bus * to taking a pci_dev *.  This is so the interface allows
    per-device MSI controllers.  I don't think there's any reason to assume
    all devices on a bus have to have the same controller.

  - Drop the last patch ("PCI/MSI: Remove useless bus->msi assignment")
    because it broke Marc's follow-on patches.

I updated pci/msi, but I haven't put it in my "next" branch yet because I
want confirmation from Fengguang's autobuilder that I didn't break
anything.

Current status of my tree:

    6cf00af0ae15 [1] pci/msi (contains this rework)
    149792795d2b [2] next (does *not* contain this rework)

Thomas, if pci/msi looks good to you, feel free to pull it into your tree.
The only change you should need to make is to change the parameters to
pci_msi_controller() and pcibios_msi_controller().

Just FYI, I'm leaving on vacation for a week, so I won't be able to fix any
issues until Dec 1.

Bjorn

[1] https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/log/?h=next&id=6cf00af0ae15
[2] https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/log/?h=next&id=149792795d2b

Re: [PATCH 00/10] Save MSI chip in pci_sys_data

[Yijing Wang]

在 2014/11/22 1:20, Bjorn Helgaas 写道:
> [+cc Marc]
>
> On Tue, Nov 11, 2014 at 09:23:59PM -0700, Bjorn Helgaas wrote:
>> On Mon, Oct 27, 2014 at 03:48:37PM +0800, Yijing Wang wrote:
>>> Now PCI host bridge drivers in arm associate MSI chip and
>>> PCI bus by adding .add_bus(), and assign MSI chip pointer
>>> to every PCI bus. Associating MSI chip and every PCI bus
>>> is not necessary. All PCI busses under same PCI host brdige
>>> share the same MSI chip. So saving MSI chip in pci_sys_data
>>> is a better solution, it make PCI host bridge drivers clean.
>>> Because we still need to provide arch spec pcibios_msi_controller()
>>> to extract MSI controller pointer, a better solution is to
>>> refactor PCI host bridge, make a generic pci_host_bridge, and
>>> save common info like PCI domain number, MSI chip, resources
>>> in it. We will do that work in another series as soon.
>>>
>>> To Bjorn: Because struct msi_chip defined in struct hw_pci and pci_sys_data
>>> is under the #ifdef CONFIG_PCI_MSI, if we use if(IS_ENABLED(CONFIG_PCI_MSI))
>>> in PCI host bridge drivers, it will cause build errors when the CONFIG_PCI_MSI
>>> is off. So I keep #ifdef CONFIG_PCI_MSI in this series.
>>>
>>> Yijing Wang (10):
>>>    MSI: Rename msi_chip to msi_controller for better readability
>>>    PCI/MSI: Introduce weak pcibios_msi_controller()
>>>    arm/MSI: Save MSI controller in pci_sys_data
>>>    PCI: tegra: Save MSI controller in pci_sys_data
>>>    PCI: designware: Save MSI controller in pci_sys_data
>>>    PCI: rcar: Save MSI controller in pci_sys_data
>>>    PCI: mvebu: Save MSI controller in pci_sys_data
>>>    PCI: xilinx: Save MSI controller in pci_sys_data
>>>    arm/PCI: Clean unused pcibios_add_bus() and pcibios_remove_bus()
>>>    PCI/MSI: Remove useless bus->msi assignment
>>>
>>>   arch/arm/include/asm/mach/pci.h     |   10 +++++---
>>>   arch/arm/kernel/bios32.c            |   28 ++++++++++--------------
>>>   drivers/irqchip/irq-armada-370-xp.c |   22 +++++++++---------
>>>   drivers/of/of_pci.c                 |   40 +++++++++++++++++-----------------
>>>   drivers/pci/host/pci-keystone-dw.c  |    4 +-
>>>   drivers/pci/host/pci-keystone.h     |    2 +-
>>>   drivers/pci/host/pci-mvebu.c        |   14 ++++-------
>>>   drivers/pci/host/pci-tegra.c        |   37 +++++++++++++-------------------
>>>   drivers/pci/host/pcie-designware.c  |   25 +++++++--------------
>>>   drivers/pci/host/pcie-designware.h  |    2 +-
>>>   drivers/pci/host/pcie-rcar.c        |   37 +++++++++++++-------------------
>>>   drivers/pci/host/pcie-xilinx.c      |   27 +++++++----------------
>>>   drivers/pci/msi.c                   |   22 ++++++++++++++-----
>>>   drivers/pci/probe.c                 |    1 -
>>>   include/linux/msi.h                 |    6 ++--
>>>   include/linux/of_pci.h              |   14 ++++++------
>>>   include/linux/pci.h                 |    2 +-
>>>   17 files changed, 132 insertions(+), 161 deletions(-)
>>>
>> Applied to pci/msi for v3.19, thanks.
> I reworked this series slightly to:
>
>    - Change pci_msi_controller() and pcibios_msi_controller() from taking a
>      pci_bus * to taking a pci_dev *.  This is so the interface allows
>      per-device MSI controllers.  I don't think there's any reason to assume
>      all devices on a bus have to have the same controller.
>
>    - Drop the last patch ("PCI/MSI: Remove useless bus->msi assignment")
>      because it broke Marc's follow-on patches.
>
> I updated pci/msi, but I haven't put it in my "next" branch yet because I
> want confirmation from Fengguang's autobuilder that I didn't break
> anything.
>
> Current status of my tree:
>
>      6cf00af0ae15 [1] pci/msi (contains this rework)
>      149792795d2b [2] next (does *not* contain this rework)
>
> Thomas, if pci/msi looks good to you, feel free to pull it into your tree.
> The only change you should need to make is to change the parameters to
> pci_msi_controller() and pcibios_msi_controller().
>
> Just FYI, I'm leaving on vacation for a week, so I won't be able to fix any
> issues until Dec 1.

Hi Bjorn, thanks very much for your improvement for this series.
It looks good to me. :)

>
> Bjorn
>
> [1] https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/log/?h=next&id=6cf00af0ae15
> [2] https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/log/?h=next&id=149792795d2b
> --
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