linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Vidya Sagar <vidyas@nvidia.com>
To: <bhelgaas@google.com>, <robh+dt@kernel.org>,
	<mark.rutland@arm.com>, <thierry.reding@gmail.com>,
	<jonathanh@nvidia.com>, <kishon@ti.com>,
	<catalin.marinas@arm.com>, <will.deacon@arm.com>,
	<lorenzo.pieralisi@arm.com>, <jingoohan1@gmail.com>,
	<gustavo.pimentel@synopsys.com>, <mperttunen@nvidia.com>
Cc: <linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <kthota@nvidia.com>,
	<mmaddireddy@nvidia.com>, <vidyas@nvidia.com>,
	<sagar.tv@gmail.com>
Subject: [PATCH V2 03/16] PCI: Export pcie_bus_config symbol
Date: Fri, 5 Apr 2019 01:24:30 +0530	[thread overview]
Message-ID: <1554407683-31580-4-git-send-email-vidyas@nvidia.com> (raw)
In-Reply-To: <1554407683-31580-1-git-send-email-vidyas@nvidia.com>

Export pcie_bus_config to enable host controller drivers setting it to a
specific configuration be able to build as loadable modules

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
---
Changes since [v1]:
* This is a new patch in v2 series

 drivers/pci/pci.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 7c1b362f599a..c3880af24f18 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -94,6 +94,7 @@ unsigned long pci_hotplug_mem_size = DEFAULT_HOTPLUG_MEM_SIZE;
 unsigned long pci_hotplug_bus_size = DEFAULT_HOTPLUG_BUS_SIZE;
 
 enum pcie_bus_config_types pcie_bus_config = PCIE_BUS_DEFAULT;
+EXPORT_SYMBOL_GPL(pcie_bus_config);
 
 /*
  * The default CLS is used if arch didn't set CLS explicitly and not
-- 
2.7.4


  parent reply	other threads:[~2019-04-04 19:55 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-04 19:54 [PATCH V2 00/16] Add Tegra194 PCIe support Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 01/16] PCI: Add #defines for PCIe spec r4.0 features Vidya Sagar
2019-04-11 10:13   ` Thierry Reding
2019-04-16 13:15     ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 02/16] PCI/PME: Export pcie_pme_disable_msi() API Vidya Sagar
2019-04-11 10:16   ` Thierry Reding
2019-04-16 13:30     ` Vidya Sagar
2019-04-04 19:54 ` Vidya Sagar [this message]
2019-04-04 19:54 ` [PATCH V2 04/16] PCI: dwc: Perform dbi regs write lock towards the end Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 05/16] PCI: dwc: Move config space capability search API Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 06/16] PCI: dwc: Add ext " Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 07/16] dt-bindings: PCI: designware: Add binding for CDM register check Vidya Sagar
2019-04-15 14:54   ` Thierry Reding
2019-04-16 14:29     ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 08/16] PCI: dwc: Add support to enable " Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 09/16] Documentation/devicetree: Add PCIe supports-clkreq property Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 10/16] dt-bindings: PCI: tegra: Add device tree support for T194 Vidya Sagar
2019-04-15 15:08   ` Thierry Reding
2019-04-16 15:33     ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 11/16] dt-bindings: PHY: P2U: Add Tegra 194 P2U block Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 12/16] arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT Vidya Sagar
2019-04-15 15:15   ` Thierry Reding
2019-04-16 17:48     ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 13/16] arm64: tegra: Enable PCIe slots in P2972-0000 board Vidya Sagar
2019-04-15 15:12   ` Thierry Reding
2019-04-16 17:55     ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 14/16] phy: tegra: Add PCIe PIPE2UPHY support Vidya Sagar
2019-04-15 15:31   ` Thierry Reding
2019-04-15 15:33     ` Thierry Reding
2019-04-16 18:14     ` Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 15/16] PCI: tegra: Add Tegra194 PCIe support Vidya Sagar
2019-04-04 19:54 ` [PATCH V2 16/16] arm64: Add Tegra194 PCIe driver to defconfig Vidya Sagar

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1554407683-31580-4-git-send-email-vidyas@nvidia.com \
    --to=vidyas@nvidia.com \
    --cc=bhelgaas@google.com \
    --cc=catalin.marinas@arm.com \
    --cc=devicetree@vger.kernel.org \
    --cc=gustavo.pimentel@synopsys.com \
    --cc=jingoohan1@gmail.com \
    --cc=jonathanh@nvidia.com \
    --cc=kishon@ti.com \
    --cc=kthota@nvidia.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=mmaddireddy@nvidia.com \
    --cc=mperttunen@nvidia.com \
    --cc=robh+dt@kernel.org \
    --cc=sagar.tv@gmail.com \
    --cc=thierry.reding@gmail.com \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).