linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Andrey Smirnov <andrew.smirnov@gmail.com>
To: linux-pci@vger.kernel.org
Cc: Andrey Smirnov <andrew.smirnov@gmail.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Fabio Estevam <fabio.estevam@nxp.com>,
	Chris Healy <cphealy@gmail.com>,
	Lucas Stach <l.stach@pengutronix.de>,
	Leonard Crestez <leonard.crestez@nxp.com>,
	"A.s. Dong" <aisheng.dong@nxp.com>,
	Richard Zhu <hongxing.zhu@nxp.com>,
	linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v2 14/20] PCI: imx6: Restrict PHY register data to 16-bit
Date: Fri,  4 Jan 2019 09:49:19 -0800	[thread overview]
Message-ID: <20190104174925.17153-15-andrew.smirnov@gmail.com> (raw)
In-Reply-To: <20190104174925.17153-1-andrew.smirnov@gmail.com>

PHY registers on i.MX6 are 16-bit wide, so we can get rid of explicit
masking if we restrict pcie_phy_read/pcie_phy_write to use 'u16'
instead of 'int'. No functional change intended.

Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 2a7075a9cba6..02342b1762fa 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -169,10 +169,10 @@ static int pcie_phy_wait_ack(struct imx6_pcie *imx6_pcie, int addr)
 }
 
 /* Read from the 16-bit PCIe PHY control registers (not memory-mapped) */
-static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
+static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, u16 *data)
 {
 	struct dw_pcie *pci = imx6_pcie->pci;
-	u32 val, phy_ctl;
+	u32 phy_ctl;
 	int ret;
 
 	ret = pcie_phy_wait_ack(imx6_pcie, addr);
@@ -187,8 +187,7 @@ static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
 	if (ret)
 		return ret;
 
-	val = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT);
-	*data = val & 0xffff;
+	*data = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT);
 
 	/* deassert Read signal */
 	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, 0x00);
@@ -196,7 +195,7 @@ static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
 	return pcie_phy_poll_ack(imx6_pcie, 0);
 }
 
-static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
+static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, u16 data)
 {
 	struct dw_pcie *pci = imx6_pcie->pci;
 	u32 var;
@@ -253,7 +252,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
 
 static void imx6_pcie_reset_phy(struct imx6_pcie *imx6_pcie)
 {
-	u32 tmp;
+	u16 tmp;
 
 	if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY))
 		return;
@@ -620,7 +619,7 @@ static int imx6_setup_phy_mpll(struct imx6_pcie *imx6_pcie)
 {
 	unsigned long phy_rate = clk_get_rate(imx6_pcie->pcie_phy);
 	int mult, div;
-	u32 val;
+	u16 val;
 
 	if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY))
 		return 0;
-- 
2.20.1


  parent reply	other threads:[~2019-01-04 17:50 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 01/20] PCI: imx6: Simplify imx7d_pcie_wait_for_phy_pll_lock() Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 02/20] PCI: imx6: Remove redundant debug tracing Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 03/20] PCI: imx6: Return -ETIMEOUT from imx6_pcie_wait_for_speed_change() Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 04/20] PCI: imx6: Remove duplicate macro definitions Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 05/20] PCI: imx6: Remove PCIE_PL_PFLR_* constants Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 06/20] PCI: imx6: Remove PCIE_PHY_RX_ASIC_OUT* constants Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 07/20] PCI: dwc: Make use of IS_ALIGNED() Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 08/20] PCI: dwc: Share code for dw_pcie_rd/wr_other_conf() Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 09/20] PCI: dwc: imx6: Share PHY debug register definitions Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 10/20] PCI: dwc: Make use of BIT() in constant definitions Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 11/20] PCI: imx6: " Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 12/20] PCI: imx6: Simplify bit operations in PHY functions Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 13/20] PCI: imx6: Simplify pcie_phy_poll_ack() Andrey Smirnov
2019-01-04 17:49 ` Andrey Smirnov [this message]
2019-01-04 17:49 ` [PATCH v2 15/20] PCI: imx6: Pass data to dw_pcie_writel_dbi() directly Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 16/20] PCI: imx6: Use common mask in imx6_pcie_reset_phy() Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 17/20] PCI: imx6: Simplify bit operations in imx6_setup_phy_mpll() Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 18/20] PCI: imx6: Remove magic numbers from imx6_pcie_establish_link() Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 19/20] PCI: dwc: Make use of GENMASK/FIELD_PREP Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 20/20] PCI: dwc: Remove superfluous shifting in definitions Andrey Smirnov
2019-02-01 16:27 ` [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Lorenzo Pieralisi
2019-02-15  0:59   ` Andrey Smirnov
2019-02-15 10:13     ` Lorenzo Pieralisi
2019-02-19 12:22     ` Lorenzo Pieralisi
2019-02-19 19:47       ` Andrey Smirnov

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190104174925.17153-15-andrew.smirnov@gmail.com \
    --to=andrew.smirnov@gmail.com \
    --cc=aisheng.dong@nxp.com \
    --cc=bhelgaas@google.com \
    --cc=cphealy@gmail.com \
    --cc=fabio.estevam@nxp.com \
    --cc=hongxing.zhu@nxp.com \
    --cc=l.stach@pengutronix.de \
    --cc=leonard.crestez@nxp.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-imx@nxp.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).