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From: Andrey Smirnov <andrew.smirnov@gmail.com>
To: linux-pci@vger.kernel.org
Cc: Andrey Smirnov <andrew.smirnov@gmail.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Fabio Estevam <fabio.estevam@nxp.com>,
	Chris Healy <cphealy@gmail.com>,
	Lucas Stach <l.stach@pengutronix.de>,
	Leonard Crestez <leonard.crestez@nxp.com>,
	"A.s. Dong" <aisheng.dong@nxp.com>,
	Richard Zhu <hongxing.zhu@nxp.com>,
	linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Subject: [PATCH v2 19/20] PCI: dwc: Make use of GENMASK/FIELD_PREP
Date: Fri,  4 Jan 2019 09:49:24 -0800	[thread overview]
Message-ID: <20190104174925.17153-20-andrew.smirnov@gmail.com> (raw)
In-Reply-To: <20190104174925.17153-1-andrew.smirnov@gmail.com>

Convert various mult-bit fields to be defined using
GENMASK/FIELD_PREP. This way bit field boundaries are defined in a
single place only as well as defined in a way that makes it easier to
verify them against reference manual. No functional change intended.

Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/pci/controller/dwc/pcie-designware.h | 29 +++++++++++---------
 1 file changed, 16 insertions(+), 13 deletions(-)

diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 348e91b6daa2..0de653284fca 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -11,6 +11,7 @@
 #ifndef _PCIE_DESIGNWARE_H
 #define _PCIE_DESIGNWARE_H
 
+#include <linux/bitfield.h>
 #include <linux/dma-mapping.h>
 #include <linux/irq.h>
 #include <linux/msi.h>
@@ -30,11 +31,12 @@
 
 /* Synopsys-specific PCIe configuration registers */
 #define PCIE_PORT_LINK_CONTROL		0x710
-#define PORT_LINK_MODE_MASK		(0x3f << 16)
-#define PORT_LINK_MODE_1_LANES		(0x1 << 16)
-#define PORT_LINK_MODE_2_LANES		(0x3 << 16)
-#define PORT_LINK_MODE_4_LANES		(0x7 << 16)
-#define PORT_LINK_MODE_8_LANES		(0xf << 16)
+#define PORT_LINK_MODE_MASK		GENMASK(21, 16)
+#define PORT_LINK_MODE(n)		FIELD_PREP(PORT_LINK_MODE_MASK, n)
+#define PORT_LINK_MODE_1_LANES		PORT_LINK_MODE(0x1)
+#define PORT_LINK_MODE_2_LANES		PORT_LINK_MODE(0x3)
+#define PORT_LINK_MODE_4_LANES		PORT_LINK_MODE(0x7)
+#define PORT_LINK_MODE_8_LANES		PORT_LINK_MODE(0xf)
 
 #define PCIE_PORT_DEBUG0		0x728
 #define PORT_LOGIC_LTSSM_STATE_MASK	0x1f
@@ -45,11 +47,12 @@
 
 #define PCIE_LINK_WIDTH_SPEED_CONTROL	0x80C
 #define PORT_LOGIC_SPEED_CHANGE		BIT(17)
-#define PORT_LOGIC_LINK_WIDTH_MASK	(0x1f << 8)
-#define PORT_LOGIC_LINK_WIDTH_1_LANES	(0x1 << 8)
-#define PORT_LOGIC_LINK_WIDTH_2_LANES	(0x2 << 8)
-#define PORT_LOGIC_LINK_WIDTH_4_LANES	(0x4 << 8)
-#define PORT_LOGIC_LINK_WIDTH_8_LANES	(0x8 << 8)
+#define PORT_LOGIC_LINK_WIDTH_MASK	GENMASK(12, 8)
+#define PORT_LOGIC_LINK_WIDTH(n)	FIELD_PREP(PORT_LOGIC_LINK_WIDTH_MASK, n)
+#define PORT_LOGIC_LINK_WIDTH_1_LANES	PORT_LOGIC_LINK_WIDTH(0x1)
+#define PORT_LOGIC_LINK_WIDTH_2_LANES	PORT_LOGIC_LINK_WIDTH(0x2)
+#define PORT_LOGIC_LINK_WIDTH_4_LANES	PORT_LOGIC_LINK_WIDTH(0x4)
+#define PORT_LOGIC_LINK_WIDTH_8_LANES	PORT_LOGIC_LINK_WIDTH(0x8)
 
 #define PCIE_MSI_ADDR_LO		0x820
 #define PCIE_MSI_ADDR_HI		0x824
@@ -75,9 +78,9 @@
 #define PCIE_ATU_UPPER_BASE		0x910
 #define PCIE_ATU_LIMIT			0x914
 #define PCIE_ATU_LOWER_TARGET		0x918
-#define PCIE_ATU_BUS(x)			(((x) & 0xff) << 24)
-#define PCIE_ATU_DEV(x)			(((x) & 0x1f) << 19)
-#define PCIE_ATU_FUNC(x)		(((x) & 0x7) << 16)
+#define PCIE_ATU_BUS(x)			FIELD_PREP(GENMASK(31, 24), x)
+#define PCIE_ATU_DEV(x)			FIELD_PREP(GENMASK(23, 19), x)
+#define PCIE_ATU_FUNC(x)		FIELD_PREP(GENMASK(18, 16), x)
 #define PCIE_ATU_UPPER_TARGET		0x91C
 
 #define PCIE_MISC_CONTROL_1_OFF		0x8BC
-- 
2.20.1


  parent reply	other threads:[~2019-01-04 17:50 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 01/20] PCI: imx6: Simplify imx7d_pcie_wait_for_phy_pll_lock() Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 02/20] PCI: imx6: Remove redundant debug tracing Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 03/20] PCI: imx6: Return -ETIMEOUT from imx6_pcie_wait_for_speed_change() Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 04/20] PCI: imx6: Remove duplicate macro definitions Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 05/20] PCI: imx6: Remove PCIE_PL_PFLR_* constants Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 06/20] PCI: imx6: Remove PCIE_PHY_RX_ASIC_OUT* constants Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 07/20] PCI: dwc: Make use of IS_ALIGNED() Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 08/20] PCI: dwc: Share code for dw_pcie_rd/wr_other_conf() Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 09/20] PCI: dwc: imx6: Share PHY debug register definitions Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 10/20] PCI: dwc: Make use of BIT() in constant definitions Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 11/20] PCI: imx6: " Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 12/20] PCI: imx6: Simplify bit operations in PHY functions Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 13/20] PCI: imx6: Simplify pcie_phy_poll_ack() Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 14/20] PCI: imx6: Restrict PHY register data to 16-bit Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 15/20] PCI: imx6: Pass data to dw_pcie_writel_dbi() directly Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 16/20] PCI: imx6: Use common mask in imx6_pcie_reset_phy() Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 17/20] PCI: imx6: Simplify bit operations in imx6_setup_phy_mpll() Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 18/20] PCI: imx6: Remove magic numbers from imx6_pcie_establish_link() Andrey Smirnov
2019-01-04 17:49 ` Andrey Smirnov [this message]
2019-01-04 17:49 ` [PATCH v2 20/20] PCI: dwc: Remove superfluous shifting in definitions Andrey Smirnov
2019-02-01 16:27 ` [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Lorenzo Pieralisi
2019-02-15  0:59   ` Andrey Smirnov
2019-02-15 10:13     ` Lorenzo Pieralisi
2019-02-19 12:22     ` Lorenzo Pieralisi
2019-02-19 19:47       ` Andrey Smirnov

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