From: Bjorn Helgaas <helgaas@kernel.org>
To: daire.mcnamara@microchip.com
Cc: lorenzo.pieralisi@arm.com, bhelgaas@google.com, robh@kernel.org,
linux-pci@vger.kernel.org, robh+dt@kernel.org,
devicetree@vger.kernel.org, david.abdurachmanov@gmail.com,
cyril.jean@microchip.com, Marc Zyngier <maz@kernel.org>
Subject: Re: [PATCH v21 3/4] PCI: microchip: Add host driver for Microchip PCIe controller
Date: Thu, 27 Jan 2022 14:20:00 -0600 [thread overview]
Message-ID: <20220127202000.GA126335@bhelgaas> (raw)
In-Reply-To: <20210125162934.5335-4-daire.mcnamara@microchip.com>
[+cc Marc]
On Mon, Jan 25, 2021 at 04:29:33PM +0000, daire.mcnamara@microchip.com wrote:
> From: Daire McNamara <daire.mcnamara@microchip.com>
>
> Add support for the Microchip PolarFire PCIe controller when
> configured in host (Root Complex) mode.
> +static void mc_handle_msi(struct irq_desc *desc)
> +{
> + struct mc_port *port = irq_desc_get_handler_data(desc);
> + struct device *dev = port->dev;
> + struct mc_msi *msi = &port->msi;
> + void __iomem *bridge_base_addr = port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
> + unsigned long status;
> + u32 bit;
> + u32 virq;
> +
> + status = readl_relaxed(bridge_base_addr + ISTATUS_LOCAL);
> + if (status & PM_MSI_INT_MSI_MASK) {
> + status = readl_relaxed(bridge_base_addr + ISTATUS_MSI);
> + for_each_set_bit(bit, &status, msi->num_vectors) {
> + virq = irq_find_mapping(msi->dev_domain, bit);
> + if (virq)
> + generic_handle_irq(virq);
> + else
> + dev_err_ratelimited(dev, "bad MSI IRQ %d\n", bit);
> + }
> + }
> +}
> +
> +static void mc_msi_bottom_irq_ack(struct irq_data *data)
> +{
> + struct mc_port *port = irq_data_get_irq_chip_data(data);
> + void __iomem *bridge_base_addr = port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
> + u32 bitpos = data->hwirq;
> + unsigned long status;
> +
> + writel_relaxed(BIT(bitpos), bridge_base_addr + ISTATUS_MSI);
> + status = readl_relaxed(bridge_base_addr + ISTATUS_MSI);
> + if (!status)
> + writel_relaxed(BIT(PM_MSI_INT_MSI_SHIFT), bridge_base_addr + ISTATUS_LOCAL);
This looks like it might be racy. What happens if we read 0 from
ISTATUS_MSI, but a new MSI is latched before we write ISTATUS_LOCAL?
Will mc_handle_msi() be called? If so, will PM_MSI_INT_MSI_MASK be
set in the value it reads from ISTATUS_LOCAL?
Current code at:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pci/controller/pcie-microchip-host.c?id=v5.17-rc1#n406
next prev parent reply other threads:[~2022-01-27 20:20 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-25 16:29 [PATCH v21 0/4] PCI: microchip: Add host driver for Microchip PCIe controller daire.mcnamara
2021-01-25 16:29 ` [PATCH v21 1/4] PCI: Call platform_set_drvdata earlier in devm_pci_alloc_host_bridge daire.mcnamara
2021-01-25 16:29 ` [PATCH v21 2/4] dt-bindings: PCI: microchip: Add Microchip PolarFire host binding daire.mcnamara
2021-01-25 16:29 ` [PATCH v21 3/4] PCI: microchip: Add host driver for Microchip PCIe controller daire.mcnamara
2021-02-01 19:05 ` Lorenzo Pieralisi
[not found] ` <MN2PR11MB42691AE1B54DEAB5C1BAA11D96B59@MN2PR11MB4269.namprd11.prod.outlook.com>
2021-02-04 10:20 ` Lorenzo Pieralisi
2021-02-10 13:07 ` Geert Uytterhoeven
2021-02-11 13:03 ` Ben Dooks
2021-02-11 13:07 ` Geert Uytterhoeven
2021-02-16 9:54 ` Daire.McNamara
2022-01-27 20:20 ` Bjorn Helgaas [this message]
2022-01-28 9:55 ` Marc Zyngier
2022-01-28 13:16 ` Bjorn Helgaas
2021-01-25 16:29 ` [PATCH v21 4/4] MAINTAINERS: Add Daire McNamara as maintainer for the Microchip PCIe driver daire.mcnamara
2021-02-04 11:42 ` [PATCH v21 0/4] PCI: microchip: Add host driver for Microchip PCIe controller Lorenzo Pieralisi
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