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From: Rob Herring <robh@kernel.org>
To: Frank Wunderlich <frank-w@public-files.de>
Cc: "Frank Wunderlich" <linux@fw-web.de>,
	"Michael Riesch" <michael.riesch@wolfvision.net>,
	"Vinod Koul" <vkoul@kernel.org>,
	"Johan Jonker" <jbx6244@gmail.com>,
	linux-rockchip@lists.infradead.org, linux-pci@vger.kernel.org,
	"Kishon Vijay Abraham I" <kishon@ti.com>,
	linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Peter Geis" <pgwipeout@gmail.com>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	"Krzysztof Wilczyński" <kw@linux.com>
Subject: Re: Re: [RFC v3 1/5] dt-bindings: phy: rockchip: add PCIe v3 phy
Date: Wed, 18 May 2022 10:55:51 -0500	[thread overview]
Message-ID: <20220518155551.GB3302100-robh@kernel.org> (raw)
In-Reply-To: <9496CAFB-6CB6-4BDA-A539-3A6E1B562299@public-files.de>

On Mon, May 16, 2022 at 09:21:31PM +0200, Frank Wunderlich wrote:
> Am 16. Mai 2022 19:35:37 MESZ schrieb Rob Herring <robh@kernel.org>:
> >On Sun, May 15, 2022 at 01:49:47PM +0200, Frank Wunderlich wrote:
> >> Hi
> >> 
> >> > Gesendet: Sonntag, 15. Mai 2022 um 01:14 Uhr
> >> > Von: "Rob Herring" <robh@kernel.org>
> >> 
> >> > On Sat, 14 May 2022 13:59:42 +0200, Frank Wunderlich wrote:
> 
> >Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml
> >> > >
> >> >
> >> > My bot found errors running 'make DT_CHECKER_FLAGS=-m
> >dt_binding_check'
> >> > on your patch (DT_CHECKER_FLAGS is new in v5.13):
> >> >
> >> > yamllint warnings/errors:
> >> >
> >> > dtschema/dtc warnings/errors:
> >> >
> >/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml:
> >properties:clock-names: 'oneOf' conditional failed, one must be fixed:
> >> > 	[{'const': 'refclk_m'}, {'const': 'refclk_n'}, {'const': 'pclk'}]
> >is too long
> >> > 	[{'const': 'refclk_m'}, {'const': 'refclk_n'}, {'const': 'pclk'}]
> >is too short
> >> > 	False schema does not allow 3
> >> > 	1 was expected
> >> > 	3 is greater than the maximum of 2
> >> > 	hint: "minItems" is only needed if less than the "items" list
> >length
> >> > 	from schema $id: http://devicetree.org/meta-schemas/items.yaml#
> >> >
> >/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml:
> >ignoring, error in schema: properties: clock-names
> >> >
> >Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.example.dtb:0:0:
> >/example-0/phy@fe8c0000: failed to match any schema with compatible:
> >['rockchip,rk3568-pcie3-phy']
> >> 
> >> seems this is fixed when i remove the "minItems: 3" from clock names 
> >> (which is already fixed length because of the list).
> >
> >Yes.
> >
> >> needed to change type of lane-map to this:
> >> 
> >> $ref: /schemas/types.yaml#/definitions/uint8-array
> >
> >Why? That's not a standard property though, so needs a 'rockchip' 
> >prefix. Though maybe a common property would be appropriate here.
> 
> Originally it was a bool property named "rockchip,bifurcation" and we 
> changed it (after comments) to be a more generic property "lane-map" 
> that can be re-used on other vendors/controllers/phys.

Fair enough. The type needs to be defined in a common binding though. 
phy/phy-provider.yaml in dtschema probably.

We already have clock-lanes and data-lanes for other serdes interfaces. 
Maybe data-lanes works here?

> Driver reads as u8 array and range is small enough for u8 even if 
> used for larger controllers (e.g. PCIe x16).

Not arguing that it shouldn't be, just confused how the type was related 
to warnings.

> 
> >> then it looks clean for it....
> >> 
> >> -m causes many errors unrelated to this schema-file even if i pass
> >>
> >DT_SCHEMA_FILES=Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml
> >
> >The fix is fixing the remaining 40 or so '-m' errors.
> 
> So now clean for you(r bot), too? Did only get a bunch of other unrelated messages.

No, the bot does a baseline build and extracts the diff in warnings. 
Still too many warnings popping up frequently... :(

Rob

  reply	other threads:[~2022-05-18 15:56 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-14 11:59 [RFC v3 0/5] RK3568 PCIe V3 support Frank Wunderlich
2022-05-14 11:59 ` [RFC v3 1/5] dt-bindings: phy: rockchip: add PCIe v3 phy Frank Wunderlich
2022-05-14 20:44   ` Krzysztof Kozlowski
2022-05-14 23:14   ` Rob Herring
2022-05-15 11:49     ` Aw: " Frank Wunderlich
2022-05-16 17:35       ` Rob Herring
2022-05-16 19:21         ` Frank Wunderlich
2022-05-18 15:55           ` Rob Herring [this message]
2022-05-20 11:50             ` Aw: " Frank Wunderlich
2022-06-02 13:47               ` Frank Wunderlich
2022-05-14 11:59 ` [RFC v3 2/5] dt-bindings: soc: grf: add pcie30-{phy,pipe}-grf Frank Wunderlich
2022-05-14 20:43   ` Krzysztof Kozlowski
2022-05-14 11:59 ` [RFC v3 3/5] phy: rockchip: Support PCIe v3 Frank Wunderlich
2022-05-14 11:59 ` [RFC v3 4/5] arm64: dts: rockchip: rk3568: Add PCIe v3 nodes Frank Wunderlich
2022-05-14 11:59 ` [RFC v3 5/5] arm64: dts: rockchip: Add PCIe v3 nodes to BPI-R2-Pro Frank Wunderlich

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