Aw: Re: [RFC v3 1/5] dt-bindings: phy: rockchip: add PCIe v3 phy

From: Frank Wunderlich <frank-w@public-files.de>
To: Rob Herring <robh@kernel.org>
Cc: "Frank Wunderlich" <linux@fw-web.de>,
	"Michael Riesch" <michael.riesch@wolfvision.net>,
	"Vinod Koul" <vkoul@kernel.org>,
	"Johan Jonker" <jbx6244@gmail.com>,
	linux-rockchip@lists.infradead.org, linux-pci@vger.kernel.org,
	"Kishon Vijay Abraham I" <kishon@ti.com>,
	linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Peter Geis" <pgwipeout@gmail.com>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	linux-arm-kernel@lists.infradead.org,
	"Rob Herring" <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, "Krzysztof Wilczyński" <kw@linux.com>
Subject: Aw: Re: [RFC v3 1/5] dt-bindings: phy: rockchip: add PCIe v3 phy
Date: Sun, 15 May 2022 13:49:47 +0200	[thread overview]
Message-ID: <trinity-02ad648c-f6f8-4383-b389-a0578d5a02d2-1652615387162@3c-app-gmx-bap15> (raw)
In-Reply-To: <1652570081.002742.3276245.nullmailer@robh.at.kernel.org>

Hi

> Gesendet: Sonntag, 15. Mai 2022 um 01:14 Uhr
> Von: "Rob Herring" <robh@kernel.org>

> On Sat, 14 May 2022 13:59:42 +0200, Frank Wunderlich wrote:
> > From: Frank Wunderlich <frank-w@public-files.de>
> >
> > Add a new binding file for Rockchip PCIe v3 phy driver.
> >
> > Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
> >
> > ---
> > v3:
> > - drop quotes
> > - drop rk3588
> > - make clockcount fixed to 3
> > - full path for binding header file
> > - drop phy-mode and its header and add lane-map
> >
> > v2:
> > dt-bindings: rename yaml for PCIe v3
> > rockchip-pcie3-phy.yaml => rockchip,pcie3-phy.yaml
> >
> > changes in pcie3 phy yaml
> > - change clock names to ordered const list
> > - extend pcie30-phymode description
> > - add phy-cells to required properties
> > - drop unevaluatedProperties
> > - example with 1 clock each line
> > - use default property instead of text describing it
> > - update license
> > ---
> >  .../bindings/phy/rockchip,pcie3-phy.yaml      | 82 +++++++++++++++++++
> >  1 file changed, 82 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml
> >
>
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
>
> yamllint warnings/errors:
>
> dtschema/dtc warnings/errors:
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml: properties:clock-names: 'oneOf' conditional failed, one must be fixed:
> 	[{'const': 'refclk_m'}, {'const': 'refclk_n'}, {'const': 'pclk'}] is too long
> 	[{'const': 'refclk_m'}, {'const': 'refclk_n'}, {'const': 'pclk'}] is too short
> 	False schema does not allow 3
> 	1 was expected
> 	3 is greater than the maximum of 2
> 	hint: "minItems" is only needed if less than the "items" list length
> 	from schema $id: http://devicetree.org/meta-schemas/items.yaml#
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml: ignoring, error in schema: properties: clock-names
> Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.example.dtb:0:0: /example-0/phy@fe8c0000: failed to match any schema with compatible: ['rockchip,rk3568-pcie3-phy']

seems this is fixed when i remove the "minItems: 3" from clock names (which is already fixed length because of the list).

needed to change type of lane-map to this:

$ref: /schemas/types.yaml#/definitions/uint8-array

then it looks clean for it....

-m causes many errors unrelated to this schema-file even if i pass
DT_SCHEMA_FILES=Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml

will wait a bit for other comments (for driver) till i send another version. maybe you can confirm my changes are the right way to fix.

regards Frank