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From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: <ira.weiny@intel.com>
Cc: Dan Williams <dan.j.williams@intel.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	"Li, Ming" <ming4.li@intel.com>,
	Bjorn Helgaas <helgaas@kernel.org>,
	Lukas Wunner <lukas@wunner.de>,
	Alison Schofield <alison.schofield@intel.com>,
	Vishal Verma <vishal.l.verma@intel.com>,
	"Dave Jiang" <dave.jiang@intel.com>,
	Ben Widawsky <bwidawsk@kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-cxl@vger.kernel.org>,
	<linux-pci@vger.kernel.org>
Subject: Re: [PATCH V12 3/9] PCI: Create PCIe library functions in support of DOE mailboxes.
Date: Tue, 28 Jun 2022 15:38:48 +0100	[thread overview]
Message-ID: <20220628153848.00007818@Huawei.com> (raw)
In-Reply-To: <20220628041527.742333-4-ira.weiny@intel.com>

On Mon, 27 Jun 2022 21:15:21 -0700
ira.weiny@intel.com wrote:

> From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> 
> Introduced in a PCIe r6.0, sec 6.30, DOE provides a config space based
> mailbox with standard protocol discovery.  Each mailbox is accessed
> through a DOE Extended Capability.
> 
> Each DOE mailbox must support the DOE discovery protocol in addition to
> any number of additional protocols.
> 
> Define core PCIe functionality to manage a single PCIe DOE mailbox at a
> defined config space offset.  Functionality includes iterating,
> creating, query of supported protocol, and task submission.  Destruction
> of the mailboxes is device managed.
> 
> If interrupts are desired, the interrupt number can be queried and
> passed to the create function.  Passing a negative value disables
> interrupts for that mailbox.  It is the caller's responsibility to ensure
> enough interrupt vectors are allocated.
> 
> Cc: "Li, Ming" <ming4.li@intel.com>
> Cc: Bjorn Helgaas <helgaas@kernel.org>
> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Co-developed-by: Ira Weiny <ira.weiny@intel.com>
> Signed-off-by: Ira Weiny <ira.weiny@intel.com>

+static void *pci_doe_xa_entry(u16 vid, u8 prot)
+{
+	return (void *)(((unsigned long)vid << 16) | prot);
+}
...

> +static int pci_doe_cache_protocols(struct pci_doe_mb *doe_mb)
> +{
> +	u8 index = 0;
> +	u8 xa_idx = 0;
> +
> +	do {
> +		int rc;
> +		u16 vid;
> +		u8 prot;
> +
> +		rc = pci_doe_discovery(doe_mb, &index, &vid, &prot);
> +		if (rc)
> +			return rc;
> +
> +		pci_dbg(doe_mb->pdev,
> +			"[%x] Found protocol %d vid: %x prot: %x\n",
> +			doe_mb->cap_offset, xa_idx, vid, prot);
> +
> +		rc = xa_insert(&doe_mb->prots, xa_idx++,
> +			       pci_doe_xa_entry(vid, prot), GFP_KERNEL);

I'm not that familiar with xarray, but the docs suggest that you have
to use xa_mk_value() to store an integer directly into it.

> +		if (rc)
> +			return -ENOMEM;
> +	} while (index);
> +
> +	return 0;
> +}
> +

  parent reply	other threads:[~2022-06-28 14:38 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-28  4:15 [PATCH V12 0/9] CXL: Read CDAT and DSMAS data ira.weiny
2022-06-28  4:15 ` [PATCH V12 1/9] PCI: Add vendor ID for the PCI SIG ira.weiny
2022-06-28  4:15 ` [PATCH V12 2/9] PCI: Replace magic constant for PCI Sig Vendor ID ira.weiny
2022-06-28  4:15 ` [PATCH V12 3/9] PCI: Create PCIe library functions in support of DOE mailboxes ira.weiny
2022-06-28 14:16   ` Jonathan Cameron
2022-06-28 14:56     ` Bjorn Helgaas
2022-06-28 18:20     ` Ira Weiny
2022-06-29 14:09       ` Jonathan Cameron
2022-06-30  4:34         ` Ira Weiny
2022-06-30 15:25           ` Jonathan Cameron
2022-07-01 22:22             ` Ira Weiny
2022-07-04  6:45               ` Jonathan Cameron
2022-06-29 16:53       ` Ira Weiny
2022-06-28 14:38   ` Jonathan Cameron [this message]
2022-06-28 16:58     ` Ira Weiny
2022-06-28  4:15 ` [PATCH V12 4/9] cxl/pci: Create PCI DOE mailbox's for memory devices ira.weiny
2022-06-28 14:33   ` Jonathan Cameron
2022-06-30  5:32     ` Ira Weiny
2022-06-30 15:32       ` Jonathan Cameron
2022-06-30 16:14         ` Davidlohr Bueso
2022-07-01 19:52           ` Ira Weiny
2022-06-28  4:15 ` [PATCH V12 5/9] driver-core: Introduce BIN_ATTR_ADMIN_{RO,RW} ira.weiny
2022-06-28  6:06   ` Greg Kroah-Hartman
2022-06-28 16:42   ` Ira Weiny
2022-06-29  1:10   ` Bjorn Helgaas
2022-06-28  4:15 ` [PATCH V12 6/9] cxl/port: Read CDAT table ira.weiny
2022-06-28 14:47   ` Jonathan Cameron
2022-06-30  3:35     ` Ira Weiny
2022-06-30 15:45       ` Jonathan Cameron
2022-06-28  4:15 ` [PATCH V12 7/9] cxl/port: Introduce cxl_cdat_valid() ira.weiny
2022-06-28 14:49   ` Jonathan Cameron
2022-06-30  4:42     ` Ira Weiny
2022-06-28  4:15 ` [PATCH V12 8/9] cxl/port: Retry reading CDAT on failure ira.weiny
2022-06-28 14:57   ` Jonathan Cameron
2022-06-30  3:40     ` Ira Weiny
2022-06-28  4:15 ` [PATCH V12 9/9] cxl/port: Parse out DSMAS data from CDAT table ira.weiny
2022-06-28 15:00   ` Jonathan Cameron

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