From: Davidlohr Bueso <dave@stgolabs.net>
To: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
Cc: Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Lukas Wunner <lukas@wunner.de>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Dave Jiang <dave.jiang@intel.com>,
Ben Widawsky <bwidawsk@kernel.org>,
linux-kernel@vger.kernel.org, linux-cxl@vger.kernel.org,
linux-pci@vger.kernel.org
Subject: Re: [PATCH V12 4/9] cxl/pci: Create PCI DOE mailbox's for memory devices
Date: Thu, 30 Jun 2022 09:14:06 -0700 [thread overview]
Message-ID: <20220630161406.yglzoxn2va3bhts4@offworld> (raw)
In-Reply-To: <20220630163240.00003596@Huawei.com>
On Thu, 30 Jun 2022, Jonathan Cameron wrote:
>On Wed, 29 Jun 2022 22:32:57 -0700 Ira Weiny <ira.weiny@intel.com> wrote:
>> I _thought_ that we did not care if some mailboxes failed or not.
>
>I have a different view to Dan on this. In my view if your hardware is
>not working in any way at all scream like mad don't carry on... Dan
>is keen to try to muddle onwards.
I am also of the idea of not carrying on upon any indication of failure.
>>
>> If CDAT is not supported on any of the mailboxes found then CDAT will not show
>> up on sysfs (as per Dan's last comment). If it was supported on a mailbox but
>> no data is found the sysfs will show up but be 0 length.
>>
>> At this layer I thought we agreed to skip over these errors. If a protocol is
>> needed at a higher layer and it is not found on any of the mailboxes the errors
>> should show up in that layer. In this series CDAT is not 100% necessary as
>> devices can work without it. So the errors were mostly paper'ed over in favor
>> of just printing error messages and muddle on.
>>
>> The xa_insert() deserves a pci_err() though.
>
>That's probably the minimum we should do. The xa_insert() failing is something
>horrible going wrong in our software / host afterall.
Yes. And in addition, devm_cxl_pci_create_doe() should return any error status, and
cxl_pci_probe() can choose to omit any errors, but it's still better to have it.
Thanks,
Davidlohr
next prev parent reply other threads:[~2022-06-30 16:45 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-28 4:15 [PATCH V12 0/9] CXL: Read CDAT and DSMAS data ira.weiny
2022-06-28 4:15 ` [PATCH V12 1/9] PCI: Add vendor ID for the PCI SIG ira.weiny
2022-06-28 4:15 ` [PATCH V12 2/9] PCI: Replace magic constant for PCI Sig Vendor ID ira.weiny
2022-06-28 4:15 ` [PATCH V12 3/9] PCI: Create PCIe library functions in support of DOE mailboxes ira.weiny
2022-06-28 14:16 ` Jonathan Cameron
2022-06-28 14:56 ` Bjorn Helgaas
2022-06-28 18:20 ` Ira Weiny
2022-06-29 14:09 ` Jonathan Cameron
2022-06-30 4:34 ` Ira Weiny
2022-06-30 15:25 ` Jonathan Cameron
2022-07-01 22:22 ` Ira Weiny
2022-07-04 6:45 ` Jonathan Cameron
2022-06-29 16:53 ` Ira Weiny
2022-06-28 14:38 ` Jonathan Cameron
2022-06-28 16:58 ` Ira Weiny
2022-06-28 4:15 ` [PATCH V12 4/9] cxl/pci: Create PCI DOE mailbox's for memory devices ira.weiny
2022-06-28 14:33 ` Jonathan Cameron
2022-06-30 5:32 ` Ira Weiny
2022-06-30 15:32 ` Jonathan Cameron
2022-06-30 16:14 ` Davidlohr Bueso [this message]
2022-07-01 19:52 ` Ira Weiny
2022-06-28 4:15 ` [PATCH V12 5/9] driver-core: Introduce BIN_ATTR_ADMIN_{RO,RW} ira.weiny
2022-06-28 6:06 ` Greg Kroah-Hartman
2022-06-28 16:42 ` Ira Weiny
2022-06-29 1:10 ` Bjorn Helgaas
2022-06-28 4:15 ` [PATCH V12 6/9] cxl/port: Read CDAT table ira.weiny
2022-06-28 14:47 ` Jonathan Cameron
2022-06-30 3:35 ` Ira Weiny
2022-06-30 15:45 ` Jonathan Cameron
2022-06-28 4:15 ` [PATCH V12 7/9] cxl/port: Introduce cxl_cdat_valid() ira.weiny
2022-06-28 14:49 ` Jonathan Cameron
2022-06-30 4:42 ` Ira Weiny
2022-06-28 4:15 ` [PATCH V12 8/9] cxl/port: Retry reading CDAT on failure ira.weiny
2022-06-28 14:57 ` Jonathan Cameron
2022-06-30 3:40 ` Ira Weiny
2022-06-28 4:15 ` [PATCH V12 9/9] cxl/port: Parse out DSMAS data from CDAT table ira.weiny
2022-06-28 15:00 ` Jonathan Cameron
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