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From: Jean-philippe Brucker <jphilippe.brucker@gmail.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: "iommu@lists.linux-foundation.org"
	<iommu@lists.linux-foundation.org>,
	"virtualization@lists.linux-foundation.org" 
	<virtualization@lists.linux-foundation.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>,
	"peter.maydell@linaro.org" <peter.maydell@linaro.org>,
	"joro@8bytes.org" <joro@8bytes.org>,
	"mst@redhat.com" <mst@redhat.com>,
	"jasowang@redhat.com" <jasowang@redhat.com>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	Mark Rutland <Mark.Rutland@arm.com>,
	"eric.auger@redhat.com" <eric.auger@redhat.com>,
	"tnowicki@caviumnetworks.com" <tnowicki@caviumnetworks.com>,
	"kevin.tian@intel.com" <kevin.tian@intel.com>,
	Marc Zyngier <Marc.Zyngier@arm.com>,
	Robin Murphy <Robin.Murphy@arm.com>,
	Will Deacon <Will.Deacon@arm.com>,
	Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
	jean-philippe.brucker@arm.com
Subject: Re: [PATCH v3 3/7] PCI: OF: Allow endpoints to bypass the iommu
Date: Mon, 15 Oct 2018 20:45:47 +0100	[thread overview]
Message-ID: <6abc7321-c46a-5618-1ce7-4be85fcc38ec@gmail.com> (raw)
In-Reply-To: <20181012194158.GX5906@bhelgaas-glaptop.roam.corp.google.com>

[Replying with my personal address because we're having SMTP issues]

On 12/10/2018 20:41, Bjorn Helgaas wrote:
> s/iommu/IOMMU/ in subject
> 
> On Fri, Oct 12, 2018 at 03:59:13PM +0100, Jean-Philippe Brucker wrote:
>> Using the iommu-map binding, endpoints in a given PCI domain can be
>> managed by different IOMMUs. Some virtual machines may allow a subset of
>> endpoints to bypass the IOMMU. In some case the IOMMU itself is presented
> 
> s/case/cases/
> 
>> as a PCI endpoint (e.g. AMD IOMMU and virtio-iommu). Currently, when a
>> PCI root complex has an iommu-map property, the driver requires all
>> endpoints to be described by the property. Allow the iommu-map property to
>> have gaps.
> 
> I'm not an IOMMU or virtio expert, so it's not obvious to me why it is
> safe to allow devices to bypass the IOMMU.  Does this mean a typo in
> iommu-map could inadvertently allow devices to bypass it?

As Robin said, a device that is absent from iommu-map will be ignored by
the IOMMU layer, so it depends on the specific IOMMU implementation and
driver. By default the SMMU and virtio-iommu drivers disable bypass, but
I'm not sure about the others. I'll try to find a more accurate title for
this patch

>  Should we
> indicate something in dmesg (and/or sysfs) about devices that bypass
> it?

Good idea, I'll replace the pr_err() below with a pr_info(), instead of
simply removing it.

>> Relaxing of_pci_map_rid also allows the msi-map property to have gaps,
> 
> s/of_pci_map_rid/of_pci_map_rid()/
> 
>> which is invalid since MSIs always reach an MSI controller. Thankfully
>> Linux will error out later, when attempting to find an MSI domain for the
>> device.
> 
> Not clear to me what "error out" means here.  In a userspace program,
> I would infer that the program exits with an error message, but I
> doubt you mean that Linux exits.

Right, I'll clarify this. It's pci_msi_setup_msi_irqs() that returns an
error if the device is missing from msi-map, so the device driver won't be
able to request MSIs.

Thanks,
Jean

>> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
>> ---
>>  drivers/pci/of.c | 7 ++++---
>>  1 file changed, 4 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/pci/of.c b/drivers/pci/of.c
>> index 1836b8ddf292..2f5015bdb256 100644
>> --- a/drivers/pci/of.c
>> +++ b/drivers/pci/of.c
>> @@ -451,9 +451,10 @@ int of_pci_map_rid(struct device_node *np, u32 rid,
>>  		return 0;
>>  	}
>>  
>> -	pr_err("%pOF: Invalid %s translation - no match for rid 0x%x on %pOF\n",
>> -		np, map_name, rid, target && *target ? *target : NULL);
>> -	return -EFAULT;
>> +	/* Bypasses translation */
>> +	if (id_out)
>> +		*id_out = rid;
>> +	return 0;
>>  }
>>  
>>  #if IS_ENABLED(CONFIG_OF_IRQ)
>> -- 
>> 2.19.1
>>
> 


  parent reply	other threads:[~2018-10-15 19:45 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-12 14:59 [PATCH v3 0/7] Add virtio-iommu driver Jean-Philippe Brucker
2018-10-12 14:59 ` [PATCH v3 1/7] dt-bindings: virtio-mmio: Add IOMMU description Jean-Philippe Brucker
2018-10-18  0:30   ` Rob Herring
2018-11-15  8:45   ` Auger Eric
2018-10-12 14:59 ` [PATCH v3 2/7] dt-bindings: virtio: Add virtio-pci-iommu node Jean-Philippe Brucker
2018-10-18  0:35   ` Rob Herring
2018-11-15  8:45   ` Auger Eric
2018-10-12 14:59 ` [PATCH v3 3/7] PCI: OF: Allow endpoints to bypass the iommu Jean-Philippe Brucker
2018-10-12 19:41   ` Bjorn Helgaas
2018-10-15 10:52     ` Michael S. Tsirkin
2018-10-15 19:46       ` Jean-philippe Brucker
2018-10-17 15:14         ` Michael S. Tsirkin
2018-10-18 10:47           ` Robin Murphy
2018-10-22 11:27           ` Jean-Philippe Brucker
2018-10-15 11:32     ` Robin Murphy
2018-10-15 19:45     ` Jean-philippe Brucker [this message]
2018-10-12 14:59 ` [PATCH v3 4/7] PCI: OF: Initialize dev->fwnode appropriately Jean-Philippe Brucker
2018-10-12 19:44   ` Bjorn Helgaas
2018-10-12 14:59 ` [PATCH v3 5/7] iommu: Add virtio-iommu driver Jean-Philippe Brucker
2018-10-12 16:35   ` Michael S. Tsirkin
2018-10-12 18:54     ` Jean-Philippe Brucker
2018-11-08 14:51     ` Auger Eric
2018-11-08 16:46       ` Jean-Philippe Brucker
2018-10-12 14:59 ` [PATCH v3 6/7] iommu/virtio: Add probe request Jean-Philippe Brucker
2018-10-12 16:42   ` Michael S. Tsirkin
2018-11-08 14:48   ` Auger Eric
2018-11-08 16:46     ` Jean-Philippe Brucker
2018-11-15 13:20   ` Auger Eric
2018-11-15 16:22     ` Jean-Philippe Brucker
2018-10-12 14:59 ` [PATCH v3 7/7] iommu/virtio: Add event queue Jean-Philippe Brucker
2018-10-12 17:00 ` [PATCH v3 0/7] Add virtio-iommu driver Michael S. Tsirkin
2018-10-12 18:55   ` Jean-Philippe Brucker
2018-10-16  9:25 ` Auger Eric
2018-10-16 18:44   ` Jean-Philippe Brucker
2018-10-16 20:31     ` Auger Eric
2018-10-17 11:54       ` Jean-Philippe Brucker
2018-10-17 15:23         ` Michael S. Tsirkin

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