From: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
To: "Wangzhou (B)" <wangzhou1@hisilicon.com>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-crypto@vger.kernel.org" <linux-crypto@vger.kernel.org>,
Xu Zaibo <xuzaibo@huawei.com>
Cc: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"alex.williamson@redhat.com" <alex.williamson@redhat.com>,
"jgg@nvidia.com" <jgg@nvidia.com>,
"cohuck@redhat.com" <cohuck@redhat.com>,
"mgurtovoy@nvidia.com" <mgurtovoy@nvidia.com>,
"yishaih@nvidia.com" <yishaih@nvidia.com>,
Linuxarm <linuxarm@huawei.com>,
liulongfang <liulongfang@huawei.com>,
"Zengtao (B)" <prime.zeng@hisilicon.com>,
"Jonathan Cameron" <jonathan.cameron@huawei.com>
Subject: RE: [PATCH v8 3/9] hisi_acc_qm: Move VF PCI device IDs to common header
Date: Fri, 4 Mar 2022 11:35:55 +0000 [thread overview]
Message-ID: <7825c26f18d441acb046fe6aaade8926@huawei.com> (raw)
In-Reply-To: <e0ccebeb-b5ff-5bb7-87c9-c453eb71fa3f@hisilicon.com>
[+Zaibo]
> -----Original Message-----
> From: Wangzhou (B)
> Sent: 04 March 2022 09:35
> To: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>;
> kvm@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-crypto@vger.kernel.org
> Cc: linux-pci@vger.kernel.org; alex.williamson@redhat.com; jgg@nvidia.com;
> cohuck@redhat.com; mgurtovoy@nvidia.com; yishaih@nvidia.com; Linuxarm
> <linuxarm@huawei.com>; liulongfang <liulongfang@huawei.com>; Zengtao (B)
> <prime.zeng@hisilicon.com>; Jonathan Cameron
> <jonathan.cameron@huawei.com>
> Subject: Re: [PATCH v8 3/9] hisi_acc_qm: Move VF PCI device IDs to common
> header
>
> > Move the PCI Device IDs of HiSilicon ACC VF devices to a common heade>
> and also use a uniform naming convention.
> >
> > This will be useful when we introduce the vfio PCI HiSilicon ACC live
> > migration driver in subsequent patches.
> >
> > Signed-off-by: Shameer Kolothum
> <shameerali.kolothum.thodi@huawei.com>
>
> Acked-by: Zhou Wang <wangzhou1@hisilicon.com>
Thanks. Added Zaibo for hpre/sec parts.
> > ---
> > drivers/crypto/hisilicon/hpre/hpre_main.c | 13 ++++++-------
> > drivers/crypto/hisilicon/sec2/sec_main.c | 15 +++++++--------
> > drivers/crypto/hisilicon/zip/zip_main.c | 11 +++++------
> > include/linux/pci_ids.h | 3 +++
> > 4 files changed, 21 insertions(+), 21 deletions(-)
> >
> > diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c
> b/drivers/crypto/hisilicon/hpre/hpre_main.c
> > index ebfab3e14499..3589d8879b5e 100644
> > --- a/drivers/crypto/hisilicon/hpre/hpre_main.c
> > +++ b/drivers/crypto/hisilicon/hpre/hpre_main.c
> > @@ -68,8 +68,7 @@
> > #define HPRE_REG_RD_INTVRL_US 10
> > #define HPRE_REG_RD_TMOUT_US 1000
> > #define HPRE_DBGFS_VAL_MAX_LEN 20
> > -#define HPRE_PCI_DEVICE_ID 0xa258
> > -#define HPRE_PCI_VF_DEVICE_ID 0xa259
> > +#define PCI_DEVICE_ID_HUAWEI_HPRE_PF 0xa258
> > #define HPRE_QM_USR_CFG_MASK GENMASK(31, 1)
> > #define HPRE_QM_AXI_CFG_MASK GENMASK(15, 0)
> > #define HPRE_QM_VFG_AX_MASK GENMASK(7, 0)
> > @@ -111,8 +110,8 @@
> > static const char hpre_name[] = "hisi_hpre";
> > static struct dentry *hpre_debugfs_root;
> > static const struct pci_device_id hpre_dev_ids[] = {
> > - { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HPRE_PCI_DEVICE_ID) },
> > - { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HPRE_PCI_VF_DEVICE_ID) },
> > + { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI,
> PCI_DEVICE_ID_HUAWEI_HPRE_PF) },
> > + { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI,
> PCI_DEVICE_ID_HUAWEI_HPRE_VF) },
> > { 0, }
> > };
> >
> > @@ -242,7 +241,7 @@ MODULE_PARM_DESC(uacce_mode,
> UACCE_MODE_DESC);
> >
> > static int pf_q_num_set(const char *val, const struct kernel_param *kp)
> > {
> > - return q_num_set(val, kp, HPRE_PCI_DEVICE_ID);
> > + return q_num_set(val, kp, PCI_DEVICE_ID_HUAWEI_HPRE_PF);
> > }
> >
> > static const struct kernel_param_ops hpre_pf_q_num_ops = {
> > @@ -921,7 +920,7 @@ static int hpre_debugfs_init(struct hisi_qm *qm)
> > qm->debug.sqe_mask_len = HPRE_SQE_MASK_LEN;
> > hisi_qm_debug_init(qm);
> >
> > - if (qm->pdev->device == HPRE_PCI_DEVICE_ID) {
> > + if (qm->pdev->device == PCI_DEVICE_ID_HUAWEI_HPRE_PF) {
> > ret = hpre_ctrl_debug_init(qm);
> > if (ret)
> > goto failed_to_create;
> > @@ -958,7 +957,7 @@ static int hpre_qm_init(struct hisi_qm *qm, struct
> pci_dev *pdev)
> > qm->sqe_size = HPRE_SQE_SIZE;
> > qm->dev_name = hpre_name;
> >
> > - qm->fun_type = (pdev->device == HPRE_PCI_DEVICE_ID) ?
> > + qm->fun_type = (pdev->device == PCI_DEVICE_ID_HUAWEI_HPRE_PF) ?
> > QM_HW_PF : QM_HW_VF;
> > if (qm->fun_type == QM_HW_PF) {
> > qm->qp_base = HPRE_PF_DEF_Q_BASE;
> > diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c
> b/drivers/crypto/hisilicon/sec2/sec_main.c
> > index 26d3ab1d308b..311a8747b5bf 100644
> > --- a/drivers/crypto/hisilicon/sec2/sec_main.c
> > +++ b/drivers/crypto/hisilicon/sec2/sec_main.c
> > @@ -20,8 +20,7 @@
> >
> > #define SEC_VF_NUM 63
> > #define SEC_QUEUE_NUM_V1 4096
> > -#define SEC_PF_PCI_DEVICE_ID 0xa255
> > -#define SEC_VF_PCI_DEVICE_ID 0xa256
> > +#define PCI_DEVICE_ID_HUAWEI_SEC_PF 0xa255
> >
> > #define SEC_BD_ERR_CHK_EN0 0xEFFFFFFF
> > #define SEC_BD_ERR_CHK_EN1 0x7ffff7fd
> > @@ -225,7 +224,7 @@ static const struct debugfs_reg32 sec_dfx_regs[] = {
> >
> > static int sec_pf_q_num_set(const char *val, const struct kernel_param
> *kp)
> > {
> > - return q_num_set(val, kp, SEC_PF_PCI_DEVICE_ID);
> > + return q_num_set(val, kp, PCI_DEVICE_ID_HUAWEI_SEC_PF);
> > }
> >
> > static const struct kernel_param_ops sec_pf_q_num_ops = {
> > @@ -313,8 +312,8 @@ module_param_cb(uacce_mode,
> &sec_uacce_mode_ops, &uacce_mode, 0444);
> > MODULE_PARM_DESC(uacce_mode, UACCE_MODE_DESC);
> >
> > static const struct pci_device_id sec_dev_ids[] = {
> > - { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, SEC_PF_PCI_DEVICE_ID) },
> > - { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, SEC_VF_PCI_DEVICE_ID) },
> > + { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI,
> PCI_DEVICE_ID_HUAWEI_SEC_PF) },
> > + { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI,
> PCI_DEVICE_ID_HUAWEI_SEC_VF) },
> > { 0, }
> > };
> > MODULE_DEVICE_TABLE(pci, sec_dev_ids);
> > @@ -717,7 +716,7 @@ static int sec_core_debug_init(struct hisi_qm *qm)
> > regset->base = qm->io_base;
> > regset->dev = dev;
> >
> > - if (qm->pdev->device == SEC_PF_PCI_DEVICE_ID)
> > + if (qm->pdev->device == PCI_DEVICE_ID_HUAWEI_SEC_PF)
> > debugfs_create_file("regs", 0444, tmp_d, regset, &sec_regs_fops);
> >
> > for (i = 0; i < ARRAY_SIZE(sec_dfx_labels); i++) {
> > @@ -735,7 +734,7 @@ static int sec_debug_init(struct hisi_qm *qm)
> > struct sec_dev *sec = container_of(qm, struct sec_dev, qm);
> > int i;
> >
> > - if (qm->pdev->device == SEC_PF_PCI_DEVICE_ID) {
> > + if (qm->pdev->device == PCI_DEVICE_ID_HUAWEI_SEC_PF) {
> > for (i = SEC_CLEAR_ENABLE; i < SEC_DEBUG_FILE_NUM; i++) {
> > spin_lock_init(&sec->debug.files[i].lock);
> > sec->debug.files[i].index = i;
> > @@ -877,7 +876,7 @@ static int sec_qm_init(struct hisi_qm *qm, struct
> pci_dev *pdev)
> > qm->sqe_size = SEC_SQE_SIZE;
> > qm->dev_name = sec_name;
> >
> > - qm->fun_type = (pdev->device == SEC_PF_PCI_DEVICE_ID) ?
> > + qm->fun_type = (pdev->device == PCI_DEVICE_ID_HUAWEI_SEC_PF) ?
> > QM_HW_PF : QM_HW_VF;
> > if (qm->fun_type == QM_HW_PF) {
> > qm->qp_base = SEC_PF_DEF_Q_BASE;
> > diff --git a/drivers/crypto/hisilicon/zip/zip_main.c
> b/drivers/crypto/hisilicon/zip/zip_main.c
> > index 678f8b58ec42..66decfe07282 100644
> > --- a/drivers/crypto/hisilicon/zip/zip_main.c
> > +++ b/drivers/crypto/hisilicon/zip/zip_main.c
> > @@ -15,8 +15,7 @@
> > #include <linux/uacce.h>
> > #include "zip.h"
> >
> > -#define PCI_DEVICE_ID_ZIP_PF 0xa250
> > -#define PCI_DEVICE_ID_ZIP_VF 0xa251
> > +#define PCI_DEVICE_ID_HUAWEI_ZIP_PF 0xa250
> >
> > #define HZIP_QUEUE_NUM_V1 4096
> >
> > @@ -246,7 +245,7 @@ MODULE_PARM_DESC(uacce_mode,
> UACCE_MODE_DESC);
> >
> > static int pf_q_num_set(const char *val, const struct kernel_param *kp)
> > {
> > - return q_num_set(val, kp, PCI_DEVICE_ID_ZIP_PF);
> > + return q_num_set(val, kp, PCI_DEVICE_ID_HUAWEI_ZIP_PF);
> > }
> >
> > static const struct kernel_param_ops pf_q_num_ops = {
> > @@ -268,8 +267,8 @@ module_param_cb(vfs_num, &vfs_num_ops,
> &vfs_num, 0444);
> > MODULE_PARM_DESC(vfs_num, "Number of VFs to enable(1-63),
> 0(default)");
> >
> > static const struct pci_device_id hisi_zip_dev_ids[] = {
> > - { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, PCI_DEVICE_ID_ZIP_PF) },
> > - { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, PCI_DEVICE_ID_ZIP_VF) },
> > + { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI,
> PCI_DEVICE_ID_HUAWEI_ZIP_PF) },
> > + { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI,
> PCI_DEVICE_ID_HUAWEI_ZIP_VF) },
> > { 0, }
> > };
> > MODULE_DEVICE_TABLE(pci, hisi_zip_dev_ids);
> > @@ -838,7 +837,7 @@ static int hisi_zip_qm_init(struct hisi_qm *qm, struct
> pci_dev *pdev)
> > qm->sqe_size = HZIP_SQE_SIZE;
> > qm->dev_name = hisi_zip_name;
> >
> > - qm->fun_type = (pdev->device == PCI_DEVICE_ID_ZIP_PF) ?
> > + qm->fun_type = (pdev->device == PCI_DEVICE_ID_HUAWEI_ZIP_PF) ?
> > QM_HW_PF : QM_HW_VF;
> > if (qm->fun_type == QM_HW_PF) {
> > qm->qp_base = HZIP_PF_DEF_Q_BASE;
> > diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
> > index aad54c666407..31dee2b65a62 100644
> > --- a/include/linux/pci_ids.h
> > +++ b/include/linux/pci_ids.h
> > @@ -2529,6 +2529,9 @@
> > #define PCI_DEVICE_ID_KORENIX_JETCARDF3 0x17ff
> >
> > #define PCI_VENDOR_ID_HUAWEI 0x19e5
> > +#define PCI_DEVICE_ID_HUAWEI_ZIP_VF 0xa251
> > +#define PCI_DEVICE_ID_HUAWEI_SEC_VF 0xa256
> > +#define PCI_DEVICE_ID_HUAWEI_HPRE_VF 0xa259
> >
> > #define PCI_VENDOR_ID_NETRONOME 0x19ee
> > #define PCI_DEVICE_ID_NETRONOME_NFP4000 0x4000
> >
next prev parent reply other threads:[~2022-03-04 11:36 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-03 23:01 [PATCH v8 0/9] vfio/hisilicon: add ACC live migration driver Shameer Kolothum
2022-03-03 23:01 ` [PATCH v8 1/9] crypto: hisilicon/qm: Move the QM header to include/linux Shameer Kolothum
2022-03-04 9:03 ` Zhou Wang
2022-03-04 11:33 ` Shameerali Kolothum Thodi
2022-03-08 1:07 ` liulongfang
2022-03-08 10:27 ` yekai(A)
2022-03-03 23:01 ` [PATCH v8 2/9] crypto: hisilicon/qm: Move few definitions to common header Shameer Kolothum
2022-03-04 9:06 ` Zhou Wang
2022-03-03 23:01 ` [PATCH v8 3/9] hisi_acc_qm: Move VF PCI device IDs " Shameer Kolothum
2022-03-04 9:34 ` Zhou Wang
2022-03-04 11:35 ` Shameerali Kolothum Thodi [this message]
2022-03-07 17:53 ` Alex Williamson
2022-03-10 13:55 ` Shameerali Kolothum Thodi
2022-03-08 1:08 ` liulongfang
2022-03-08 10:28 ` yekai(A)
2022-03-03 23:01 ` [PATCH v8 4/9] hisi_acc_vfio_pci: add new vfio_pci driver for HiSilicon ACC devices Shameer Kolothum
2022-03-03 23:01 ` [PATCH v8 5/9] hisi_acc_vfio_pci: Restrict access to VF dev BAR2 migration region Shameer Kolothum
2022-03-08 1:11 ` liulongfang
2022-03-08 6:23 ` Tian, Kevin
2022-03-08 8:33 ` Shameerali Kolothum Thodi
2022-03-08 10:09 ` Tian, Kevin
2022-03-08 11:02 ` Shameerali Kolothum Thodi
2022-03-03 23:01 ` [PATCH v8 6/9] hisi_acc_vfio_pci: Add helper to retrieve the struct pci_driver Shameer Kolothum
2022-03-04 9:40 ` Zhou Wang
2022-03-04 11:31 ` Shameerali Kolothum Thodi
2022-03-08 10:28 ` yekai(A)
2022-03-08 12:02 ` liulongfang
2022-03-03 23:01 ` [PATCH v8 7/9] crypto: hisilicon/qm: Set the VF QM state register Shameer Kolothum
2022-03-04 9:43 ` Zhou Wang
2022-03-08 6:31 ` Tian, Kevin
2022-03-08 8:46 ` Shameerali Kolothum Thodi
2022-03-08 10:10 ` Tian, Kevin
2022-03-03 23:01 ` [PATCH v8 8/9] hisi_acc_vfio_pci: Add support for VFIO live migration Shameer Kolothum
2022-03-04 8:48 ` Shameerali Kolothum Thodi
2022-03-04 19:44 ` Alex Williamson
2022-03-04 20:36 ` Shameerali Kolothum Thodi
2022-03-04 20:40 ` Alex Williamson
2022-03-04 20:57 ` Jason Gunthorpe
2022-03-07 19:05 ` Alex Williamson
2022-03-07 19:29 ` Shameerali Kolothum Thodi
2022-03-07 19:52 ` Alex Williamson
2022-03-08 8:11 ` Tian, Kevin
2022-03-08 19:33 ` Alex Williamson
2022-03-09 10:11 ` Tian, Kevin
2022-03-10 20:49 ` Alex Williamson
2022-03-11 8:52 ` Cornelia Huck
2022-03-11 13:21 ` Shameerali Kolothum Thodi
2022-03-14 3:40 ` Tian, Kevin
2022-03-14 15:03 ` Jason Gunthorpe
2022-03-08 9:46 ` liulongfang
2022-03-08 7:41 ` Tian, Kevin
2022-03-08 8:52 ` Shameerali Kolothum Thodi
2022-03-08 10:17 ` Tian, Kevin
2022-03-03 23:01 ` [PATCH v8 9/9] hisi_acc_vfio_pci: Use its own PCI reset_done error handler Shameer Kolothum
2022-03-04 20:54 ` Jason Gunthorpe
2022-03-08 1:14 ` liulongfang
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